LTC7138
1
7138f
For more information www.linear.com/LTC7138
Typical applicaTion
FeaTures DescripTion
High Efficiency, 140V
400mA Step-Down
Regulator
The LTC
®
7138 is a high efficiency step-down DC/DC
regulator with internal power switch that draws only 12μA
typical DC supply current while maintaining a regulated
output voltage at no load.
The LTC7138 can supply up to 400mA load current and
features a programmable peak current limit that provides
a simple method for optimizing efficiency and for reduc-
ing output ripple and component size. The LTC7138’s
combination of Burst Mode
®
operation, integrated power
switch, low quiescent current, and programmable peak
current limit provides high efficiency over a broad range
of load currents.
With its wide input range of 4V to 140V and programmable
overvoltage lockout, the LTC7138 is a robust regulator
suited for regulating from a wide variety of power sources.
Additionally, the LTC7138 includes a precise run threshold
and soft-start feature to guarantee that the power system
start-up is well-controlled in any environment. A feedback
comparator output enables multiple LTC7138s to be con-
nected in parallel for higher current applications.
The LTC7138 is available in a thermally enhanced high
voltage-capable 16-lead MSE package with four missing pins.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
Efficiency and Power Loss vs Load Current
5V to 140V Input to 5V Output, 400mA Step-Down Regulator
applicaTions
n Wide Operating Input Voltage Range: 4V to 140V
n Internal Low Resistance Power MOSFET
n No Compensation Required
n Adjustable 100mA to 400mA Maximum Output
Current
n Low Dropout Operation: 100% Duty Cycle
n Low Quiescent Current: 12µA
n Wide Output Range: 0.8V to VIN
n 0.8V ±1% Feedback Voltage Reference
n Precise RUN Pin Threshold
n Internal or External Soft-Start
n Programmable 1.8V, 3.3V, 5V or Adjustable Output
n Few External Components Required
n Programmable Input Overvoltage Lockout
n Thermally Enhanced High Voltage MSOP Package
n Industrial Control Supplies
n Medical Devices
n Distributed Power Systems
n Portable Instruments
n Battery-Operated Devices
n Avionics
n Automotive
7138 TA01a
ANODE
VFB
SW
L1
220µH
VIN
RUN
CIN
1µF
250V
COUT
22µF
VIN
5V TO 140V
VOUT
5V
400mA
LTC7138
GND
VPRG2 OVLO
SS
VPRG1
VIN = 12V
VIN = 48V
VIN = 140V
LOAD CURRENT (mA)
30
EFFICIENCY (%)
POWER LOSS (mW)
90
100
20
10
80
50
70
10
1
100
1000
60
40
0.1 100 1000
7138 TA01b
0101
EFFICIENCY
POWER LOSS
LTC7138
2
7138f
For more information www.linear.com/LTC7138
absoluTe MaxiMuM raTings
1
3
5
6
7
8
SW
VIN
FBO
V
PRG2
V
PRG1
GND
16
14
12
11
10
9
ANODE
RUN
OVLO
ISET
SS
VFB
TOP VIEW
17
GND
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 40°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
pin conFiguraTion
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC7138EMSE#PBF LTC7138EMSE#TRPBF 7138 16-Lead Plastic MSOP –40°C to 125°C
LTC7138IMSE#PBF LTC7138IMSE#TRPBF 7138 16-Lead Plastic MSOP –40°C to 125°C
LTC7138HMSE#PBF LTC7138HMSE#TRPBF 7138 16-Lead Plastic MSOP –40°C to 150°C
LTC7138MPMSE#PBF LTC7138MPMSE#TRPBF 7138 16-Lead Plastic MSOP –55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
VIN Supply Voltage ................................... –0.3V to 140V
RUN Voltage............................................. –0.3V to 140V
SS, FBO, OVLO, ISET Voltages ...................... –0.3V to 6V
VFB, VPRG1, VPRG2 Voltages ......................... –0.3V to 6V
Operating Junction Temperature Range (Notes 2, 3, 4)
LTC7138E, LTC7138I .......................... –40°C to 125°C
LTC7138H .......................................... –40°C to 150°C
LTC7138MP ....................................... –55°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ...................300°C
(Note 1)
elecTrical characTerisTics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Supply (VIN)
VIN Input Voltage Operating Range 4 140 V
VOUT Output Voltage Operating Range 0.8 VIN V
UVLO VIN Undervoltage Lockout VIN Rising
VIN Falling
Hysteresis
l
l
3.5
3.3 3.75
3.5
250
4.0
3.8 V
V
mV
IQDC Supply Current (Note 5)
Active Mode
Sleep Mode
Shutdown Mode
No Load
VRUN = 0V
200
12
1.4
400
22
6
µA
µA
µA
VRUN RUN Pin Threshold RUN Rising
RUN Falling
Hysteresis
1.17
1.06 1.21
1.10
110
1.25
1.14 V
V
mV
IRUN RUN Pin Leakage Current RUN = 1.3V –10 0 10 nA
VOVLO OVLO Pin Threshold OVLO Rising
OVLO Falling
Hysteresis
1.17
1.06 1.21
1.10
110
1.25
1.14 V
V
mV
LTC7138
3
7138f
For more information www.linear.com/LTC7138
elecTrical characTerisTics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Output Supply (VFB)
VFB(ADJ) Feedback Comparator Threshold
(Adjustable Output) VFB Rising, VPRG1 = VPRG2 = 0V
LTC7138E, LTC7138I
LTC7138H, LTC7138MP
l
l
0.792
0.788
0.800
0.800
0.808
0.812
V
V
VFBH Feedback Comparator Hysteresis
(Adjustable Output) VFB Falling, VPRG1 = VPRG2 = 0V l3 5 9 mV
IFB Feedback Pin Current VFB = 1V, VPRG1 = VPRG2 = 0V –10 0 10 nA
VFB(FIXED) Feedback Comparator Thresholds
(Fixed Output) VFB Rising, VPRG1 = SS, VPRG2 = 0V
VFB Falling, VPRG1 = SS, VPRG2 = 0V
l
l
4.94
4.91 5.015
4.985 5.09
5.06 V
V
VFB Rising, VPRG1 = 0V, VPRG2 = SS
VFB Falling, VPRG1 = 0V, VPRG2 = SS
l
l
3.25
3.23 3.31
3.29 3.37
3.35 V
V
VFB Rising, VPRG1 = VPRG2 = SS
VFB Falling, VPRG1 = VPRG2 = SS
l
l
1.78
1.77 1.81
1.80 1.84
1.83 V
V
Operation
IPEAK Peak Current Comparator Threshold ISET Floating
100k Resistor from ISET to GND
ISET Shorted to GND
l
l
l
540
270
140
610
310
170
680
350
200
mA
mA
mA
IVAL Valley Current Comparator Threshold
Relative to IPEAK
ISET Floating
100k Resistor from ISET to GND
ISET Shorted to GND
l
l
l
50
45
45
60
60
60
70
70
75
%
%
%
RON Power Switch On-Resistance ISW = –100mA 1.8 Ω
ILSW Switch Pin Leakage Current VIN = 140V, SW = 0V 0.1 1 μA
ISS Soft-Start Pin Pull-Up Current VSS < 2.5V 4 5 6 μA
tINT(SS) Internal Soft-Start Time SS Pin Floating 1 ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC7138 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC7138E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC7138I is guaranteed
over the –40°C to 125°C operating junction temperature range, the
LTC7138H is guaranteed over the –40°C to 150°C operating junction
temperature range and the LTC7138MP is tested and guaranteed over the
–55°C to 150°C operating junction temperature range.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according to
the formula:
TJ = TA + (PD • θJA)
where θJA is 40°C/W for the MSOP package.
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Note 4: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device. The overtemperature protection level is not production tested.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
LTC7138
4
7138f
For more information www.linear.com/LTC7138
Typical perForMance characTerisTics
Peak Current and Valley Current
Trip Thresholds
vs RISET
Efficiency vs Load Current,
VOUT = 5V
Peak Current and Valley Current
Trip Thresholds vs Temperature
and ISET
Efficiency vs Load Current,
VOUT = 3.3V
Peak Current and Valley Current
Trip Thresholds vs Input Voltage
Efficiency vs Load Current,
VOUT = 1.8V
Efficiency vs Input Voltage,
VOUT = 5V
Feedback Comparator Trip
Threshold vs Temperature
RUN and OVLO Thresholds vs
Temperature
0.1 100
1000
101
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
7138 G01
0
FIGURE 13 CIRCUIT
VIN = 12V
VIN = 48V
VIN = 140V
30
90
100
20
10
80
50
70
60
40
00 25 75 100
50 125
150
INPUT VOLTAGE (V)
EFFICIENCY (%)
7138 G04
ILOAD = 1mA
ILOAD = 30mA
ILOAD = 400mA
FIGURE 13 CIRCUIT
TEMPERATURE (°C)
–55
798
THRESHOLD VOLTAGE (mV)
799
800
801
802
–25 5 35 65
7138 G05
95 125
155
TEMPERATURE (°C)
–55
RUN OR OVLO THRESHOLD VOLTAGE (V)
1.20
1.22
1.24
35 95
7138 G06
1.18
1.16
1.14
1.12
1.10
–25 5 65 125
155
1.08
1.06
RISING
FALLING
0.1 100
1000
101
FIGURE 13 CIRCUIT
VIN = 12V
VIN = 48V
VIN = 140V
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
7138 G02
00.1 100
1000
101
FIGURE 13 CIRCUIT
VIN = 12V
VIN = 48V
VIN = 140V
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
7138 G03
0
R
ISET
(kΩ)
0
25
50
75
100
125
150
175
200
225
0
100
200
300
400
500
600
700
THRESHOLD (mA)
7138 G07
PEAK CURRENT
VALLEY CURRENT
TEMPERATURE (°C)
–55
–25
5
35
65
95
125
155
0
100
200
300
400
500
600
700
THRESHOLD (mA)
7138 G08
PEAK CURRENT I
SET
OPEN
VALLEY CURRENT I
SET
OPEN
PEAK CURRENT I
SET
GND
VALLEY CURRENT I
SET
GND
V
IN
VOLTAGE (V)
0
30
60
90
120
150
0
100
200
300
400
500
600
700
THRESHOLD (mA)
7138 G09
PEAK CURRENT I
SET
Open
VALLEY CURRENT I
SET
Open
PEAK CURRENT I
SET
GND
VALLEY CURRENT I
SET
GND
LTC7138
5
7138f
For more information www.linear.com/LTC7138
Typical perForMance characTerisTics
Switch On-Resistance
vs Input Voltage
Switch On-Resistance
vs Temperature Load Step Transient Response
Quiescent Supply Current
vs Input Voltage
Operating Waveforms, VIN = 48V
Quiescent Supply Current
vs Temperature
Operating Waveforms, VIN = 140V
Switch Pin Current
vs Temperature
Short-Circuit and Recovery
VIN VOLTAGE (V)
0
0
V
IN
SUPPLY CURRENT (µA)
15
60 90
7138 G10
10
5
30 120
150
SLEEP
SHUTDOWN
VIN VOLTAGE (V)
1.0
SWITCH ON-RESISTANCE (Ω)
2.0
1.5
2.5
3.0
7138 G13
060 90
30 120
150
TEMPERATURE (°C)
–55
SWITCH ON-RESISTANCE (Ω)
35
7138 G14
2
–25 5 65
0
1
4
3
95 125
155
ISW = 250mA
TEMPERATURE (°C)
–55 –25
0
V
IN
SUPPLY CURRENT (µA)
10
35
30
25
565 95
7138 G11
5
20
15
35 125
155
VIN = 140V
SLEEP
SHUTDOWN
TEMPERATURE (°C)
–55
SWITCH PIN CURRENT (µA)
35
7138 G12
–5
–25 5 65
–15
15
10
5
0
–10
95 125
155
VIN = 140V
SLEEP MODE
SW = 0.8V
CURRENT INTO SW
SW = 0V
CURRENT OUT OF SW
OUTPUT
VOLTAGE
100mV/DIV
LOAD
CURRENT
200mA/DIV
200µs/DIVVIN = 48V
VOUT = 3.3V
10mA TO 400mA LOAD STEP
FIGURE 14 CIRCUIT
7138 G15
OUTPUT
VOLTAGE
100mV/DIV
SWITCH
VOLTAGE
20V/DIV
INDUCTOR
CURRENT
500mA/DIV
10µs/DIVVIN = 48V
VOUT = 3.3V
IOUT = 300mA
FIGURE 14 CIRCUIT
7138
G16
OUTPUT
VOLTAGE
100mV/DIV
SWITCH
VOLTAGE
50V/DIV
INDUCTOR
CURRENT
500mA/DIV
10µs/DIVVIN = 140V
VOUT = 3.3V
IOUT = 300mA
FIGURE 14 CIRCUIT
7138
G17
OUTPUT
VOLTAGE
1V/DIV
INDUCTOR
CURRENT
500mA/DIV
500µs/DIV
FIGURE 14 CIRCUIT
7138
G18
LTC7138
6
7138f
For more information www.linear.com/LTC7138
pin FuncTions
SW (Pin 1): Switch Node Connection to Inductor and
Catch Diode Cathode. This pin connects to the drain of
the internal power MOSFET switch.
VIN (Pin 3): Main Supply Pin. A ceramic bypass capacitor
should be tied between this pin and GND.
FBO (Pin 5): Feedback Comparator Output. Connect to the
VFB pins of additional LTC7138s to combine the output
current. The typical pull-up current is 20µA. The typical pull-
down impedance is 70Ω. See Applications Information.
VPRG2, VPRG1 (Pins 6, 7): Output Voltage Selection. Short
both pins to ground for a resistive divider programmable
output voltage. Short VPRG1 to SS and short VPRG2 to
ground for a 5V output voltage. Short VPRG1 to ground
and short VPRG2 to SS for a 3.3V output voltage. Short
both pins to SS for a 1.8V output voltage.
GND (Pin 8, Exposed Pad Pin 17): Ground. The exposed
pad must be soldered to the PCB ground plane for rated
electrical and thermal performance.
VFB (Pin 9): Output Voltage Feedback. When configured
for an adjustable output voltage, connect to an external
resistive divider to divide the output voltage down for
comparison to the 0.8V reference. For the fixed output
configuration, directly connect this pin to the output.
SS (Pin 10): Soft-Start Control Input. A capacitor to
ground at this pin sets the output voltage ramp time. A
50µA current initially charges the soft-start capacitor until
switching begins, at which time the current is reduced to
its nominal value of 5µA. The output voltage ramp time
from zero to its regulated value is 1ms for every 6.25nF
of capacitance from SS to GND. If left floating, the ramp
time defaults to an internal 1ms soft-start.
ISET (Pin 11): Peak Current Set Input. A resistor from this
pin to ground sets the peak current comparator threshold.
Leave floating for the maximum peak current (610mA typi-
cal) or short to ground for minimum peak current (170mA
typical). The valley current is typically 60% of the peak
current set by this pin. The maximum output current is
75% of the peak current. The 5µA current that is sourced
out of this pin when switching is reduced to 1µA in sleep.
Optionally, a capacitor can be placed from this pin to GND
to trade off efficiency for light load output voltage ripple.
See Applications Information.
OVLO (Pin 12): Overvoltage Lockout Input. Connect to
the input supply through a resistor divider to set the over-
voltage lockout level. A voltage on this pin above 1.21V
disables the internal MOSFET switch. Normal operation
resumes when the voltage on this pin decreases below
1.10V. Exceeding the OVLO lockout threshold triggers a
soft-start reset, resulting in a graceful recovery from an
input supply transient. This pin must be grounded if the
OVLO is not used.
RUN (Pin 14): Run Control Input. A voltage on this pin
above 1.21V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC7138, reducing quiescent
current to approximately 1.4µA. Optionally, connect to
the input supply through a resistor divider to set the
undervoltage lockout.
ANODE (Pin 16): Catch Diode Anode Sense. This pin is the
anode connection for the catch diode. An internal sense
resistor is connected between this pin and the exposed
pad ground.
LTC7138
7
7138f
For more information www.linear.com/LTC7138
block DiagraM
COUT
CIN
VIN
V
OUT
+
–
+
–
+
–
+
3
D1
–
+
–
+
+
PEAK CURRENT
COMPARATOR
VALLEY CURRENT
COMPARATOR
FEEDBACK
COMPARATOR VOLTAGE
REFERENCE
VPRG2
GND
GND
SS
SS
VPRG1
GND
SS
GND
SS
R1
1.0M
4.2M
2.5M
1.0M
R2
∞
800k
800k
800k
VOUT
ADJUSTABLE
5V FIXED
3.3V FIXED
1.8V FIXED
START-UP: 50µA
NORMAL: 5µA
IMPLEMENT DIVIDER
EXTERNALLY FOR
ADJUSTABLE VERSION
VIN
1
SW L1
ANODE
ISET
LOGIC
16
SS
R2
R1
5V
5V
20µA
FBO
70Ω 10
5
GND
8
GND 17
VFB 9
VPRG1 7
VPRG2
7138 BD
6
0.800V
OVLO
1.21V
12
1.21V
RUN
14
ISET
11
ACTIVE: 5µA
SLEEP: 1µA
1.3V
+
LTC7138
8
7138f
For more information www.linear.com/LTC7138
operaTion
The LTC7138 is a step-down DC/DC regulator with internal
power switch that uses Burst Mode control, combining
low quiescent current with high switching frequency,
which results in high efficiency across a wide range of
load currents. Burst Mode operation functions by us-
ing short “burst” cycles to switch the inductor current
through the internal power MOSFET, followed by a sleep
cycle where the power switch is off and the load current
is supplied by the output capacitor. During the sleep cycle,
the LTC7138 draws only 12µA of supply current. At light
loads, the burst cycles are a small percentage of the total
cycle time which minimizes the average supply current,
greatly improving efficiency. Figure 1 shows an example
of Burst Mode operation. The switching frequency is de-
pendent on the inductor value, peak current, input voltage
and output voltage.
External feedback resistors (adjustable mode) can be used
by connecting both VPRG1 and VPRG2 to ground.
In adjustable mode the feedback comparator monitors
the voltage on the VFB pin and compares it to an internal
800mV reference. If this voltage is greater than the refer-
ence, the comparator activates a sleep mode in which
the power switch and current comparators are disabled,
reducing the VIN pin supply current to only 12µA. As the
load current discharges the output capacitor, the voltage
on the VFB pin decreases. When this voltage falls 5mV
below the 800mV reference, the feedback comparator
trips and enables burst cycles.
At the beginning of the burst cycle, the internal high side
power switch (P-channel MOSFET) is turned on and the
inductor current begins to ramp up. The inductor current
increases until either the current exceeds the peak cur-
rent comparator threshold or the voltage on the VFB pin
exceeds 800mV, at which time the switch is turned off
and the inductor current is carried by the external catch
diode. The inductor current, then sensed through the
ANODE pin, ramps down until the current falls below the
valley current comparator threshold. If the voltage on the
VFB pin is still less than the 800mV reference, the power
switch is turned on again and another cycle commences.
The average current during a burst cycle will normally be
greater than the average load current. For this architecture,
the maximum average output current is equal to 75% of
the peak current.
The hysteretic nature of this control architecture results
in a switching frequency that is a function of the input
voltage, output voltage, and inductor value. This behavior
provides inherent short-circuit protection. If the output is
shorted to ground, the inductor current will decay very
slowly during a single switching cycle. Since the high side
switch turns on only when the inductor current is below
the valley current trip threshold, the LTC7138 inherently
switches at a lower frequency during start-up or short-
circuit conditions.
BURST
FREQUENCY
INDUCTOR
CURRENT
OUTPUT
VOLTAGE
∆V
OUT 7138 F01
BURST
CYCLE
SLEEP
CYCLE SWITCHING
FREQUENCY
Figure 1. Burst Mode Operation
Main Control Loop
The LTC7138 uses the VPRG1 and VPRG2 control pins to
connect internal feedback resistors to the VFB pin. This
enables fixed outputs of 1.8V, 3.3V or 5V without increas-
ing component count, input supply current or exposure to
noise on the sensitive input to the feedback comparator.
(Refer to Block Diagram)
LTC7138
9
7138f
For more information www.linear.com/LTC7138
Start-Up and Shutdown
If the voltage on the RUN pin is less than 0.7V, the LTC7138
enters a shutdown mode in which all internal circuitry is
disabled, reducing the DC supply current to 1.4µA. When the
voltage on the RUN pin exceeds 1.21V, normal operation of
the main control loop is enabled. The RUN pin comparator
has 110mV of internal hysteresis, and therefore must fall
below 1.1V to disable the main control loop.
An internal 1ms soft-start function limits the ramp rate of
the output voltage on start-up to prevent excessive input
supply droop. If a longer ramp time and consequently less
supply droop is desired, a capacitor can be placed from the
SS pin to ground. The 5µA current that is sourced out of
this pin will create a smooth voltage ramp on the capacitor.
If this ramp rate is slower than the internal 1ms soft-start,
then the output voltage will be limited by the ramp rate on
the SS pin. The internal and external soft-start functions
are reset on start-up, after an undervoltage or overvoltage
event on the input supply, and after an overtemperature
shutdown.
Peak Inductor Current Programming
The peak current comparator nominally limits the peak
inductor current to 610mA. This peak inductor current
can be adjusted by placing a resistor from the ISET pin to
ground. The 5µA current sourced out of this pin through
the resistor generates a voltage that adjusts the peak cur-
rent comparator threshold. The valley current threshold
tracks the peak current threshold setting, and is typically
60% of the peak current.
During sleep mode, the current sourced out of the ISET pin
is reduced to 1µA. The ISET current is increased back to 5µA
on the first switching cycle after exiting sleep mode. The
ISET current reduction in sleep mode, along with adding
a filtering network, RISET and CISET, from the ISET pin to
ground, provides a method of reducing light load output
voltage ripple at the expense of lower efficiency and slightly
degraded load step transient response.
For applications requiring higher output current, the
LTC7138 provides a feedback comparator output pin (FBO)
for combining the output current of multiple LTC7138s.
operaTion
By connecting the FBO pin of a master LTC7138 to the VFB
pin of one or more slave LTC7138s, the output currents
can be combined to source 400mA times the number of
LTC7138s.
Dropout Operation
When the input supply decreases toward the output sup-
ply, the duty cycle increases to maintain regulation. The
P-channel MOSFET switch in the LTC7138 allows the duty
cycle to increase all the way to 100%. At 100% duty cycle,
the P-channel MOSFET stays on continuously, providing
output current equal to the peak current, which is greater
than the maximum load current when not in dropout.
Input Voltage and Overtemperature Protection
When using the LTC7138, care must be taken not to exceed
any of the ratings specified in the Absolute Maximum Rat-
ings section. As an added safeguard, however, the LTC7138
incorporates an overtemperature shutdown feature. If the
junction temperature reaches approximately 180°C, the
LTC7138 will enter thermal shutdown mode. The power
switch will be turned off and the SW node will become high
impedance. After the part has cooled below 160°C, it will
restart. The overtemperature level is not production tested.
The LTC7138 additionally implements protection features
which inhibit switching when the input voltage is not within
a programmable operating range. By use of a resistive
divider from the input supply to ground, the RUN and
OVLO pins serve as a precise input supply voltage moni-
tor. Switching is disabled when either the RUN pin falls
below 1.1V or the OVLO pin rises above 1.21V, which can
be configured to limit switching to a specific range of input
supply voltage. Furthermore, if the input voltage falls below
3.5V typical (3.8V maximum), an internal undervoltage
detector disables switching.
When switching is disabled, the LTC7138 can safely sustain
input voltages up to the absolute maximum rating of 140V.
Input supply undervoltage or overvoltage events trigger a
soft-start reset, which results in a graceful recovery from
an input supply transient.
(Refer to Block Diagram)
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The basic LTC7138 application circuit is shown on the front
page of this data sheet. External component selection is
determined by the maximum load current requirement and
begins with the selection of the peak current programming
resistor, RISET. The inductor value L can then be determined,
followed by capacitors CIN and COUT.
Maximum Output Current
The maximum average output current is determined by
the peak current trip threshold and the valley current trip
threshold. With the ISET pin open, the peak current com-
parator has a minimum threshold of 540mA. The valley
current comparator has a minimum threshold of 50%
of the peak current, or 270mA. At maximum load, the
inductor current ramps between the peak and valley cur-
rent thresholds, which results in a maximum load current
that is the average of the two, or 405mA. For applications
that demand less current, the peak current threshold can
be reduced to as low as 140mA, which provides 100mA
average output current. This lower peak current allows the
efficiency and component selection to be optimized for
lower current applications. For applications that require
more than 400mA, multiple LTC7138s can be connected
in parallel using the FBO pin. See the Higher Current Ap-
plications section for more information.
The peak current threshold is linearly proportional to the
voltage on the ISET pin, with 280mV and 1V corresponding
to 140mA and 540mA peak current, respectively. The valley
current threshold correspondingly changes with the volt-
age on the ISET pin to remain at 50% of the programmed
peak current. This pin may be driven by an external volt-
age source to modulate the peak current, which may be
beneficial in some applications. Usually, the peak current is
programmed with an appropriately chosen resistor (RISET)
between the ISET pin and ground. The voltage generated on
the ISET pin by RISET and the internal 5µA current source
sets the peak current. The value of resistor to achieve a
maximum average output current can be computed by
using Figure 2 or the following equation:
RISET =IOUT(MAX) •
1kΩ
2mA
where 100mA < IOUT(MAX) < 405mA. This equation gives
the maximum load current supplied using the minimum
peak and valley current. For inductor selection, the maxi-
mum peak current can then be approximated for a given
RISET resistor value as:
IPEAK(MAX) ≈RISET •
3.3mA
1kΩ
+30mA
The peak current is internally limited to be within the range
of 140mA to 540mA. Shorting the ISET pin to ground pro-
grams the current limit to 140mA (100mA average output
current), and leaving it floating sets the current limit to the
maximum value of 540mA (405mA average output current).
The internal 5µA current source is reduced to 1µA in sleep
mode to maximize efficiency and to facilitate a trade-off
between efficiency and light load output voltage ripple, as
described in the Optimizing Output Voltage Ripple section.
Inductor Selection
For the LTC7138, which has relatively low output current
and very high input voltage, switching losses typically
dominate the power loss equation. For this architecture,
higher inductor values lower the switching frequency
which decreases switching loss at the expense of higher
DC resistance and lower saturation current. Therefore
choosing the largest inductor value that satisfies both
Figure 2. RISET Selection
RISET (kΩ)
0
CURRENT (mA)
200
300
400
500
800
700
600
25 75 100 125
7138 F02
100
050 150 175
250
225200
MAXIMUM PEAK
INDUCTOR
CURRENT
MAXIMUM
LOAD
CURRENT
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board area and saturation current requirements yields the
highest efficiency in most LTC7138 applications.
A good first choice for the inductor can be calculated
based on the maximum operating input voltage and the
ISET pin resistor. If the ISET pin is shorted to ground or
left open, use 50k or 200k respectively for RISET in the
following equation.
L=220µH•
V
IN(MAX)
150V •200kΩ
RISET
An additional constraint on the inductor value is the
LTC7138’s 150ns minimum switch on-time. Therefore, in
order to avoid excessive overshoot in the inductor current,
the inductor value must be chosen so that it is larger than
a minimum value which can be computed as follows:
L>
V
IN(MAX)
•150ns
I
PEAK
•0.3 •1.2
where VIN(MAX) is the maximum input supply voltage
when switching is enabled, IPEAK is the peak current, and
the factor of 1.2 accounts for typical inductor tolerance
and variation over temperature. With the ISET pin open,
this minimum inductor value is approximately equal to
VIN(MAX) • 1µH/V.
Although the previous equation provides a minimum in-
ductor value, higher efficiency is typically achieved with a
larger inductor value, which produces a lower switching
frequency. The recommended range of inductor values
for small surface mount inductors as a function of peak
current is shown in Figure 3. For applications where board
area is not a limiting factor, inductors with larger cores
can be used, which extends the recommended range of
Figure 3 to larger values.
For applications that have large input supply transients,
the OVLO pin can be used to disable switching above the
maximum operating voltage VIN(MAX) so that the minimum
inductor value is not artificially limited by a transient
condition. Inductor values that violate the above equation
will cause the peak current to overshoot and permanent
damage to the part may occur.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency regulators generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but is very dependent of the inductance selected.
As the inductance increases, core losses decrease. Un-
fortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates “hard,” which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequently output voltage
ripple. Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate energy but generally cost more
than powdered iron core inductors with similar charac-
Figure 3. Recommended Inductor Values for Maximum Efficiency
PEAK INDUCTOR CURRENT (mA)
100
10
100
INDUCTOR VALUE (µH)
1000
10000
1000
7138 F03
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teristics. The choice of which style inductor to use mainly
depends on the price versus size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
TDK, Toko, and Sumida.
Catch Diode Selection
The catch diode (D1 from Block Diagram) conducts current
only during the switch off time. Average forward current
in normal operation can be calculated from:
ID(AVG) =IOUT
V
IN
– V
OUT
V
IN
where IOUT is the output load current. The maximum av-
erage diode current occurs with a shorted output at the
high line. For this worst-case condition, the diode current
will approach 75% of the programmed peak current. The
diode reverse voltage rating should be greater than the
maximum operating input voltage. When the OVLO pin is
used to limit the maximum operating input voltage, the
diode reverse voltage should be greater than the OVLO
pin setting, but may be lower than the maximum input
voltage during overvoltage lockout.
For high efficiency at full load, it is important to select a
catch diode with a low reverse recovery time and low for-
ward voltage drop. As a result, Schottky diodes are often
used as catch diodes. However, Schottky diodes generally
exhibit much higher leakage than silicon diodes. In sleep,
the catch diode leakage current will appear as load current,
and may significantly reduce light load efficiency. Diodes
with low leakage often have larger forward voltage drops
at a given current, so a trade-off can exist between light
load and full load efficiency.
The selection of Schottky diodes with high reverse voltage
ratings is limited relative to that of silicon diodes. There-
fore, for low reverse leakage and part availability, some
applications may prefer a silicon diode. If a silicon diode
is necessary, be sure to select a diode with a specified low
reverse recovery time to maximize efficiency.
CIN and COUT Selection
The input capacitor, CIN, is needed to filter the trapezoidal
current at the source of the high side MOSFET. CIN should
be sized to provide the energy required to magnetize the
inductor without causing a large decrease in input voltage
(∆VIN). The relationship between CIN and ∆VIN is given by:
CIN >
L•I
PEAK2
2•V
IN
•∆V
IN
It is recommended to use a larger value for CIN than
calculated by the previous equation since capacitance
decreases with applied voltage. In general, a 1µF X7R ce-
ramic capacitor is a good choice for CIN in most LTC7138
applications.
To prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by:
IRMS =IOUT(MAX) •VOUT
VIN
•VIN
VOUT
–1
This formula has a maximum at VIN = 2VOUT, where IRMS =
IOUT/2. This simple worst-case condition is commonly used
for design because even significant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based only on 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design.
The output capacitor, COUT, filters the inductor’s ripple
current and stores energy to satisfy the load current when
the LTC7138 is in sleep. The output ripple has a lower limit
of VOUT/160 due to the 5mV typical hysteresis of the feed-
back comparator. The time delay of the comparator adds
an additional ripple voltage that is a function of the load
current. During this delay time, the LTC7138 continues to
switch and supply current to the output. The output ripple
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at light load can be approximated by:
∆VOUT ≈IPEAK
2–ILOAD
•4•10–6
COUT
+VOUT
160
The output ripple is a maximum at no load and approaches
lower limit of VOUT/160 at full load. Choose the output
capacitor COUT to limit the output voltage ripple ∆VOUT
using the following equation:
COUT ≥IPEAK •2•10–6
∆VOUT –VOUT
160
The value of the output capacitor must also be large enough
to accept the energy stored in the inductor without a large
change in output voltage during a single switching cycle.
Setting this voltage step equal to 1% of the output voltage,
the output capacitor must be:
COUT >L
2•IPEAK
VOUT
2
•100%
1%
Typically, a capacitor that satisfies the voltage ripple re-
quirement is adequate to filter the inductor ripple. To avoid
overheating, the output capacitor must also be sized to
handle the ripple current generated by the inductor. The
worst-case ripple current in the output capacitor is given
by IRMS = IPEAK/2. Multiple capacitors placed in parallel
may be needed to meet the ESR and RMS current handling
requirements.
Dry tantalum, special polymer, aluminum electrolytic,
and ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important only to use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR but
can be used in cost-sensitive applications provided that
consideration is given to ripple current ratings and long-
term reliability. Ceramic capacitors have excellent low ESR
characteristics but can have high voltage coefficient and
audible piezoelectric effects. The high quality factor (Q)
of ceramic capacitors in series with trace inductance can
also lead to significant input voltage ringing.
Input Voltage Steps
If the input voltage falls below the regulated output voltage,
the body diode of the internal MOSFET will conduct current
from the output supply to the input supply. If the input
voltage falls rapidly, the voltage across the inductor will be
significant and may saturate the inductor. A large current
will then flow through the MOSFET body diode, resulting
in excessive power dissipation that may damage the part.
If rapid voltage steps are expected on the input supply, put
a small silicon or Schottky diode in series with the VIN pin
to prevent reverse current and inductor saturation, shown
below as D1 in Figure 4. The diode should be sized for a
reverse voltage of greater than the regulated output volt-
age, and to withstand repetitive currents higher than the
maximum peak current of the LTC7138.
Figure 4. Preventing Current Flow to the Input
SW
INPUT
SUPPLY
LTC7138
COUT
7138 F04
CIN
V
OUT
VIN L
D1
Ceramic Capacitors and Audible Noise
Higher value, lower cost ceramic capacitors are now be-
coming available in smaller case sizes. Their high ripple
current, high voltage rating, and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
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VFB
V
OUT
R2
7138 F06
0.8V R1
VPRG1
VPRG2
LTC7138
Figure 6. Setting the Output Voltage with External Resistors
applicaTions inForMaTion
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
VIN. At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
a voltage spike at VIN large enough to damage the part.
For applications with inductive source impedance, such
as a long wire, a series RC network may be required in
parallel with CIN to dampen the ringing of the input supply.
Figure 5 shows this circuit and the typical values required
to dampen the ringing. Refer to Application Note 88 for ad-
ditional information on suppressing input supply transients.
Ceramic capacitors are also piezoelectric. The LTC7138’s
burst frequency depends on the load current, and in some
applications the LTC7138 can excite the ceramic capaci-
tor at audio frequencies, generating audible noise. This
noise is typically very quiet to a casual ear; however, if the
noise is unacceptable, use a high performance tantalum
or electrolytic capacitor at the output.
Output Voltage Programming
The LTC7138 has three fixed output voltage modes and
an adjustable mode that can be selected with the VPRG1
and VPRG2 pins. The fixed output modes use an internal
feedback divider which enables higher efficiency, higher
noise immunity, and lower output voltage ripple for 5V,
3.3V, and 1.8V applications. To select the fixed 5V output
voltage, connect VPRG1 to SS and VPRG2 to GND. For 3.3V,
connect VPRG1 to GND and VPRG2 to SS. For 1.8V, connect
both VPRG1 and VPRG2 to SS. For any of the fixed output
voltage options, directly connect the VFB pin to VOUT.
For the adjustable output mode (VPRG1 = VPRG2 = GND),
the output voltage is set by an external resistive divider
according to the following equation:
VOUT =0.8V •1+
R1
R2
The resistive divider allows the VFB pin to sense a fraction
of the output voltage as shown in Figure 6. The output
voltage can range from 0.8V to VIN. Be careful to keep
the divider resistors very close to the VFB pin to minimize
noise pick-up on the sensitive VFB trace.
R
=LIN
CIN
4 • CIN
CIN
LIN
7138
F05
VIN
LTC7138
Figure 5. Series RC to Reduce VIN Ringing
To minimize the no-load supply current, resistor values in
the megohm range may be used; however, large resistor
values should be used with caution. The feedback divider
is the only load current when in shutdown. If PCB leakage
current to the output node or switch node exceeds the load
current, the output voltage will be pulled up. In normal
operation, this is generally a minor concern since the load
current is much greater than the leakage.
To avoid excessively large values of R1 in high output volt-
age applications (VOUT ≥ 10V), a combination of external
and internal resistors can be used to set the output volt-
age. This has an additional benefit of increasing the noise
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The RUN and OVLO pins can alternatively be configured
as precise undervoltage (UVLO) and overvoltage (OVLO)
lockouts on the VIN supply with a resistive divider from
VIN to ground. A simple resistive divider can be used as
shown in Figure 9 to meet specific VIN voltage requirements.
4.2M
R1
5V
R2
7138 F07
V
OUT
800k
0.8V
VFB
SS
VPRG1
VPRG2
LTC7138
Figure 7. Setting the Output Voltage with
External and Internal Resistors
RUN
SUPPLY LTC7138
RUN
7138
F08
4.7M
1k
V
IN
LTC7138
1k
Figure 8. RUN Pin Interface to Logic
Figure 9. Adjustable UV and OV Lockout
RUN
7138
F09
R3
V
IN
LTC7138
R4
R5
OVLO
immunity on the VFB pin. Figure 7 shows the LTC7138
with the VFB pin configured for a 5V fixed output with an
external divider to generate a higher output voltage. The
internal 5M resistance appears in parallel with R2, and the
value of R2 must be adjusted accordingly. R2 should be
chosen to be less than 200k to keep the output voltage
variation less than 1% due to the tolerance of the LTC7138’s
internal resistor.
The current that flows through the R3-R4-R5 divider will
directly add to the shutdown, sleep, and active current of
the LTC7138, and care should be taken to minimize the
impact of this current on the overall efficiency of the ap-
plication circuit. Resistor values in the megohm range may
be required to keep the impact on quiescent shutdown and
sleep currents low. To pick resistor values, the sum total
of R3 + R4 + R5 (RTOTAL) should be chosen first based
on the allowable DC current that can be drawn from VIN.
The individual values of R3, R4 and R5 can then be cal-
culated from the following equations:
R5=RTOTAL •
1.21V
Rising VIN OVLO Threshold
R4=RTOTAL •1.21V
Rising VIN UVLO Threshold –R5
R3=RTOTAL –R5–R4
For applications that do not need a precise external OVLO,
the OVLO pin should be tied directly to ground. The RUN
pin in this type of application can be used as an external
UVLO using the previous equations with R5 = 0Ω.
RUN Pin and Overvoltage/Undervoltage Lockout
The LTC7138 has a low power shutdown mode controlled
by the RUN pin. Pulling the RUN pin below 0.7V puts the
LTC7138 into a low quiescent current shutdown mode
(IQ ~ 1.4µA). When the RUN pin is greater than 1.21V,
switching is enabled. Figure 8 shows examples of con-
figurations for driving the RUN pin from logic.
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Similarly, for applications that do not require a precise
UVLO, the RUN pin can be tied to VIN. In this configuration,
the UVLO threshold is limited to the internal VIN UVLO
thresholds as shown in the Electrical Characteristics table.
The resistor values for the OVLO can be computed using
the previous equations with R3 = 0Ω.
Be aware that the OVLO pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the OVLO pin from exceeding 6V, the following relation
should be satisfied:
VIN(MAX) •
R5
R3+R4+R5
<6V
If this equation cannot be satisfied in the application,
connect a 4.7V Zener diode between the OVLO pin and
ground to clamp the OVLO pin voltage.
Soft-Start
Soft-start is implemented by ramping the effective refer-
ence voltage from 0V to 0.8V. To increase the duration of
the soft-start, place a capacitor from the SS pin to ground.
An internal 5µA pull-up current will charge this capacitor.
The value of the soft-start capacitor can be calculated by
the following equation:
CSS =Soft-Start Time •
5µA
0.8V
The minimum soft-start time is limited to the internal
soft-start timer of 1ms. When the LTC7138 detects a
fault condition (input supply undervoltage/overvoltage or
overtemperature) or when the RUN pin falls below 1.1V,
the SS pin is quickly pulled to ground and the internal
soft-start timer is reset. This ensures an orderly restart
when using an external soft-start capacitor.
Note that the soft-start capacitor may not be the limiting
factor in the output voltage ramp. The maximum output
current, which is equal to half of the peak current, must
charge the output capacitor from 0V to its regulated value.
For small peak currents or large output capacitors, this
ramp time can be significant. Therefore, the output voltage
ramp time from 0V to the regulated VOUT value is limited
to a minimum of
Ramp Time ≥
1.33•C
OUT
I
PEAK
VOUT
Optimizing Output Voltage Ripple
After the peak current resistor and inductor have been
selected to meet the load current and frequency require-
ments, an optional capacitor, CISET can be added in parallel
with RISET to reduce the output voltage ripple dependency
on load current.
At light loads the output voltage ripple will be a maximum.
The peak inductor current is controlled by the voltage on
the ISET pin. The current out of the ISET pin is 5µA while
the LTC7138 is active and is reduced to 1µA during sleep
mode. The ISET current will return to 5µA on the first
switching cycle after sleep mode. Placing a parallel RC
network to ground on the ISET pin filters the ISET voltage
as the LTC7138 enters and exits sleep mode, which in turn
will affect the output voltage ripple, efficiency, and load
step transient performance.
Higher Current Applications
For applications that require more than 400mA, the
LTC7138 provides a feedback comparator output pin
(FBO) for driving additional LTC7138s. When the FBO pin
of a master LTC7138 is connected to the VFB pin of one
or more slave LTC7138s, the master controls the burst
cycle of the slaves.
Figure 10 shows an example of a 5V, 800mA regulator
using two LTC7138s. The master is configured for a 5V
fixed output with external soft-start and VIN UVLO/OVLO
levels set by the RUN and OVLO pins. Since the slave is
directly controlled by the master, its SS pin should be float-
ing, RUN should be tied to VIN, and OVLO should be tied
to ground. Furthermore, the slave should be configured
for a 1.8V fixed output (VPRG1 = VPRG2 = SS) to set the
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VFB
SW
L1
L2
VIN
RUN
R3
CIN COUT
V
OUT
5V
800mA
CSS
V
IN
R4
R5
OVLO
SS
VPRG1
VPRG2
FBO
LTC7138
(MASTER)
SW
ANODE
VFB
VIN
RUN
OVLO
SS
VPRG1
VPRG2
FBO
7138 F10
LTC7138
(SLAVE)
ANODE
D2
D1
Figure 10. 5V, 800mA Regulator
applicaTions inForMaTion
The junction temperature is given by:
TJ = TA + TR
Generally, the worst-case power dissipation is in dropout
at low input voltage. In dropout, the LTC7138 can provide
a DC current as high as the full 575mA peak current to the
output. At low input voltage, this current flows through a
higher resistance MOSFET, which dissipates more power.
As an example, consider the LTC7138 in dropout at an input
voltage of 5V, a load current of 610mA and an ambient
temperature of 85°C. From the Typical Performance graphs
of Switch On-Resistance, the RDS(ON) of the top switch
at VIN = 5V and 100°C is approximately 3.2Ω. Therefore,
the power dissipated by the part is:
PD = (ILOAD)2 • RDS(ON) = (610mA)2 • 3.2Ω = 1.19W
For the MSOP package the θJA is 40°C/W. Thus, the junc-
tion temperature of the regulator is:
TJ=85°C+1.19W •
40°C
W
=133°C
which is below the maximum junction temperature of
150°C.
Note that the while the LTC7138 is in dropout, it can provide
output current that is equal to the peak current of the part.
This can increase the chip power dissipation dramatically
and may cause the internal overtemperature protection
circuitry to trigger at 180°C and shut down the LTC7138.
Pin Clearance/Creepage Considerations
The LTC7138 MSE package has been uniquely designed to
meet high voltage clearance and creepage requirements.
Pins 2, 4, 13, and 15 are omitted to increase the spac-
ing between adjacent high voltage solder pads (VIN, SW,
and RUN) to a minimum of 0.657mm which is sufficient
for most applications. For more information, refer to the
printed circuit board design standards described in IPC-
2221 (www.ipc.org).
VFB pin threshold at 1.8V. The inductors L1 and L2 do not
necessarily have to be the same, but should both meet
the criteria described in the Inductor Selection section.
Thermal Considerations
In most applications, the LTC7138 does not dissipate much
heat due to its high efficiency. But, in applications where
the LTC7138 is running at high ambient temperature with
low supply voltage and high duty cycles, such as dropout,
the heat dissipated may exceed the maximum junction
temperature of the part.
To prevent the LTC7138 from exceeding the maximum
junction temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum junc-
tion temperature of the part. The temperature rise from
ambient to junction is given by:
TR = PD • θJA
Where PD is the power dissipated by the regulator and
θJA is the thermal resistance from the junction of the die
to the ambient temperature.
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Design Example
As a design example, consider using the LTC7138 in an
application with the following specifications: VIN = 36V to
72V (48V nominal), VOUT = 12V, IOUT = 400mA, and that
switching is enabled when VIN is between 30V and 90V.
First, calculate the inductor value:
L=220µH•
90V
150V
=132µH
Choose a 150µH inductor as a standard value. Next, verify
that this meets the LMIN requirement at the maximum
input voltage:
LMIN =
90V •150ns
0.610A •0.3
•1.2=89µH
Therefore, the minimum inductor requirement is satisfied
and the 150μH inductor value may be used.
Next, CIN and COUT are selected. For this design, CIN should
be sized for a current rating of at least:
IRMS =400mA •12V
36V
•36V
12V
–1≅189mARMS
The value of CIN is selected to keep the input from droop-
ing less than 1V at low line:
CIN >150µH•0.61A2
2•36V •1V
≅0.76µF
Since the capacitance of capacitors decreases with DC
bias, a 1µF capacitor should be chosen.
The catch diode should have a reverse voltage rating of
greater than the overvoltage lockout setting of 90V. It should
also be rated for an average forward current of at least:
ID(AVG) =400mA
90V –12V
90V
=347mA
For margin, select a catch diode with a reverse breakdown
of at least 100V and an average current of 400mA or higher.
COUT will be selected based on a value large enough to
satisfy the output voltage ripple requirement. For a 1%
output ripple (120mV), the value of the output capacitor
can be calculated from:
COUT ≥0.61A •2•10–6
120mV – 12V
160
≅27µF
COUT also needs an ESR that will satisfy the output voltage
ripple requirement. The required ESR can be calculated
from:
ESR<
120mV
0.61A
≅197mΩ
A 33µF ceramic capacitor has significantly less ESR than
197mΩ. The output voltage can now be programmed by
choosing the values of R1 and R2. Since the output volt-
age is higher than 10V, the LTC7138 should be set for a
5V fixed output with an external divider to divide the 12V
output down to 5V. R2 is chosen to be less than 200k to
keep the output voltage variation to less than 1% due
to the internal 5M resistor tolerance. Set R2 = 196k and
calculate R1 as:
R1=
12V – 5V
5V
•196kΩ5MΩ
( )
=264kΩ
Choose a standard value of 267k for R1.
LTC7138
19
7138f
For more information www.linear.com/LTC7138
applicaTions inForMaTion
The undervoltage and overvoltage lockout requirements
on VIN can be satisfied with a resistive divider from VIN to
the RUN and OVLO pins (refer to Figure 9). Choose R3 +
R4 + R5 = 2.5M to minimize the loading on VIN. Calculate
R3, R4 and R5 as follows:
R5=
1.21V •2.5MΩ
VIN _ OV(RISING)
=33.6k
R4=1.21V •2.5MΩ
VIN _UV(RISING)
–R5=67.2k
R3=2.5MΩ–R4–R5=2.4M
Since specific resistor values in the megohm range are
generally less available, it may be necessary to scale R3,
R4, and R5 to a standard value of R3. For this example,
choose R3 = 2.2M and scale R4 and R5 by 2.2M/2.4M.
Then, R4 = 61.6k and R5 = 30.8k. Choose standard values
of R3 = 2.2M, R4 = 62k, and R5 = 30.9k. Note that the fall-
ing thresholds for both UVLO and OVLO will be 10% less
than the rising thresholds, or 27V and 81V respectively.
The ISET pin should be left open in this example to select
maximum peak current (610mA). Figure 11 shows a
complete schematic for this design example.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC7138. Check the following in your layout:
1. Large switched currents flow in the power switch, catch
diode, and input capacitor. The loop formed by these
components should be as small as possible. A ground
plane is recommended to minimize ground impedance.
2. Connect the (+) terminal of the input capacitor, CIN, as
close as possible to the VIN pin. This capacitor provides
the AC current into the internal power MOSFET.
3. Keep the switching node, SW, away from all sensitive
small signal nodes. The rapid transitions on the switching
node can couple to high impedance nodes, in particular
VFB, and create increased output ripple.
7138 F11
VFB
ISET
FBO
SW
ANODE
150µH
VIN
RUN
2.2M 267k
196k
1µF 33µF
VOUT
12V
400mA
VIN
36V TO 72V
62k
30.9k
OVLO
VPRG2
LTC7138
SS
VPRG1
GND
Figure 11. 36V to 72V Input to 12V Output, 400mA Regulator
VFB
ANODE
ISET
SW
L1
VIN
RUN
R3 R1
D1
R2
CIN COUT
V
OUT
V
IN
R4
RISET
R5
OVLO
VPRG1
SS
VPRG2
LTC7138
GND
FBO
CSS
7138 F12
COUT VOUT
VIN
GND
GND
R3
RISET
CSS
R5
VIAS TO GROUND PLANE
VIAS TO INPUT SUPPLY (VIN)
VIAS TO OUTPUT SUPPLY (VOUT)
OUTLINE OF LOCAL GROUND PLANE
R4
R1R2
L1
CIN
D1
Figure 12. Example PCB Layout
LTC7138
20
7138f
For more information www.linear.com/LTC7138
VIN INPUT VOLTAGE (V)
0
EFFICIENCY (%)
85
90
100
95
150
120
7138 F13b
80
75
50
60
30 60 90
70
65
55
IOUT = 100mA
VOUT = 5V
VOUT = 3.3V
VOUT = 1.8V
VIN INPUT VOLTAGE (V)
0
MAXIMUM LOAD CURRENT (mA)
400
250
200
350
300
150
100
150
120
7138 TA04b
50 30 60 90
VOUT = –5V
VOUT = –15V
OUTPUT
VOLTAGE
500mV/DIV
10ms/DIV
7138
F14b
10Ω LOAD
L1: COILCRAFT MSS1278T-334KL
D1: DIODES INC PDS3200
*VOUT = VIN FOR VIN < 5V
7138 F13
VFB
ISET
SW
ANODE
L1
330µH
VIN
RUN
CIN
1µF
250V
X7R COUT
47µF
6.3V
X5R
VOUT*
5V
400mA
VIN
4V TO 140V
SS
OVLOVPRG1
VPRG2
LTC7138
GND
FBO
D1
Efficiency vs Input Voltage
Typical applicaTions
4V to 125V Input to –15V Output Positive-to-Negative Regulator
7138 F14
VFB
SS
SW
L1
150µH
VIN
RUN
CIN
1µF
250V
X7R COUT
100µF ×
2
6.3V
X5R
VOUT
3.3V
400mA
VIN
4V TO 140V
ISET
VPRG2
VPRG1
OVLO
LTC7138
GND
FBO
470nF
220pF*
L1: SUMIDA CDRH104RNP-151NC
D1: VISHAY U1D
*OPTIONAL COMPONENTS FOR LOWER LIGHT-LOAD OUTPUT VOLAGE RIPPLE
220k*
ANODE
D1
7138
TA04a
VFB
ISET
SW
ANODE
L1
220µH
VIN
RUN
CIN
1µF
250V
X7R
COUT
22µF
25V
X5R
V
OUT
–15V
VIN
4V TO 125V
SS
OVLOVPRG1
VPRG2
LTC7138
GND
FBO
200k
102k
MAXIMUM LOAD CURRENT ≈
V
IN
VIN +VOUT
•
3•I
PEAK
4
MAXIMUM INPUT VOLTAGE = 140 –|VOUT|
L1: TDK SLF12555-221MR72
D1: ST MICRO STTH102A
D1
Soft-Start Waveform
Maximum Load Current
vs Input Voltage
Figure 13. High Efficiency 400mA Regulator
Figure 14. 3.3V/400mA Regulator with 75ms Soft-Start
LTC7138
21
7138f
For more information www.linear.com/LTC7138
L1 CURRENT
500mA/DIV
VIN/VOUT
5V/DIV
L2 CURRENT
500mA/DIV
1s/DIV
7138
TA05b
VIN
VOUT
L1 CURRENT
500mA/DIV
VIN
50V/DIV
VOUT
10V/DIV
L2 CURRENT
500mA/DIV
200ms/DIV
7138
TA05c
TRANSIENT TO 140V
72V
VIN INPUT VOLTAGE (V)
30
EFFICIENCY (%)
85
90
100
95
150
120
7138 TA03b
80 60 90
PWM OPEN
VDIM OPEN
10W LED Driver
7138 TA03a
VFB
OVLO
SW
L1
100µH
VIN
CIN
1µF
250V
X7R
COUT
4.7µF
50V
X7R
VOUT
M1
25V LED
400mA
VIN
32V TO 140V
FBO
VPRG2
ISET
VDIM VPRG1
SS
RUN
LTC7138
GND
1M
42.2k
1M
27.4k
3.3V
PWM
L1: TDK SLF10145T-101M
D1: TOSHIBA CRH01
M1: VISHAY SILICONIX Si2356DS
VDIM = 0.1V TO 1V FOR 10:1 ANALOG DIMMING
PWM = SQUARE WAVE FOR DIGITAL DIMMING
30V OVERVOLTAGE PROTECTION ON V
OUT
D1
ANODE
Low Dropout Startup and
Shutdown
Overvoltage Lockout Operation
Efficiency vs Input Voltage
Typical applicaTions
7138 TA05a
VFB
ISET
SW
L1
100µH
VIN
RUN
CIN1
1µF
250V
X7R
CIN2
1µF
250V
X7R
COUT
47µF
16V
X5R
VOUT*
12V
800mA
VIN
4V TO 90V
UP TO 140V
TRANSIENT
SS
FBOVPRG1
VPRG2
OVLO
LTC7138
(MASTER)
GND
VFB
ISET
SW
L2
100µH
VIN
RUN
FBO
SS
VPRG2
VPRG1
OVLO ANODE
LTC7138
(SLAVE)
GND
1M
13.7k
267k
196k
L1/L2: WÜRTH 744 770 910 1
D1/D2: CENTRAL SEMI CMSH1-100M-LTN
*V
OUT
= V
IN
FOR V
IN
< 12V
D2
D1
ANODE
4V to 90V Input to 12V/800mA Output Regulator with Overvoltage Lockout
LTC7138
22
7138f
For more information www.linear.com/LTC7138
Typical applicaTions
36V to 140V to 36V/400mA with 120mA Input Current Limit
5V to 140V Input to 5V/400mA Output with 20kHz Minimum Switching Frequency
L1: TDK SLF12555T-101M1R1
D1: ROHM RF101L2S
7138 TA06a
VFB
SS
SW
L1
100µH
VIN
RUN
CIN
1µF
250V
X7R
COUT
4.7µF
50V
X7R
VOUT
36V
400mA*
VIN
36V TO 140V
ISET
OVLO
LTC7138
GND
FBO
220k
35.7k
R2
4.02k
R1
470k
VPRG1
VPRG2
I
NPUT CURRENT LIMIT =VOUT
2.5 •R2
R1+R2 •1+5µA •R1
VIN
≈VOUT
2.5 •R2
R1+R2
*
MAXIMUM LOAD CURRENT =VIN
36V
•120mA ≤400mA
D1
ANODE
Maximum Load and Input Current
vs Input Voltage
Input Current vs Load Current
Switching Frequency vs Load Current
7138 TA08a
VFB
SW
ANODE
L1
150µH
VIN
RUN
CIN
1µF
250V
COUT
22µF
VOUT
5V
400mA
VIN
5V TO 140V
VPRG1
VPRG2
OVLO
LTC7138
GND
ISET FBO
SS
953k 6.8Ω
2N7000
100k 175k
OUT
SET
V+
IN
DIV
LTC6994-1
GND
L1: COILTRONICS DR74-101-R
D1: DIODES INC MURS120-13-F
D1
VIN INPUT VOLTAGE (V)
40
MAXIMUM CURRENT (mA)
400
500
150
140130120110
7138 TA06b
050 807060 10090
200
300
100
MAXIMUM LOAD CURRENT
MAXIMUM INPUT CURRENT
0.1 100
1000
101
LOAD CURRENT (mA)
SWITCHING FREQUENCY (kHz)
100
1
10
7138 TA08b
0.01
0.1
WITHOUT FREQUENCY LIMIT
WITH FREQUENCY LIMIT
VIN = 48V
0.1 100
1000
101
LOAD CURRENT (mA)
INPUT CURRENT (mA)
100
1
10
7138 TA08c
0.01
0.1 WITHOUT FREQUENCY LIMIT
WITH FREQUENCY LIMIT
VIN = 48V
LTC7138
23
7138f
For more information www.linear.com/LTC7138
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
MSOP (MSE16(12)) 0213 REV D
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
1.0
(.039)
BSC
1.0
(.039)
BSC
16
16 14 121110
1 3 5 6 7 8
9
9
18
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ±0.038
(.0120
±.0015)
TYP
0.50
(.0197)
BSC
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
0.1016 ±0.0508
(.004 ±.002)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.280 ±0.076
(.011 ±.003)
REF
4.90 ±0.152
(.193 ±.006)
DETAIL “B”
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.12 REF
0.35
REF
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev D)
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC7138
24
7138f
For more information www.linear.com/LTC7138
LINEAR TECHNOLOGY CORPORATION 2015
LT 0115 • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC7138
relaTeD parTs
Typical applicaTion
12V/400mA Automotive Supply
*VOUT ≅ VIN FOR VIN < 12V
VOUT
12V*
400mA
7138 TA07
VFB
ISET
SW
ANODE
L1
220µH
VIN
RUN
CIN
1µF
250V
X7R
COUT
22µF
16V
X7R
VIN
4V TO 140V
SS
OVLOVPRG1
VPRG2
LTC7138
GND
FBO
267k
196k
L1: COILCRAFT MSS1246T-224KL
D1: DIODES INC SBR1U200P1-7
D1
PART NUMBER DESCRIPTION COMMENTS
LTC3638 140V, 250mA Micropower Step-Down DC/DC Regulator VIN: 4V to 140V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 1.4µA,
MS16E Package
LTC3639 150V
, 100mA Synchronous Micropower Step-Down
DC/DC Regulator VIN: 4V to 150V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 1.4µA,
MS16E Package
LTC3637 76V
, 1A High Efficiency Step-Down DC/DC Regulator VIN: 4V to 76V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3mm × 5mm DFN16, MSOP16E Packages
LTC3630A 76V
, 500mA Synchronous Step-Down DC/DC Regulator VIN: 4V to 76V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 5µA,
3mm × 5mm DFN16, MSOP16E Packages
LTC3810 100V Synchronous Step-Down DC/DC Controller VIN: 6.4V to 100V, VOUT(MIN) = 0.8V, IQ = 2mA, ISD < 240µA,
SSOP28 Package
LTC3631/LTC3631-3.3
LTC3631-5 45V (Transient to 60V), 100mA Synchronous Step-Down
DC/DC Regulator VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD < 3µA,
3mm × 3mm DFN8, MSOP8 Packages
LTC3642 45V (Transient to 60V), 50mA Synchronous Step-Down
DC/DC Regulator VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD < 3µA,
3mm × 3mm DFN8, MSOP8 Packages
LTC3632 50V (Transient to 60V), 20mA Synchronous Step-Down
DC/DC Regulator VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD < 3µA,
3mm × 3mm DFN8, MSOP8 Packages
LTC3891 60V Synchronous Step-Down DC/DC Controller with
Burst Mode Operation VIN: 4V to 60V, VOUT(MIN) = 0.8V, IQ = 50µA, ISD < 14µA,
3mm × 4mm QFN20, TSSOP20E Packages
LTC4366-1/LTC4366-2 High Voltage Surge Stopper VIN: 9V to >500V, Adjustable Output Clamp Voltage, ISD < 14µA,
2mm × 3mm DFN8, TSOT-8 Packages
Efficiency and Power Loss vs
Load Current
VIN = 24V
VIN = 48V
VIN = 120V
LOAD CURRENT (mA)
30
EFFICIENCY (%)
POWER LOSS (mW)
90
100
20
10
80
50
70
10
1
100
60
40
7138 TA07b
0
EFFICIENCY
POWER LOSS
1000
0.1 100 1000101
