©2004 Fairchild Semiconductor Corporation Rev. A, April 2004
U1898
Absolute Maximum Ratings*
T
a
=25°C unless otherwise noted
* This ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES:
1) These rating are based on a maximum junction temperature of 150 degrees C.
2) These are steady limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Electrical Characteristics
T
a
=25°C unless otherwise noted
* Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
Thermal Charac t eris ti cs
T
a
=25°C unless otherwise noted
Symbol Parameter Ratings Units
V
DG
Drain-Gate Volt age 40 V
V
GS
Gate-Source Volt age -40 V
I
GF
Forward Gate Current 50 mA
T
J
, T
STG
Operating and Storage Junction Temperature Range -55 ~ 150 °C
Symbol Parameter Test Condition Min. Max. Units
Off Characteristics
V
(BR)GS
Gate-Source Breakdown Volt age I
G
= 1.0 µA, V
DS
= 0 -40 V
V
GS(off)
Gate-Source Cutof f Voltage V
DS
= 20 V, I
D
= 1.0 nA -2.0 -7.0 V
I
DGO
Drain-Gate Leakage Current V
DG
= 20 V, I
S
= 0 -200 pA
On Characteristics
I
DSS
Zero-Gate Voltage Drain Current * V
DS
= 20 V, V
GS
= 0 15 mA
r
DS(on)
I
D
= 1.0 mA, V
GS
= 0 50 Ω
Small Signal Characteristics
r
ds(on)
Drain-Source On Resistance V
DS
= VGS = 0, f= 1.0 kHz 50 Ω
C
iss
Input Capacitance V
DS
= 20, V
GS
= 0, f = 1.0 MHz 16 pF
C
rss
Reverse Transfer Capacitance V
GS
= - 20 V, f = 1.0 MHz 5.0 pF
Switching Characteristics
t
on
Turn-On Time I
D(on)
= 6.0 mA 35 ns
t
off
Turn-Off Time V
GS(off)
= 6.0 V 60 ns
Symbol Parameter Max. Units
P
D
Total Device Dissipation
Derate above 25°C625
5.0 mW
mW/°C
R
θJC
Thermal Resistance, Junction to Case 125 °C/W
R
θJA
Thermal Resistance, Junction to Ambient 357 °C/W
U1898
N-Channel Switch
• This device is designed for low level analog switching, sample and
hold circuits and chopper stabalized amplifiers.
• Sourced from Process 51.
• See J111 for characteristics.
TO-92
1. Drain 2. So urce 3. Gate
1
Package Dimensions
U1898
Dimensions in Millimeters
Rev. A, April 2004©2004 Fairchild Semiconductor Corporation
0.46 ±0.10
1.27TYP
(R2.29)
3.86MAX
[1.27 ±0.20]1.27TYP
[1.27 ±0.20]
3.60 ±0.20
14.47 ±0.40
1.02 ±0.10
(0.25) 4.58 ±0.20
4.58 +0.25
–0.15
0.38 +0.10
–0.05
0.38 +0.10
–0.05
TO-92
©2004 Fairchild Semiconductor Corporation Rev. I10
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Design This datasheet contains the design specifications for
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