MIC9131 Micrel, Inc. MIC9131 High-Voltage, High-Speed Telecom DC-to-DC Controller General Description Features The MIC9131 is a current-mode PWM controller that efficiently converts -48V telecom voltages to logic levels. The MIC9131 features a high voltage start-up circuit that allows the device to be connected to input voltages as high as 180V. The high input voltage capability protects the MIC9131 from line transients that are common in telecom systems. The start-up circuitry also saves valuable board space and simplifies designs by integrating several external components. The MIC9131 is capable of high speed operation. Typically the MIC9131 can control a sub-25ns pulse width on the gate out pin. Its internal oscillator can operate over 2.5MHz, with even higher frequencies available through synchronisation. The high speed operation of the MIC9131 is made safe by the very fast, 34ns response from current sense to output, minimizing power dissipation in a fault condition. The MIC9131 allows for the designs of high efficiency power supplies. It can achieve efficiencies over 90% at high output currents. Its low 1.3mA quiescent current allows high efficiency even at light loads. The MIC9131 has a maximum duty cycle of 75%. For designs requiring a maximum duty cycle of 50%, refer to the MIC9130. The MIC9131 is available in a 16-pin SOP and 16-pin QSOP package options. The junction temperature range is from -40C to +125C. * * * * * * * * * * * * * * * * Typical Application Input voltages up to 180V Internal oscillator capable of > 2.5MHz operation Accurate 75% maximum duty cycle Synchronisation capability to 6MHz Current sense delay of 34ns Minimum pulse width of <25ns 90% efficiency 1.3mA quiescent current 1A shutdown current Soft-start Resistor programmable current sense threshold Selectable soft-start retry 4 sink, 12 source output driver Programmable under-voltage lockout Constant-frequency PWM current-mode control 16-pin SOIC and 16-pin QSOP Applications * * * * * * Telecom power supplies Line cards ISDN network terminators Micro- and pico-cell base stations Low power (< 100W) dc-dc converters DSL line cards 10 12V 1N5818 10F 25V 4:1 VIN 36V to 72V 6:1 0.1F 1M Si4884DY (x2) L = 530H B320A 7 FB 6 COMP 2 OUT 10k 3 12 8 562k 9 0.1F ISNS SS CPWR VBIAS OSC SYNC AGND PGND 5 11 100F Si4884DY (x2) 16 IRFS3IN20D SLOPE COMPENSATION MIC9131 RBIAS 4 10nF 10 EN 1 VCC UVLO 13 LINE 37.4k VOUT 3.3V @ 20A 1.5H 14 8.2k 0.1 1W 15 2.61k 270pF OPTO FEEDBACK 90% Efficient Telecommunications Power Supply Micrel, Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel + 1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com August 2006 1 M9999-080206 MIC9131 Micrel, Inc. Ordering Information Part Number Max. Duty Cycle Junction Temp. Range Package Standard Pb-Free MIC9131BM MIC9131YM 75% -40C to +125C 16-Pin SOP MIC9131BQS MIC9131YQS 75% -40C to +125C 16-Pin QSOP Pin Configuration LINE 1 16 OUT VCC 2 15 PGND 14 ISNS RBIAS 3 13 UVLO OSC 4 SYNC 5 12 SS COMP 6 11 AGND 10 EN FB 7 9 VBIAS CPWR 8 16-Pin SOP (M) 16-Pin QSOP (QS) Pin Description Pin Number Pin Name 1 LINE Pin Function Line (Input): 180Vdc maximum supply input. May be floated if unused. 2 VCC 3 RBIAS Supply (Input): MIC9131 internal supply input. 4 OSC 5 SYNC Synchronization (Input): External oscillator input for slave operation of controller. See OSC. Do not float. 6 COMP Compensation (External Components): Error amplifier output for external compensation network connection. Bias Resistor (External Component): Connect 562K to ground. Oscillator RC Network (External Components): Connect external resistor-capacitor network to set oscillator frequency. 7 FB 8 CPWR Feedback (Input): Error amplifier inverting input. Current Limit Selection (Input): When CPWR is high, an over-current condition at the ISNS input will terminate the gate drive and reset the soft-start latch. If the CPWR pin is low, an over-current condition at the ISNS input will terminate the gate drive signal, but will not cause a reset of the soft-start circuit. Reference (Output): Internal 5V supply. Will source 5mA maximum. 9 VBIAS 10 EN 11 AGND 12 SS Soft-Start (External Components): Connect external capacitor to slowly ramp up duty cycle during startup and over-current conditions. 13 UVLO Undervoltage Lockout (External Components): Connect to unbiased resistive divider network to set controller's minimum operating voltage. Connect to VBIAS if not needed. 14 ISNS Current Sense (Input): Connect between external switching MOSFET source and switch current sense resistor. 15 PGND Power Ground (Return) 16 OUT M9999-080206 Enable (Input): Logic level enable/shutdown input; logic high = enabled (on), logic low = shutdown (off). Analog Ground (Return) Switch Drive Output (Output): Connect to gate of external switching MOSFET. 2 August 2006 MIC9131 Micrel, Inc. Absolute Maximum Ratings (Note 1) Operating Ratings (Note 2) Line Input Voltage (VLINE) ......................................... +190V VCC Input Voltage (VCC) .............................................. +19V Current Sense Input Voltage (VISNS) .............. -0.3 to +5.3V Enable Voltage (VEN) ............................ -0.3 to VCC + 0.3V Feedback Input Voltage (VFB) ........................ -0.3 to +5.3V Sync Input Voltage (VSYNC) ............................ -0.3 to +5.3V Soft-Start Voltage (VSS) .................................. -0.3 to +5.3V UVLO Voltage (VUVLO) ................................... -0.3 to +5.3V Storage Temperature (TS) ........................ -65C to +150C Power Dissipation (PD) ........................................................ 16-pin SOP ...................................400mW @ TA = +85C 16-pin QSOP ................................245mW @ TA = +85C ESD Rating, Note 3 Line Input Voltage (VLINE) .................VCC to +180V, Note 4 VCC Input Voltage (VCC) .................................. +9V to +18V Junction Temperature Range (TJ) ............ -40C to +125C Package Thermal Resistance 16-pin SOP (JA) .............................................. 100C/W 16-pin QSOP (JA) ............................................ 163C/W Electrical Characteristics TA = 25C, VLINE = 48V, VCC = 10V, Rt = 9.47K, Ct = 470pF, RBIAS = 562k, VEN = 10V, VISNS = 0V, VUVLO = 2V, VSYNC = 0V, unless otherwise noted. Bold values indicate -40 C TJ +125C. Parameter Condition Min Typ 4.7 4.85 Max Units Bias Regulator Output Voltage Line Regulation Load Regulation Oscillator Section Initial Accuracy (fOSC) Oscillator Output Frequency IVBIAS = 0mA; VOSC = 0V (Oscillator OFF) 9V VCC 18V, IVBIAS = 0mA; VOSC = 0V 0mA IVBIAS 5mA; VOSC = 0V Rt = 9.47K, Ct = 470pF 180 Maximum Duty Cycle Voltage Stability (f/f) Temperature Stability ppm/C Maximum Sync Frequency 5.0 V 5.1 V 24 40 mV 5 30 mV 200 220 kHz 4.6 9V VCC 18V -40C TJ 125C fOSC/4 kHz 75 % 2.5 % 100 Note 5 6 MHz Sync Threshold Level 2.5 V Sync Hysteresis 0.7 V Sync Minimum Pulse Width 50 ns Error Amp Section FB Voltage VCOMP = VFB 2.475 2.45 Open Loop Voltage Gain, AVOL Unity Gain Bandwidth PSRR COMP Sink Current COMP Source Current VCOMP Low VCOMP High Input Bias Current (IFB) Slew Rate August 2006 9V VCC 18V VFB = 2.7V; VCOMP = 5V VFB = 2.3V; VCOMP = 0V VFB = 2.7V; ICOMP = -50A 2.5 V 90 dB 4 MHz 60 dB 80 100 A 1 2.5 mA 115 VFB = 2.3V; ICOMP = +500A 2.525 2.55 3.5 4 300 mV V VFB = VCOMP 160 nA SINK 1.5 V/s SOURCE 1.5 V/s 3 M9999-080206 MIC9131 Parameter Micrel, Inc. Condition Min Typ Max Units 0.1 10 A Preregulator Input Leakage Current VLINE = 180V, VCC = 10V VCC Gate Lockout (VGLO(ON)) VLINE = 48V VCC Pre-Regulator Off (VPR(OFF)) VLINE = 48V VCC Pre-Regulator Hysteresis (VPR) VLINE = 48V VCC Gate Lockout Hysteresis (VGLO) Start-up Current Supply Supply Current, IVCC Enable Input Current Shutdown Supply Current Protection and Control VLINE = 48V Current Limit Source Current Enable Input Threshold (Turn-on) 7.5 V 800 mV VGLO(ON) V 500 700 mV 9 12 mA 1 1.3 mA -10 0.1 10 A 0.1 10 A 0.83 0.888 7.7 VLINE = 48V, VCC = 7.5V, Note 4 Pin 16 (OUT) = OPEN VEN = 0V ,10V; VLINE = 48V VEN = 0V ; VCC = 18V 0.772 Current Limit Threshold Voltage Current Limit Delay to Output 7.2 700 VISNS = 0V to 5V 34 CPWR Threshold Soft-Start Current Line UVLO Threshold (Turn-on) V ns VISNS = 0V 30 40 50 A 1 1.6 2.2 V VCPWR = 5V, 0V -1 VSS = 0V 2.5 1.16 Enable Input Hysteresis CPWR Input Current +0.5V 150 mV +1 A 4 6 A 1.22 1.28 1.6 V V Line UVLO Threshold Hysteresis 140 mV Thermal Shutdown 145 C Thermal Shutdown Hysteresis 25 C VISNS = 5V 0 ns 8 12 SINK ; ISINK = 200mA 4 6 MOSFET Driver Output Minimum On-Time Output Driver Impedance Rise Time Fall Time SOURCE ; ISOURCE = 200mA COUT = 500pF COUT = 500pF Note 1. Exceeding the absolute maximum rating may damage the device. Note 2. The device is not guaranteed to function outside its operating rating. 12 ns 8 ns Note 3. Devices are ESD sensitive. Handling precautions recommended. Note 4. If a substained DC voltage >150V is applied to the LINE pin, a current-limiting 1.8kresistor should be used in series with the LINE pin. This condition does not apply for transient conditions over 150V. Note 5. For oscil tions of the internal 5V regulator. See Applications Information for details. M9999-080206 4 - August 2006 MIC9131 Micrel, Inc. Typical Characteristics THRESHOLD (V) 1.195 1.190 Quiescent Current vs. V CC Voltage R 2.2 B IAS R = 9.47K t Ct = 470pF 2.0 1.8 1.6 1.4 1.2 8 10 12 14 VCC (V) 16 18 VC C = 10V R = 9.53K t Ct = 470pf 3 2.5 fOSC = 200kHz 2 1.5 1.46 1.44 1.42 1.4 1.38 VC C = 10V RB IAS = 560K R = 9.47K t Ct = 470pF 1.36 1.34 1.32 1.3 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C) 200 180 160 140 70 50 40 30 August 2006 200 400 600 800 1000 1200 RBIAS (k) 0 0 200 400 600 800 1000 1200 RBIAS (k) 5 Ct = 470pF C = 100pF t ISNS to Gate Output Delay vs. Overdrive 80 60 160 Quiescent Current vs. Frequency 2 1 0 90 10 0 10 9 8 7 6 5 4 3 0 40 80 120 TEMPERATURE (C) GATE DRIVE FREQUENCY (kHz) ISNS to Gate Output Delay vs. R BIAS 20 1 1.18 -40 Quiescent Current vs. Temperature 1.48 Quiescent Current vs. R BIAS 3.5 8 9 10 11 12 13 14 15 16 17 18 VCC (V) 1.5 = 560K QUIESCENT CURRENT (mA) QUIESCENT CURRENT (mA) 2.4 QUIESCENT CURRENT (mA) 1.180 1.2 1.19 1.185 2.480 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C) VC C=10V RB IAS=560K 500 2.485 1.24 1.21 1.200 2.490 Line UVLO Threshold vs. Temperature 1.22 1.205 2.495 8 9 10 11 12 13 14 15 16 17 18 VCC (V) 1.23 1.210 2.500 0.5 1.220 1.215 2.505 R B IAS = 560K 1.0 Line UVLO Threshold vs. V CC 2.499 RB IAS=160K 120 100 80 60 40 20 0 RB IAS=560K RB IAS=360K OVERDRIVE (mV) 2000 REFERENCE VOLTAGE (V) VC C = 10V 160 400 450 2.510 0 40 80 120 TEMPERATURE (C) 1600 1800 Error Amp Reference Voltage vs. Temperature -2 -2.5 -40 300 350 Ct=470pF 8 9 10 11 12 13 14 15 16 17 18 VCC (V) 2.500 UVLO THRESHOLD (V) -0.5 -1 -1.5 DELAY (ns) -0.4 -0.5 2.501 400 600 800 1000 1200 1400 FOSC (NOM)=200kHz Rt=9.47K 0 0 50 100 150 200 250 -0.2 0.5 RB IAS = 560K 0 200 -0 1 Error Amp Reference Voltage vs. V CC Voltage 2.502 REFERENCE VOLTAGE (V) 0.0 OSC FREQ. VARIATION (%) 0.1 VC C = 10V RB IAS = 560K R = 9.47K t C = 470pF t 1.5 DELAY (ns) OSC FREQ. VARIATION (%) 0.2 -0.3 Oscillator Frequency vs. Temperature 2 QUIESCENT CURRENT (mA) Oscillator Frequency vs. VCC Voltage 0.3 M9999-080206 MIC9131 Micrel, Inc. 5.06 RB IAS = 560K 4.96 5.000 7.8 V 7.2 =10V CC RB IAS=560K 7 6.8 Vcc G LO Of f 6.6 6.4 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C) 2 1.95 1.9 1.85 1.8 1.75 1.7 1.65 822.0 821.0 820.5 820.0 819.5 819.0 818.5 818.0 8 9 10 11 12 13 14 15 16 17 18 VCC (V) Enable Threshold vs. V CC 2.5 1.6 1.55 1.5 8 9 10 11 12 13 14 15 16 17 18 VCC (V) S INK 1.5 1 0 8 9 10 11 12 13 14 15 16 17 18 VCC (V) 16 80 14 CURRENT (mA) -40C 65 25C 60 55 125C 50 45 40 0 M9999-080206 40 120 80 VLINE (V) VC C = 0V 160 200 SOURCE 0.5 85 70 Gate Drive Current vs. V CC 2 Peak Short Circuit Depletion FET Current vs. V LINE 75 RB IAS=560K VC C = 10V 821.5 THRESHOLD (mV) THRESHOLD (V) 7.4 4.96 4.95 Ct = 470pF ISNS Current Limit Threshold vs. V CC Voltage Vcc G LO On 7.6 4.97 4.94 4.94 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C) 8 9 10 11 12 13 14 15 16 17 18 VCC (V) V CC Turn On/Off Thresholds vs. Temperature THRESHOLD VOLTAGE (V) VC C = 10V RB IAS = 560K Rt = 9.47K 4.98 5.002 SHORT CIRCUIT CURRENT (mA) 4.98 5 1 2 3 IBIAS (mA) 836 834 828 826 824 822 820 818 816 -40 0 40 80 120 TEMPERATURE (C) 125C 8 6 4 2 40 VC C=7.5V RB IAS=560K E n =7.5V 120 160 200 80 VLINE (V) 6 160 Peak Short Circuit Depletion FET Current vs. Temperature 85 180V Line 80 VC C = 0V 75 70 65 60 55 48V Line 50 45 40 -40 12 0 40 80 120 TEMPERATURE (C) 160 Depletion FET Current vs. Low V LINE Voltage -40C 10 25C 5 VC C= 10V RB IAS= 560K 832 830 -40C 10 4 ISNS Current Limit Threshold vs. Temperature Depletion FET Current vs. V LINE 12 0 0 0 THRESHOLD (mV) 5.004 SHORT CIRCUIT CURRENT (mA) 5.006 4.998 4.99 5.02 SINK/SOURCE CURRENT (A) VBIAS (V) 5.008 VC C = 10V 5 5.04 BIAS VOL AGE (V) 5.010 5.01 CURRENT (mA) 5.012 V BIAS Load Regulation V BIAS Voltage vs. Temperature VBIAS VOLTAGE (V) V BIAS vs. V CC 25C 8 125C 6 4 2 0 7 7.5 8 8.5 9 VLINE (V) 9.5 10 August 2006 MIC9131 Micrel, Inc. ISNS Pin Source Current vs. Temperature ISNS Pin Source Current vs. V CC ISNS CURRENT (A) RB IAS=560K ISNS CURRENT (A) 42 41.5 41 40.5 40 39.5 39 38.5 38 8 August 2006 10 12 14 VCC (V) 16 18 45 44 RB IAS=560K 43 VC C=10V 42 41 40 39 38 37 36 35 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C) 7 M9999-080206 MIC9131 Micrel, Inc. Oscillator Frequency vs. RC Values 1000000 RESISTOR VALUE () 47pF 100pF 100000 220pF 470pF 680pF 10000 1000pF 2200pF 1000 10000 100000 1000000 10000000 FREQUENCY (Hz) *See applications section for higher switching frequencies Note: Output switching frequency is 1/4 the oscillator frequency. Functional Block Diagram FB COMP 7 6 OSC 4 SYNC 5 Oscillator 1.2V 2 R 40A ISNS 14 VBIAS EN S1 16 OUT 15 PGND 11 AGND 0.82V BIAS REG 10 RBIAS 3 Peak Current Limit 1.21V 5V SS Q S2 PWM 9 5V VCC SR Latch 2.5V Error Amplifier 2 4A MAXIMUM DUTY CYCLE 12 Max. Duty Cycle Current Limit Selection CPWR 8 Q R1 R2 VCC 2 S 1-Shot VCC UVLO LINE 1 UNDERVOLTAGE LOCKOUT Thermal Shutdown LINE UVLO 13 UVLO Figure 1 M9999-080206 8 August 2006 MIC9131 Micrel, Inc. Functional Description * Current sensing & overcurrent protection * Slope compensation * Error amplifier High Voltage Start Up Circuit Many conventional Off-Line and Telecom power supplies use an external bias resistor and zener diode to supply the initial start-up voltage for the control IC. The control IC gets its supply voltage from a bias winding once the power supply is running. This method has the disadvantages of extra components (diode and power resistor), continuous power dissipation in the resistor and a large bias capacitor, used to supply the IC until the bias winding takes over. The MIC9131 eliminates these problems by using an internal depletion mode MOSFET as a pre-regulator to provide the start-up bias voltage from the high voltage input of the power supply. This approach eliminates the need for external start up components and reduces the size of the controller's bias supply capacitor. The MOSFET is turned off once the external bias winding takes over, which eliminates power dissipation in the start-up circuit. In some cases, the MIC9131 may be run directly from the input voltage rail, eliminating the need for an external bias winding. Start-up circuit operation is illustrated in Figure 2. VIN is ap- Micrel's MIC9131 is a high voltage, high speed current mode switching power supply controller. It uses a BiC/DMOS process to achieve a high voltage input, low quiescent current and very fast internal delay times. The MIC9131 is designed to drive an external low side N-channel MOSFET, which makes it suitable for controlling Boost, Flyback and Forward converter topologies. The high voltage startup pin eliminates the requirement for an external start up circuit. This makes it ideal for use with Telecom converters. A block diagram of the MIC9131 is shown in Figure 1. The description of the controller is divided into 6 basic functions: * Power and bias circuitry * High voltage start-up circuit * VCC and Bias supplies * Enable and Undervoltage monitoring circuits * VCC and VIN UVLO * Enable * Oscillator and sync circuitry * Soft-start and soft-start reset circuits * MOSFET gate drive circuits * Control loop operation Transformer Bias Winding MIC9131 Internal Circuitry VCC 2 VIN Line 1 1.21V 180V DEPLETION FET VCC UVLO THERMAL SHUTDOWN VPR(OFF) Depletion FET Pre-Regultor turn-off threshold VPR VGLO VCC Gate Lockout Hysteresis Depletion FET turn-on threshold VGLO(ON) VCC gate lockout turn on threshold VCC voltage when powered from VLINE Figure 2 August 2006 9 M9999-080206 MIC9131 Micrel, Inc. plied and the depletion FET, which is normally enabled allows current from VIN to charge the VCC bias capacitor. Once the VCC voltage reaches the VCC enable threshold, VGLO(ON) , the gate drive is enabled and the MIC9131 starts switching. Vcc continues to increase until the Pre-Regulator turn-off threshold, (VPR(OFF)), is reached and the depletion FET is turned off. The Vcc voltage decreases as energy from the bias capacitor is used to supply the controller. The depletion FET is turned back on when the pre-regulator turn-on threshold is reached. A bias winding derived supply voltage, set higher than the FET turn-off threshold, VPR(OFF), raises the VCC voltage over the threshold and prevents the FET from turning on. In certain designs the MIC9131 may be powered directly from the Line voltage, eliminating the need for an extra transformer bias winding. When operating in this fashion the designer must insure the power dissipation in the IC does not cause the die temperature to exceed the 125C maximum. Power dissipation is calculated by: VPR hysteresis). The bias regulator in the MIC9131 buffers the internal circuits from VCC variations. The pre-regulator FET is protected by a thermal shutdown circuit, which turns the MOSFET off if its temperature exceeds approximately 150C. When operating at input voltages greater than 150V, a fast input voltage risetime during turn-on (which may occur during a hot plug operation)may cause a high peak current to flow through the depletion FET, damaging the MIC9131. A 1.8k resistor in series between the input voltage and the Line pin (pin 1) is recommended when operating at input voltages greater than 150V. This resistor limits the maximum peak current to 100mA (at 180VIN) and protects the part. The depletion mode MOSFET contains an internal parasitic diode. The VIN pin voltage must be greater than the VCC voltage or the VCC voltage will be clamped to a diode drop greater than the VIN voltage. Excessive power dissipation in the parasitic diode will destroy the IC. VCC and Bias Supplies PDISS = ( VIN - VCC ) x IVCC The power for the controller and gate drive circuitry is supplied through the VCC pin. The gate drive current is returned to ground through the power ground pin (PGND). The rest of the supply current is returned to ground through the analog ground pin (AGND). The two ground pins must be connected together through the PCB ground plane. High frequency decoupling is provided at the VCC pin to supply the gate drive's peak current requirements. Turn-on of the external MOSFET causes a voltage glitch on the VCC pin. If the glitch is excessive, this disruption can appear as noise or jitter in the oscillator circuit or the gate drive waveform. The decoupling capacitor must be able to supply the MOSFET gate with the charge required to turn it on. A 0.1F ceramic capacitor is usually sufficient for most MOSFETs. Larger FETs, with a higher gate charge requirement may require a 0.22F ceramic capacitor or a ceramic capacitor paralleled with a 2.2F tantalum or 4.7uF aluminum electrolytic. It is recommend that if VLINE is greater than 150V DC than the maximum capacitor recommended on VCC is 2.2F.The capacitor must be located next to the VCC pin of the MIC9131. The ground end of the capacitor should be connected to the ground plane, making a low impedance connection to the power ground pin (pin 15). The internal bias regulator block provides several internal and external bias voltages. Referring to Figure 1, a 2.5V reference is used for the internal error amplifier, a 0.82V bias is used by the current limit comparator and a 1.21V reference is used by the Line UVLO circuit. An external 5V bias voltage (VBIAS) powers the oscillator circuit and may be used as a reference voltage for other external components. The VBIAS pin requires a minimum 0.1F capacitor to ground for decoupling. Enable and Undervoltage Monitoring Circuits The two undervoltage lockout circuits in the MIC9131 are shown in Figure 4. One monitors the VCC voltage and the other monitors the input line voltage. These signals are OR'd together and either one can disable the gate drive pin and discharge the voltage on the soft start capacitor. Where : VIN is the line input voltage VCC is the average VCC voltage (typically 8.5V) IVCC is the total current drawn by the IC IVCC is the sum of the operating current of the MIC9131 at a given frequency and the average current required to drive the external switching MOSFET. A plot of typical operating current vs. frequency is given in Figure 3. The average MOSFET gate drive current is calculated in the "MOSFET GATE DRIVE" section of this specification. Ct = 470pF 500 300 350 400 450 C = 100pF t 150 200 250 9 8 7 6 5 4 3 2 1 0 0 50 100 QUIESCENT CURRENT (mA) 10 Quiescent Current vs. Frequency GATE DRIVE FREQUENCY (kHz) Figure 3 The die junction temperature is calculated by TJ = TA + PDISS x JA Where: TJ is the die junction temperature TA is the ambient temperature of the circuit JA is the junction to ambient thermal resistance of the MIC9131 (listed in the operating ratings section of the specification. When powered directly from the Line voltage, the VCC voltage will vary between the upper and lower pre-regulator thresholds. The amplitude of the output gate drive voltage will vary with the VCC voltage. This should not be a problem for most topologies since the variation is small (equal to the M9999-080206 10 August 2006 MIC9131 Micrel, Inc. 5V MIC9131 4A 12 SS SET S VCC Q R 2 1.21V /Q RESET VCC UVLO UVLO VIN R1 AGND 11 UVLO 13 R2 16 OUT LINE UVLO 15 PGND Figure 4: UVLO and Soft Start Circuits VCC Undervoltage Lockout The VCC voltage is internally divided down and compared to a 1.21V internal bandgap reference. As VCC rises above the turn-on threshold, it disables the VCC undervoltage lockout circuit. Once above the turn-on threshold, hysteresis prevents the lockout circuit from disabling the IC until the VCC voltage falls below the lower threshold. Line Undervoltage Circuit (UVLO) The line voltage is monitored by an external resistor divider and fed into the negative input of the line UVLO comparator. As the comparator trip point is exceeded, the line UVLO circuit is disabled. Hysteresis built into the comparator prevents the circuit from toggling on an off in the presence of noise or a high input line impedance. The line voltage turn-on trip point is: R2 VLINE_ON = VTHRESHOLD x R1+ R2 Enable A low level on the enable pin turns off all the functions of the MIC9131 and places it in a low quiescent current state. The output driver is in a low state. When the enable pin is pulled high, the MIC9131 goes through its normal start up sequence including undervoltage lock out and soft start. When not used, the pin should be connected to VCC. Oscillator Block An external resistor and capacitor set the oscillator frequency. The MIC9131 contains an internal divide-by-four circuit that limits the maximum duty cycle at the gate drive to 75%. The oscillator frequency of the MIC9131 is four times the output switching frequency. Oscillator Pin The operation of the oscillator is shown in Figure 5. The voltage waveform at the OSC pin is a sawtooth whose amplitude increases as capacitor Cosc is charged up through ROSC from the 5VBIAS. When the OSC pin voltage reaches the internal comparator upper threshold, COSC is quickly discharged to zero volts by an internal MOSFET. After a brief delay, typically 75ns, the internal MOSFET is turned off and the COSC charges, repeating the cycle. Figure 5 show the relationship between the oscillator and gate drive waveforms. The delays in the IC force the duty cycle of the gate drive signal to be slightly less than 75% duty cycle. For VBIAS = 5V and a peak oscillator waveform voltage of 3V, the design equations simplify to: Charging t CHARGE = 0. 92 x R t x Ct where: VTHRESHOLD is the voltage level of the internal comparator reference, typically 1.21V. The line hysteresis is equal to: R1 + R2 VHYSTERESIS = VHYST x R2 where: VHYST is the internal hysteresis level, typically 75mV. VHYSTERESIS is the hysteresis of the line input voltage The MIC9131 will be disabled when the line voltage drops back down to: V LINE_OFF = V LINE_ON - VHYTERESIS= Discharging tDISCHARGE 40 x C t (VTHRESHOLD - VHYST )x R1R2 + R2 August 2006 11 M9999-080206 MIC9131 Micrel, Inc. TP_OSCILLATOR = t CHARGE + t DISCHARGE + t DELAY Where t DELAY = 75ns fS _ OSCILLATOR = fS _ OUTPU = 1F 1 2N3904 TP _ OSCILLATOR 1 x fS _ OSCILLATOR 4 4.7F The timing capacitor, COSC, should be an NPO ceramic or a temperature stable film capacitor. Care must be taken when using capacitor values less than 47pF. The high impedance of a small value capacitor makes the OSC pin more susceptible to switching noise. Also, the input capacitance of the OSC pin and the stray capacitance of the board will have a noticeable effect on the oscillator frequency. SYNC 5 VBIAS 9 ROSC OSC COSC 33pF 2 SYNC 5 VBIAS 9 3V 4.7F OSC AGND 4 75ns 1-shot 11 Figure 5a Oscillator Synchronization The switching frequency of the MIC9131 can be synchronized to an external oscillator or frequency source. Figure 6 shows the relationship between the sync input, oscillator waveform and gate drive output. The external frequency should be set at least 15% greater than the free running oscillator frequency to account for tolerances in the oscillator circuit and external components. The positive edge of the sync signal resets the oscillator. The sync pulse frequency, like the oscillator, is four times the gate drive frequency. When an external sync signal is applied, the peak amplitude of the oscillator signal (pin 4) is less than when it is free running because the oscillator signal is terminated before it reaches its 3V (typical) amplitude. When not used, the sync pin should be connected to ground to prevent noise from erroneously resetting the oscillator. 3V 4 COSC 75ns 1-shot 11 AGND Oscillator Waveform (pin 4) Sync Input (pin 5) VOSC Gate Drive (pin 16) Gate Drive (pin 16) tON tPERIOD Figure 5 TIME (500ns/div) Higher Switching Frequencies Figure 6. Sync Waveform The MIC9131 is capable of very high switching frequencies. One of the limitations on the maximum frequency is the current capability of the 5V regulator supplying the oscillator and VBIAS. By powering VBIAS with an external source, e.g. linear regulator much higher switching frequencies can be achieved. A simple way of using an external current source is to set an NPN as an emitter follower. Figure 5b shows the MIC9131 oscillator frequency set to 4MHz using an external NPN. The emitter followerj circuit allows the current to be supplied by VCC while the voltage is regulated to a diode drop below VBIAS. This configuration is quite stable over temperature and voltage variations. M9999-080206 ROSC 1.6k VCC Soft Start Circuit The soft start is programmed by a capacitor on the soft start pin. A 4A current source charges up the capacitor. At power up, the SS pin is discharged. Once the UVLO and enable functions release the soft start circuit, the voltage of the capacitor increases. The active voltage range of the soft start pin is from typically from 0.9V to 1.7V. The internal current source increases the voltage on the soft start capacitor to approximately 4V. The soft start pin and the current sense voltage are connected to a comparator in the MIC9131. The voltage from the soft start pin effectively limits the peak current through the current sense resistor by prematurely terminating the on-time of the gate drive output. Referring to Figure 1, with the soft start voltage low, the duty cycle of the output is at a minimum. As the soft start voltage increases, the duty 12 August 2006 MIC9131 Micrel, Inc. cycle of the gate drive output increases until the error amplifier takes control of the duty cycle. The soft start capacitor is discharged by an internal MOSFET in the MIC9131. The soft start circuit is activated by the following events: 1. Line undervoltage pin less than the 1.21V threshold 2. VCC becomes less than the pre-regulator voltage turn off threshold. 3. The current limit comparator threshold is exceeded. This can be disabled with a low level on the CPWR pin. 4. A low level on the enable pin. Calculating the soft capacitor depends on many parameters such as the current limit of the circuit input voltage, output power and output loading. A starting value of capacitor should be chosen and the value can be adjusted later in the design. Recommended starting values of soft start capacitance is typically 10nF to 100nF. Values below 1nF may be ineffective in slowing the output voltage turn on time. CPWR Current Limit Selection of the output is dependent on the IC supply voltage and the gate charge required to turn the MOSFET on and off. A resistor placed in series with the gate drive output attenuates ringing in the etch connection between the MIC9131 and the MOSFET. Figure 8 shows a single resistor in series between the driver output and the gate of the MOSFET. The zener value should be greater than the gate drive voltage to prevent excessive power dissipation, but less than the maximum gate to source voltage rating. Gate Drive Output GND Figure 8 The circuitry shown in figure 9 allow different rise and fall times. R1 and the input capacitance of the MOSFET determine the rise-time of the gate voltage and therefore the turn-on time of the MOSFET. The diode, D1 is reversed biased, which removes R2 from the circuit. At turn-off, D1 is forward biased and the parallel combination of R1 and R2 controls the turn-off time of the MOSFET. The turn on-time is slower, which reduces switching noise and ringing during turn-on. The turn-off time is faster, which minimizes switching losses during turn-off and improves efficiency. If the turn-on time is to be faster than the turn-off time, the diode should be reversed. This pin controls whether the soft start circuit is reset if the voltage on the Isns pin exceeds the overcurrent threshold. When the CPWR pin is high, an overcurrent condition at the ISNS pin will terminate the on-time of the gate drive pulse and discharge the soft start capacitor to 0V. This delay in start up contributes to a reduction in the average output current during an overcurrent or short circuit condition. A smaller MOSFET may be used since the power dissipation in the MOSFET is minimized under short circuit or overcurrent conditions. If the CPWR pin is low an overcurrent or short circuit conditions will not trip the soft start circuit. The pulse-by-pulse current limit, inherent in current mode control, provides a "brick wall" or constant current limit. With the power supply operating in this mode, a smaller soft start capacitor can be used to increase the turn on speed of the supply. If the CPWR in is held low during the initial turn on at power up and then raised high, the power supply can maximize the turn-on time at start up and still provide a high level of overcurrent and short circuit protection. The circuit shown in Figure 7 performs this function. R2 GND Figure 9 A gate drive transformer is used where an increase in drive voltage, isolation and/or voltage level shifting are required. Gate drive transformers can have multiple windings and drive multiple MOSFETs, including MOSFETs that require a drive signal 180C out of phase with the ICs drive signal. Figure 10 shows a gate drive transformer circuit. The capacitor, C1 removes DC from the drive circuit and prevents transformer saturation. R1 provides damping to eliminate ringing in the circuit. R1 is usually in the 5 to 20 range, depending on the amount of damping necessary. D1 and D2 form a clamp circuit, which prevents the voltage from exceeding the VGMAX level. If the gate drive is well damped, the diodes may be removed R2 is used to allow the transformer to reset properly. R1 CPWR C1 AGND Figure 7 MOSFET Gate Drive Output The MIC9131 has the capability to directly drive the gate of a MOSFET. The output driver consists of a complimentary P-channel and N-channel pair. The typical switching time August 2006 R1 Gate Drive Output MIC9131 VREF D1 D1 13 M9999-080206 MIC9131 Micrel, Inc. C1 T1 Current Sense Circuit The current sense input of the MIC9131 has three unique features, which are advantageous in a high speed, high efficiency power supply. 1. The overcurrent threshold is nominally 0.82V instead of the typical 1.0V found in most switching control ICs. 2. The current sense pin sources a nominal 40A of cur rent out of the pin. This is used to raise the current limit threshold of the pin, which allows a smaller current sense resistor to be used. This improves the efficiency of the power supply, especially in lower current applications. 3. The delay from the current sense input to the output is typically 50ns. The current limit threshold of the ISNS pin was set at 0.82V, allowing the use of a smaller current sense resistor. A stable, bandgap derived 40A current is sourced from the ISNS pin. A voltage drop across a series resistor placed between the pin and the current sense resistor level increases the current sense signal at the ISNS pin. This allows the use of a smaller current sense resistor if the full 0.82V peak to peak current signal is not required. Decreasing the value of the current sense resistor decreases the power dissipation in the resistor, which improves the efficiency of the power supply. The delay between the input of the overcurrent comparator and the output gate drive is nominally 50ns. This very fast response time allows the MIC9131 to operate at higher frequencies and still have adequate overcurrent protection. The operation of the current sense input is as follows. The sensed current in the power supply is converted to a voltage by a resistor or current sense transformer. Referring to Figure 1, this voltage is compared to the output of the error amplifier, which sets the duty cycle of the gate drive output. The current signal is also connected to an Imax comparator. Comparing the current sense signal to the reference voltage sets a maximum current limit. If the maximum amplitude of the current sense signal exceeds the reference, the comparator terminates the gate drive output pulse. It aslo discharges the soft start capacitor when the CPWR pin is high. Leading Edge Current Spike The current signal in a power circuit will often have a leading edge spike caused by leakage inductance, parasitic inductance and capacitance, diode reverse recovery effects and snubbers. These spikes can cause premature termination of the switching cycle if they are not eliminated. A resistor may be added in series between the current sense resistor and the Isns input. The input and board trace capacitance of the ISNS pin (pin 14) is approximately 25pF. A 1k resistor is a good choice, since it attenuates most of the ripple without distorting the current sense waveform. It has a minimal effect on level, offsetting the current sense signal by only 40mV. A typical rule of thumb is the bandwidth of the RC filter should be at least 6 times the switching frequency. This avoids distorting the current sense waveform and adding excessive delays in the current loop that will interfering with overcurrent protection. For a 100kHz switcher, the maximum R1 Gate Drive Output D2 R2 GND D1 1:N Figure 10 The gate impedance of a MOSFET is capacitive and the power required to drive the gate is proportional to the charge required to turn on the MOSFET, the peak gate voltage and the switching frequency. Assuming the total gate charge for turn on and turn off is equal, the power used to switch the MOSFET on and off is: PDRIVE = QG x VGS x fS where: QG is the total gate charge at VGS VGS is the gate to source voltage of the MOSFET usually equal to VCC fS is the output switching frequency The power required to drive the MOSFET is dissipated in the drive circuitry of the MIC9131. This power must not cause the die temperature to exceed the maximum rated junction temperature of 125C. MOSFET Driver IC's are used when the drive requirement for the MOSFETs is greater than the capability of the MIC9131 gate drive output. While the peak current of the MIC9131 gate drive is typically 1.2A at VIN =12V, a gate driver ICs will sink or source between 1.2A and 12A of peak current. The higher peak current allows faster rise and fall times for larger MOSFETs. The drive requirements for selecting a MOSFET driver are determined using the following equation: Q IPK = 2 x G t where: QG is the total gate charge required to turn on the MOSFET at a specified ID, VG and VDS. This information is usually given in the MOSFET specification sheet. t is the gate voltage transition time (risetime or fall time) IPK is the peak current requirement of the MOSFET driver IC. For example, if a MOSFET is chosen with a QG of 60nC and it is desired to have a 50nS gate to source risetime/falltime, the peak current requirement of the MOSFET driver is: 2 x 60nC IPK = = 2. 4A 50ns A driver such as the MIC4424 will meet this requirement. For more information on choosing a MOSFET driver, see the Micrel application note AN-24, "Designing with Low Side MOSFET Drivers." M9999-080206 14 August 2006 MIC9131 Micrel, Inc. Sensing Current with a Current Sense Transformer At higher power levels, the power dissipation in a current sense resistor is excessive. A current sense transformer can be used to sense the current while minimizing power dissipation. See Figure 11. The schematic shows the circuitry necessary when using a current sense transformer. The resistor, R1, provides a path to reset the current sense transformer. The resistor, R2, converts the scaled down current to a voltage, which is sent to the ISNS pin. series resistance is 10K, for a 500kHz switcher, the maximum series resistance is 2K. Sensing Current with a Resistor The fast transition times of the current signal prohibit the use of inductive resistors. Standard wire wound power resistors will not work. Carbon composition or metal film resistors or low inductance power resistors may be used. The overcurrent range of the power supply and component tolerances must be considered when selecting the current sense resistor value. The power supply specification may call for an overcurrent limit, which must be accounted for when selecting the current sense resistor value. The relationship between the peak primary current and the current sense resistor is: VISNS = IP x RISENSE + IISNS x R f VIN where: Ip is the current in the sense resistor RISENSE is the current sense resistance IISNS is the current sourced from the ISNS pin (40A) R2 Figure 11 The voltage at the ISNS pin is calculated by: I VISNS = P x R2 + IISNS x R f N where: IP is the current in the primary of the current sense transformer R2 is the current sense resistance at the secondary of the current sense transformer N is the turns ratio of the current sense transformer (N=Nsec/Npri) IISNS is the current sourced from the ISNS pin (40A) Rf is the series resistor between the ISNS pin and the current sense resistor. Current Transformer Example: The maximum peak current, IPMAX = 5A at 120% overcurrent and minimum input voltage The maximum rms current, IRMS = 3.25A The full 0.82V peak signal a the ISNS input can be used since very little power is dissipation in the secondary side sense resistor. The maximum peak to peak voltage at the sense pin (pin 14) is 0.82V at the 5A maximum output current. The current sense resistor value and power dissipation is: V x N 0. 82 x 100 = 16.4 R2 = SENSE = IP 5 A 0.5 ohm, non inductive resistor with at least a 1/2W rating should be selected. The series resistor is calculated to allow the 500mV-peak signal to reach 0.82V. IISNS = 0. 82 - (1x 0 .5) = 10.25k 40 A The next lower value of 10k is selected. The bandwidth of the 10K resistor and the 25pF input capacitance is calculated. The resistor value must be lowered if the bandwidth is too low for the switching frequency. 1 BW = = 630kHz 2 x x 10k x 25 pF 2 2 I 3. 25 PDISS = PRMS x R2 = x 16.4 = 17 .4 mW 100 N The maximum switching frequency of this power supply should be approximately six times less than the BW to prevent current waveform distortion and excessive delays in the current loop. This limits the switching frequency to the range of 100kHz. August 2006 IPRI OUT (pin 16) PDISS = IRMS2 x RSENSE = 0. 65 2 x 0 .5 = 0.21W VISNS - ( IP x RISENSE ) R1 MIC9131 Rf is the series resistor between the ISNS pin and the current sense resistor. The current sense resistor must not be too small or the current sense signal will be susceptible to noise. If noise is a problem, the current signal level should be increased. An example is illustrated below. The maximum peak current, IPMAX= 1A at 120% overcurrent and minimum input voltage The maximum rms current, IRMS=0.65A The desired current sense signal amplitude is 500mV at 1A output current. The current sense resistor value and power dissipation is: V 0.5 RSENSE = SENSE = = 0.5 ISENSE 1 Rf Current Sense Transformer Rf ISNS (pin 14) A 16.2 ohm, 1%, non inductive resistor with at least a 50mW rating should be selected. A good choice would be an 0805 size metal film or a 1/8 watt leaded metal film resistor. A series resistor between the current sense transformer and the Isns input is not necessary unless it is used for low pass filtering. 15 M9999-080206 MIC9131 Micrel, Inc. If the current sense transformer were not used, the sense resistor would dissipate 1.7 watts. V 0. 82 RSENSE = SENSE = = 0.164 ISENSE 5 secondary winding inductance for the flyback topology) M2 is the inductor current downslope For a boost topology, the inductor downslope is: di VOUT - VIN + VD M2 = = dt L PDISS = IRMS2 x RSENSE = 3. 25 2 x 0 .164 = 1. 7 W Slope Compensation Power supplies using peak current mode control techniques require slope compensation when they are operating in continuous mode and have a duty cycle greater than 50%. Without slope compensation, the duty cycle of the power supply will alternate wide and narrow pulses commonly referred to as subharmonic oscillations. Even though the MIC9131 operates below a 50% duty cycle, slope compensation adds the benefits of improved transient response and greater noise immunity in the current sense loop (especially when the current ramp is shallow). Slope compensation can be implemented by adding an optimum 1/2 of the inductor current downslope, reflected back to the current sense input. In real world applications, 2/3 of the inductor current downslope is used to allow for component tolerances. Slope compensation at the ISNS input may be implemented by using a resistor and capacitor as shown in Figure 12. The rectangular waveshape of the gate drive output is integrated by the resistor/capacitor filter, which results in a ramp used for the slope compensation signal. When the gate drive and the current signal at the sense resistor goes low, the capacitor is discharged to 0V. In a transformer isolated topology, the downslope must be reflected back to the primary by the turns ratio of the transformer. The reflected downslope is: Ns M2REFLECTED = M2 x Np where : Ns/Np is the turns ratio of the secondary winding to the primary winding. M2REFLECTED is the inductor curent downslope reflected to the secondary side of the current sense transformer. The reflected downslope is multiplied by the current sense resistor to obtain the downslope at the current sense input pin (ISNS). ISNS _ SLOPE = M2REFLECTED x RS where Rs is the value of the current sense resistor. The required downslope of the compensation ramp at the ISNS input is: M3 = ISNS _ SLOPE x 0.67 R1 is know if a value for the resistor between the current sense resistor and the Isns pin, has already been selected. If not chose a value of 1k, which will minimize any offset and signal degradation at the ISNS pin. Select a value of C1 to minimize signal degradation from the cutoff frequency of R1/C1. The bandwidth should be at least six times the switching frequency. 1 C1 = 2 x x fS x R1 Gate Drive (pin 16) R2 MIC9131 ISNS (pin 14) R1 C1 RSENSE where: fS is the switching frequency of the power supply (not the oscillator frequency) The slope of the generated compensation ramp is: R1 1 M3 = VGATE_DRIVE x x R2 + R1 R2 x C1 Figure 12 The procedure outlined below demonstrates how to calculate the component values. Compute the inductor current downslope as seen at the current sense input. For a flyback, buck or forward mode topology the inductor downslope is equal to: di VO + VD M2 = = dt L Solving for R2 and assuming R2 is much greater than R1. R2 = VGATE _ DRIVE x R1 M3 x C1 where: VGATE_DRIVE is the amplitude of the gate drive waveform where : VO is the output voltage VD is the forward voltage drop of the rectifier diode L is the inductance of the output inductor (or the M9999-080206 16 August 2006 MIC9131 Micrel, Inc. Error Amplifier The error amplifier is part of the voltage control loop of the power supply. The FB pin is the inverting input to the error amplifier. The non-inverting input is internally connected to a 2.5V reference. The output of the error amplifier, COMP, is connected to the PWM comparator. The error amplifier August 2006 provides the reference to limit and control the peak current of the power supply. There is a 1.2V level shift between the output of the error amplifier and the PWM comparator. This allows the output of the error amplifier to operate in a linear region and prevents loading on the COMP pin from interfering with proper control of the current signal. 17 M9999-080206 MIC9131 Micrel, Inc. Package Information 16-Pin SOP (M) 16-Pin QSOP (QS) M9999-080206 18 August 2006 MIC9131 Micrel, Inc. MICREL INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com This information furnished by Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Pr Micrel for any damages resulting from such use or sale. (c) 2001 Micrel Incorporated August 2006 19 M9999-080206