1. Product profile
1.1 General description
PNP low VCEsat Breakthrough in Small Signals (BISS) transistor in a SOT666 plastic
package.
NPN complement: PBSS4160V.
1.2 Features
Low collector-emitter saturation voltage VCEsat
High collector current capability IC and ICM
High efficiency leading to less heat generatio n
Reduces printed-circuit board area required
Cost effective replacement for medium power transistors BCP52 and BCX52
1.3 Applications
Major application segments
Automotive
Telecom infrastructure
Industrial
Power management
DC-to-DC conversion
Supply line switching
Peripheral driver
Driver in low supply voltage applications (e.g. lamps and LEDs)
Inductive load driver (e.g. relays, buzzers and motors)
1.4 Quick reference data
[1] Device mounted on a FR4 PCB, single-sided copper, tin-plated and standard footprint.
PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
Rev. 03 — 14 December 2009 Product data sheet
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCEO collector-emitter voltage open base - - −60 V
ICcollector current (DC) [1] --−1A
ICM peak collector current - - −2A
RCEsat equivalent on-resistance IC=−1A;
IB=−100 mA -220330mΩ
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 2 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
2. Pinning information
3. Ordering information
4. Marking
5. Limiting values
Table 2. Pinning
Pin Description Simplified outline Symbol
1, 2, 5, 6 collector
3base
4emitter
123
456
4
3
1, 2, 5, 6
sym030
Table 3. Ordering information
Type number Package
Name Description Version
PBSS5160V - plastic surface mounted package; 6 leads SOT666
Table 4. Marking codes
Type number Marking code
PBSS5160V 51
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCBO collector-base voltage open emitter - −80 V
VCEO collector-emitter
voltage open base - −60 V
VEBO emitter-base voltage open collector - −5V
ICcollector current (DC) [1] -−0.9 A
[2] -−1A
ICM peak collector current t = 1 ms or limited
by Tj(max)
-−2A
IBbase current (DC) - −300 mA
IBM peak base current tp ≤ 300 μs; δ ≤ 0.02 - −1A
Ptot total power dissipation Tamb ≤ 25 °C[1] - 300 mW
[2] - 500 mW
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Tstg storage temperature −65 +150 °C
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 3 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
[1] Device mounted on a FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on a FR4 PCB, single-sided copper, tin-plated, 1 cm2 collector mounting pad.
6. Thermal characteristics
[1] Device mounted on a FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on a FR4 PCB, single-sided copper, tin-plated, 1 cm2 collector mounting pad.
(1) FR4 PCB; 1 cm2 collector mounting pad
(2) FR4 PCB; standard footprint
Fig 1. Power derating curves
Tamb (°C)
0 16012040 80
001aaa714
0.2
0.4
0.6
Ptot
(W)
0
(1)
(2)
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-a) thermal resistance from
junction to ambient in free air [1] --415K/W
[2] --250K/W
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 4 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
Mounted on FR4 PCB; standard footprint
(1) δ=1
(2) δ=0.75
(3) δ=0.5
(4) δ=0.33
(5) δ=0.2
(6) δ=0.1
(7) δ=0.05
(8) δ=0.02
(9) δ=0.01
(10) δ=0
Fig 2. Transient thermal impedance as a function of pulse time; typical values
001aaa715
10
1
102
103
Zth
(K/W)
10−1
10−51010−2
10−4102
10−1
tp (s)
10−3103
1
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 5 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
7. Characteristics
[1] Pulse test: tp ≤ 300 μs; δ ≤ 0.02.
Table 7. Characteristics
Tamb = 25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
ICBO collector-base cut-off current VCB =−60 V; IE=0A - - −100 nA
VCB =−60 V; IE=0A;
Tj= 150 °C--−50 μA
ICES collector-emitter cut-off current VCE =−60 V; VBE =0V - - −100 nA
IEBO emitter-base cut-off current VEB =−5V; I
C=0A - - −100 nA
hFE DC current gain VCE =−5V; I
C=−1 mA 200 350 -
VCE =−5V; I
C=−500 mA [1] 150 250 -
VCE =−5V; I
C=−1A [1] 100 160 -
VCEsat collector-emitter saturation
voltage IC=−100 mA; IB=−1mA - −110 −160 mV
IC=−500 mA; IB=−50 mA - −120 −175 mV
IC=−1A; I
B=−100 mA [1] -−220 −330 mV
VBEsat base-emitter saturation voltage IC=−1A; I
B=−50 mA - −0.95 −1.1 V
RCEsat equivalent on-resistance IC=−1A; I
B=−100 mA [1] - 220 330 mΩ
VBEon base-emitter turn-on voltage IC=−1A; V
CE =−5V - −0.82 −0.9 V
tddelay time VCC =−10 V; IC=−0.5 A;
IBon =−0.025 A;
IBoff = 0.025 A
-11-ns
trrise time - 30 - ns
ton turn-on time - 41 - ns
tsstorage time - 205 - ns
tffall time - 55 - ns
toff turn-off time - 260 - ns
fTtransition frequency IC=−50 mA; VCE =−10 V;
f=100MHz 150 220 - MHz
Cccollector capacit ance IE=i
e=0A; V
CB =−10 V;
f=1MHz - 9 15 pF
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 6 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
VCE =−5V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb =−55 °C
VCE =−5V
(1) Tamb =−55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig 3. DC current gain as a function of collector
current; typical values Fig 4. Base-emitter volt age as a function of collector
current; typical values
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb =−55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 5. Collector-emitter saturation voltage as a
function of collector current; typical values Fi g 6. Collector-emitter sa tu ration voltage as a
function of collector current; typical values
001aaa719
200
400
600
hFE
0
IC (mA)
−10−1−104
−103
−1−102
−10
(2)
(1)
(3)
001aaa717
−0.4
−0.8
−1.2
VBE
(V)
0
IC (mA)
−10−1−104
−103
−1−102
−10
(1)
(2)
(3)
001aaa718
−1
−10−1
−10
VCEsat
(V)
−10−2
IC (mA)
−10−1−104
−103
−1−102
−10
(1)
(3)
(2)
001aaa721
−1
−10−1
−10
VCEsat
(V)
−10−2
IC (mA)
−10−1−104
−103
−1−102
−10
(1)
(2)
(3)
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 7 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
IC/IB=10
(1) Tamb =−55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
IC/IB=20
(1) Tamb =−55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig 7. Base-emitter saturation voltage as a function
of collector current; typical values Fig 8. Base-emitter saturation voltage as a function
of collector-current; typical values
001aaa722
−0.4
−0.8
−1.2
VBEsat
(V)
0
IC (mA)
−10−1−104
−103
−1−102
−10
(2)
(3)
(1)
001aaa723
−0.4
−0.8
−1.2
VBEsat
(V)
0
IC (mA)
−10−1−104
−103
−1−102
−10
(3)
(2)
(1)
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 8 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
Tamb =25°C
(1) IB=−40 mA
(2) IB=−36 mA
(3) IB=−32 mA
(4) IB=−28 mA
(5) IB=−24 mA
(6) IB=−20 mA
(7) IB=−16 mA
(8) IB=−12 mA
(9) IB=−8mA
(10) IB=−4mA
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb =−55 °C
Fig 9. Collector current as a function of
collector -em itter voltage; ty pical values Fig 10. Equivalent on-resistance as a function of
collector current; typical values
VCE (V)
0−5−4−2−3−1
001aaa716
−0.8
−1.2
−0.4
−1.6
−2
IC
(A)
0
(1)(2)(3)(4)(5)
(10)
(9)
(6)
(9)
(8)
(7)
(6)
001aaa720
IC (mA)
−10−1−104
−103
−1−102
−10
1
10
102
103
RCEsat
(Ω)
10−1
(2)
(1)
(3)
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 9 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
Fig 11. BISS transist or swi tch ing time definition
006aaa266
−IBon (100 %)
−IB
input pulse
(idealized waveform)
−IBoff
90 %
10 %
−IC (100 %)
−IC
td
ton
90 %
10 %
tr
output pulse
(idealized waveform)
tf
t
ts
toff
VCC = −10 V; IC = −0.5 A; IBon = −0.025 A; IBoff = 0.025 A
Fig 12. Test circuit for switching times
RC
R2
R1
DUT
mgd624
Vo
RB
(probe)
450 Ω
(probe)
450 Ω
oscilloscope oscilloscope
VBB
VI
VCC
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 10 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
8. Package outline
Fig 13. Package outline SOT666
UNIT bpcDE e1HELpw
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
04-11-08
06-03-16
IEC JEDEC JEITA
mm 0.27
0.17
0.18
0.08
1.7
1.5
1.3
1.1 0.5
e
1.0 1.7
1.5 0.1
y
0.1
DIMENSIONS (mm are the original dimensions)
0.3
0.1
SOT666
bp
pin 1 index
D
e1
e
A
Lp
detail X
HE
E
A
S
0 1 2 mm
scale
A
0.6
0.5
c
X
123
456
Plastic surface-mounted package; 6 leads SOT66
6
YS
wMA
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 11 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
9. Packing information
[1] For further information and the availability of packing methods, see Section 12.
Table 8. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package Description Packing quantity
3000
PBSS5160V SOT666 4 mm pitch, 8 mm tape and reel -115
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 12 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
10. Revision history
Table 9. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PBSS5160V_3 20091214 Product data sheet - PBSS5160V_2
Modifications: •This data sheet was changed to reflec t the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
•Figure 13 “Package outline SOT666”: updated
PBSS5160V_2 20050404 Product data sheet - PBSS5160V_1
PBSS5160V_1 20040420 Obj ective data sheet - -
PBSS5160V_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 14 December 2009 13 of 14
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
11. Legal information
11.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
11.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warrant ies as to t he accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short dat a sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short dat a sheet, the
full data sheet shall pre va il.
11.3 Disclaimers
General — In formation in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give an y represent ations or
warranties, expressed or impli ed, as to the accuracy or completeness of such
information and shall have no liability for th e co nsequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for il lustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ra tings System of IEC 60134) may cause permane nt
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other co nditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may af fect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between inf ormation in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Not hing in this document may be interpret ed or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulatio ns. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
11.4 Trademarks
Notice: All refe renced brands, produc t names, service names and trademarks
are the property of their respective ow ners.
12. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PBSS5160V
60 V, 1 A PNP low VCEsat (BISS) transistor
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 14 December 2009
Document identifier: PBSS5160V_3
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
13. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 3
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
9 Packing information . . . . . . . . . . . . . . . . . . . . 11
10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
11.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
11.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
11.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
11.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12 Contact information. . . . . . . . . . . . . . . . . . . . . 13
13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
