ICS2309
3.3 VOLT ZERO DELAY LOW SKEW BUFFER ZERO DELAY BUFFERS
IDT™ / ICS™
3.3 VOLT ZERO DELAY LOW SKEW BUFFER 5
ICS2309 REV F 041906
AC Electrical Characteristics
ICS2309M-1, VDD=3.3 V ±0.3 V, Ambient temperature -40 to +85°C (Industrial), (0-70°C Commercial)
Note 2: With VDD at a steady rate and valid input at CLKIN.
ICS2309M-1H, VDD=3.3 V ±0.3 V, Ambient temperature -40 to +85°C (Industrial), (0-70°C Commercial)
Note 3: With VDD at a steady rate and valid input at CLKIN.
Parameter Symbol Conditions Min. Typ. Max. Units
Output Clock Frequency fIN 10 pF load, see table on page 2 10 133 MHz
Output Clock Frequency 30 pF load, see table on page 2 10 100 MHz
Output Rise Time tOR 0.8 to 2.0 V, outputs loaded 2.5 ns
Output Fall Time tOF 2.0 to 0.8 V, outputs loaded 2.5 ns
Output Clock Duty Cycle tDC Measured at 1.4 V, Fout=66.67
MHz
40 50 60 %
Output Clock Duty Cycle tDC Measured at 1.4 V, Fout=50
MHz
45 50 55 %
Device to Device Skew Rising edges at VDD/2 700 ps
Output to Output Skew Rising edges at VDD/2 250 ps
Input to Output Skew Rising edges at VDD/2 ±350 ps
Input to Output Skew
(PLL bypass mode)
Rising edges at VDD/2, S2= 1,
S1 = 0
158.7ns
Cycle to Cycle Jitter Measured at 66.67M, outputs
loaded
200 ps
PLL Lock Time Note 2 1.0 ms
Parameter Symbol Conditions Min. Typ. Max. Units
Output Clock Frequency fIN 10 pF load, see table on page 2 10 133 MHz
Output Clock Frequency 30 pF load, see table on page 2 10 100 MHz
Output Rise Time tOR 0.8 to 2.0 V, outputs loaded 1.5 ns
Output Fall Time tOF 2.0 to 0.8 V, outputs loaded 1.5 ns
Output Clock Duty Cycle tDC Measured at 1.4 V, Fout=66.67
MHz
40 50 60 %
Output Clock Duty Cycle tDC Measured at 1.4 V, Fout=50
MHz
45 50 55 %
Device to Device Skew Rising edges at VDD/2 700 ps
Output to Output Skew Rising edges at VDD/2 250 ps
Input to Output Skew Rising edges at VDD/2 ±350 ps
Input to Output Skew
(PLL bypass mode)
Rising edges at VDD/2, S2= 1,
S1 = 0
158.7ns
Cycle to Cycle Jitter Measured at 66.67M, outputs
loaded
200 ps
PLL Lock Time Note 3 1.0 ms