Digitally Programmable S series: PDU-1316F (4-Bit) TTL interfaced Delay Unit Features: m@ Input & output TTL buffered g 4-BIT TTL programmable delay line m Two (2) separate outputs; inverting & non-inverting m= Completely interfaced m Compact & low profile Test Conditions: Specifications: a Delay variation: Monotonic in one direction. g Programmed delay tolerance: +5% or ins whichever is greater. a w Inherent delay (Too): 14.ns on pin = typical 12ns on pin 6) for PDU-1316F-1 thru -10 greater for rest of Part Numbers. u Propagation delay: Address to output (Tsua) =: 12 ns typ. Enable to output (TSUE) = 12 ns typ. mg Power dissipation: 640 mw max. g Supply voltage: 5 Vdc + 5%. a Operating temperature: 0-70C. a Temperature coefficient: 00 PPM/C. uw DC parameters: See TTL-Fast Schottky Logic Table on Page 6. g Input pulse-width: 2150% of Max. delay. Input pulse spacing: 23 times of Max. delay. w@ Input pulse voltage: TTL logic. mw Measurements taken @ T, = 25C; Vo = SV. t 280 4 _ ADDRESS 1448 \y YVY YI oa at 9 es 1100 | ' | 1 27] _26| 26] 2a On _ 75 TYP wot ~ ~ ~ 8 toot 075 500 | Veg Qa fg | D es woo 1.000 f I 5 t ont 700 7 } wo! DELAY | Our Bon 600 | S orot C00 ! NETWORK ko 100 lane 400 -] | GAD o 828 8 8 OUT 0or4 | 010 Fo onmnaa a eB | 9001 0 32 n x * ao LW -~-~+--A- + +e a me DELAY INCREMENT Oo moon tl TRUTH TABLE Address incremental Delay Total Programmed Enable Delay Part No. Per Step (ns) Delay (ns) (Eo) 4 3 2 1 Gut PDU-1316F-.5 St 3 78 PDU-1316F -1 t 5 15.0 0 0 ; 1 PDU-1316F -2 24 5 30.0 0 0 0 1 0 7 PDU-1316F -3 3 10 45.0 PDU-1316F -4 4 +4 10 60.0 0 0 0 1 1 T; PDU-1316F -5 5 10 75.0 0 0 1 0 0 Ty PDU-1316F -6 6 + 16 90.0 0 0 1 0 1 T, PDU-1316F -8 8 +10 1200 PDU-1316F -10 10 + 48 150.0 0 0 1 1 0 T, PDU-1316F -12 12 445 180.0 0 0 1 1 1 I, PDU-1316F -15 15+ 15 225.0 0 1 0 0 0 Ts PDU-1316F -20 20 + 20 300.0 0 1 0 0 1 Ty PDU-1316F -25 25 425 375.0 0 1 0 { 0 Tio PDU-1316F -30 $0 +. 3.0 450.0 0 1 0 1 1 Th, PDU-1316F -35 35 + 35 525.0 PDU-1316F -40 40 + 40 600.0 0 1 1 0 0 ie PDU-13 16F -45 45 45 675.0 0 1 1 0 1 7 PDU-1316F -50 50 + 50 750.0 0 1 1 1 9 4 PDU-1316F -60 60 + 60 900.0 0 1 1 1 1 t PDU-1916F -80 80. + 8.0 1,200.0 1s PDU-1316F -100 1 $ 0 6 6 0 100 410.0 1,500.0 0 Logic oO 1 Logic 1 0 Don't care T, - Reference or inherent delay of unit. T,+ T,, Multiptier of incremental delay. 3 Mt. Prospect Avenue, Clifton. New Jersey 07013 m (201) 773-2299 m FAX (201) 773-9672 52