DAC-08EP - National Semiconductor

DAC0800/DAC0802

8-Bit Digital-to-Analog Converters

General Description

The DAC0800 series are monolithic 8-bit high-speed

current-output digital-to-analog converters (DAC) featuring

typical settling times of 100 ns. When used as a multiplying

DAC, monotonic performance over a 40 to 1 reference cur-

rent range is possible. The DAC0800 series also features

high compliance complementary current outputs to allow dif-

ferential output voltages of 20 Vp-p with simple resistor loads

as shown in

Figure 1

. The reference-to-full-scale current

matching of better than ±1 LSB eliminates the need for

full-scale trims in most applications while the nonlinearities

of better than ±0.1%over temperature minimizes system er-

ror accumulations.

The noise immune inputs of the DAC0800 series will accept

TTL levels with the logic threshold pin, V

, grounded.

Changing the V

potential will allow direct interface to other

logic families. The performance and characteristics of the

device are essentially unchanged over the full ±4.5V to

±18V power supply range; power dissipation is only 33 mW

with ±5V supplies and is independent of the logic input

states.

The DAC0800, DAC0802, DAC0800C and DAC0802C are a

direct replacement for the DAC-08, DAC-08A, DAC-08C,

and DAC-08H, respectively.

Features

nFast settling output current: 100 ns

nFull scale error: ±1 LSB

nNonlinearity over temperature: ±0.1%

nFull scale current drift: ±10 ppm/˚C

nHigh output compliance: −10V to +18V

nComplementary current outputs

nInterface directly with TTL, CMOS, PMOS and others

n2 quadrant wide range multiplying capability

nWide power supply range: ±4.5V to ±18V

nLow power consumption: 33 mW at ±5V

nLow cost

Typical Applications

Ordering Information

Non-Linearity Temperature Order Numbers

Range J Package (J16A) (Note 1) N Package (N16E) (Note 1) SO Package (M16A)

±0.1%FS 0˚C ≤T

≤+70˚C DAC0802LCJ DAC-08HQ DAC0802LCN DAC-08HP DAC0802LCM

±0.19%FS −55˚C ≤T

≤+125˚C DAC0800LJ DAC-08Q

±0.19%FS 0˚C ≤T

≤+70˚C DAC0800LCJ DAC-08EQ DAC0800LCN DAC-08EP DAC0800LCM

Note 1: Devices may be ordered by using either order number.

DS005686-1

FIGURE 1. ±20 V

P-P

Output Digital-to-Analog Converter (Note 5)

June 1999

DAC0800/DAC0802 8-Bit Digital-to-Analog Converters

Absolute Maximum Ratings (Note 2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage (V

−V

−

)±

18V or 36V

Power Dissipation (Note 3) 500 mW

Reference Input Differential Voltage

(V14 to V15) V

−

to V

Reference Input Common-Mode

Range (V14, V15) V

−

to V

Reference Input Current 5 mA

Logic Inputs V

−

to V

−

plus 36V

Analog Current Outputs

−=−15V) 4.25 mA

ESD Susceptibility (Note 4) TBD V

Storage Temperature −65˚C to +150˚C

Lead Temp. (Soldering, 10 seconds)

Dual-In-Line Package (plastic) 260˚C

Dual-In-Line Package (ceramic) 300˚C

Surface Mount Package

Vapor Phase (60 seconds) 215˚C

Infrared (15 seconds) 220˚C

Operating Conditions (Note 2)

Min Max Units

Temperature (T

)

DAC0800L −55 +125 ˚C

DAC0800LC 0 +70 ˚C

DAC0802LC 0 +70 ˚C

Electrical Characteristics

The following specifications apply for V

=±15V, I

REF

=2 mA and T

MIN

≤T

MAX

unless otherwise specified. Output

characteristics refer to both I

OUT

and I

OUT

DAC0802LC DAC0800L/

Symbol Parameter Conditions DAC0800LC Units

Min Typ Max Min Typ Max

Resolution 888888Bits

Monotonicity 888888Bits

Nonlinearity ±0.1 ±0.19 %FS

tsSettling Time To ±

⁄

LSB, All Bits Switched 100 135 ns

“ON” or “OFF”, TA=25˚C

DAC0800L 100 135 ns

DAC0800LC 100 150 ns

tPLH, Propagation Delay TA=25˚C

tPHL Each Bit 35 60 35 60 ns

All Bits Switched 35 60 35 60 ns

TCIFS Full Scale Tempco ±10 ±50 ±10 ±50 ppm/˚C

VOC Output Voltage Compliance Full Scale Current Change −10 18 −10 18 V

⁄

LSB, ROUT>20 MΩTyp

IFS4 Full Scale Current VREF=10.000V, R14=5.000 kΩ1.984 1.992 2.000 1.94 1.99 2.04 mA

R15=5.000 kΩ,T

25˚C

IFSS Full Scale Symmetry IFS4−IFS2 ±0.5 ±4.0 ±1±8.0 µA

IZS Zero Scale Current 0.1 1.0 0.2 2.0 µA

IFSR Output Current Range V−=−5V 0 2.0 2.1 0 2.0 2.1 mA

V−=−8V to −18V 0 2.0 4.2 0 2.0 4.2 mA

Logic Input Levels

VIL Logic “0” VLC=0V 0.8 0.8 V

VIH Logic “1” 2.0 2.0 V

Logic Input Current VLC=0V

IIL Logic “0” −10V≤VIN≤+0.8V −2.0 −10 −2.0 −10 µA

IIH Logic “1” 2V≤VIN≤+18V 0.002 10 0.002 10 µA

VIS Logic Input Swing V−=−15V −10 18 −10 18 V

VTHR Logic Threshold Range VS=±15V −10 13.5 −10 13.5 V

I15 Reference Bias Current −1.0 −3.0 −1.0 −3.0 µA

dl/dt Reference Input Slew Rate (

Figure 11

) 4.0 8.0 4.0 8.0 mA/µs

PSSIFS+ Power Supply Sensitivity 4.5V≤V+≤18V 0.0001 0.01 0.0001 0.01 %/%

PSSIFS− −4.5V≤V−≤18V 0.0001 0.01 0.0001 0.01 %/%

IREF=1mA

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Electrical Characteristics (Continued)

The following specifications apply for V

=±15V, I

REF

=2 mA and T

MIN

≤T

MAX

unless otherwise specified. Output

characteristics refer to both I

OUT

and I

OUT

DAC0802LC DAC0800L/

Symbol Parameter Conditions DAC0800LC Units

Min Typ Max Min Typ Max

Power Supply Current VS=±5V, IREF=1mA

I+ 2.3 3.8 2.3 3.8 mA

I− −4.3 −5.8 −4.3 −5.8 mA

VS=5V, −15V, IREF=2mA

I+ 2.4 3.8 2.4 3.8 mA

I− −6.4 −7.8 −6.4 −7.8 mA

VS=±15V, IREF=2mA

I+ 2.5 3.8 2.5 3.8 mA

I− −6.5 −7.8 −6.5 −7.8 mA

PDPower Dissipation ±5V, IREF=1mA 3348 3348mW

5V,−15V, IREF=2 mA 108 136 108 136 mW

±15V, IREF=2 mA 135 174 135 174 mW

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating

the device beyond its specified operating conditions.

Note 3: The maximum junction temperature of the DAC0800 and DAC0802 is 125˚C. For operating at elevated temperatures, devices in the Dual-In-Line J package

must be derated based on a thermal resistance of 100˚C/W, junction-to-ambient, 175˚C/W for the molded Dual-In-Line N package and 100˚C/W for the Small Outline

M package.

Note 4: Human body model, 100 pF discharged through a 1.5 kΩresistor.

Note 5: Pin-out numbers for the DAC080X represent the Dual-In-Line package. The Small Outline package pin-out differs from the Dual-In-Line package.

Connection Diagrams

Dual-In-Line Package

DS005686-13

Top View

Small Outline Package

DS005686-14

Top View

See Ordering Information

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Block Diagram (Note 5)

Typical Performance Characteristics

DS005686-2

Full Scale Current

vs Reference Current

DS005686-22

LSB Propagation Delay vs I

DS005686-23

Reference Input

Frequency Response

DS005686-24

Curve 1: CC=15 pF, VIN=2 Vp-p centered at 1V.

Curve 2: CC=15 pF, VIN=50 mVp-p centered at

200 mV.

Curve 3: CC=0pF,V

IN=100 mVp-p centered at

0V and applied through 50Ωconnected to pin

14.2V applied to R14.

Reference Amp

Common-Mode Range

DS005686-25

Note. Positive common-mode range is always

(V+) − 1.5V.

Logic Input Current

vs Input Voltage

DS005686-26

—V

vs Temperature

DS005686-27

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Typical Performance Characteristics (Continued)

Equivalent Circuit

Output Current vs Output

Voltage (Output Voltage

Compliance)

DS005686-28

Output Voltage Compliance

vs Temperature

DS005686-29

Bit Transfer

Characteristics

DS005686-30

Note. B1–B8 have identical transfer

characteristics. Bits are fully switched with less

than

⁄

LSB error, at less than ±100 mV from

actual threshold. These switching points are

guaranteed to lie between 0.8 and 2V over the

operating temperature range (VLC =0V).

Power Supply Current

vs +V

DS005686-31

Power Supply Current

vs −V

DS005686-32

Power Supply Current

vs Temperature

DS005686-33

DS005686-15

FIGURE 2.

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Typical Applications

DS005686-5

IO+I

O=I

FS for all logic states

For fixed reference, TTL operation, typical values are:

VREF =10.000V

RREF =5.000k

R15 ≈RREF

CC=0.01 µF

VLC =0V (Ground)

FIGURE 3. Basic Positive Reference Operation (Note 5)

DS005686-21

FIGURE 4. Recommended Full Scale Adjustment

Circuit (Note 5)

DS005686-16

Note. RREF sets IFS; R15 is for bias current cancellation

FIGURE 5. Basic Negative Reference Operation

(Note 5)

DS005686-17

B1 B2 B3 B4 B5 B6 B7 B8 I

mA I

mA E

Full Scale 11111111 1.992 0.000 −9.960 0.000

Full Scale−LSB 11111110 1.984 0.008 −9.920 −0.040

Half Scale+LSB 10000001 1.008 0.984 −5.040 −4.920

Half Scale 10000000 1.000 0.992 −5.000 −4.960

Half Scale−LSB 01111111 0.992 1.000 −4.960 −5.000

Zero Scale+LSB 00000001 0.008 1.984 −0.040 −9.920

Zero Scale 00000000 0.000 1.992 0.000 −9.960

FIGURE 6. Basic Unipolar Negative Operation (Note 5)

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Typical Applications (Continued)

DS005686-6

B1 B2 B3 B4 B5 B6 B7 B8 E

Pos. Full Scale 11111111−9.920 +10.000

Pos. Full Scale−LSB 11111110−9.840 +9.920

Zero Scale+LSB 10000001−0.080 +0.160

Zero Scale 10000000 0.000 +0.080

Zero Scale−LSB 01111111+0.080 0.000

Neg. Full Scale+LSB 00000001+9.920 −9.840

Neg. Full Scale 00000000+10.000 −9.920

FIGURE 7. Basic Bipolar Output Operation (Note 5)

DS005686-18

If RL=RLwithin ±0.05%, output is symmetrical about ground

B1 B2 B3 B4 B5 B6 B7 B8 E

Pos. Full Scale 11111111+9.960

Pos. Full Scale−LSB 11111110+9.880

(+)Zero Scale 10000000+0.040

(−)Zero Scale 01111111−0.040

Neg. Full Scale+LSB 00000001−9.880

Neg. Full Scale 00000000−9.960

FIGURE 8. Symmetrical Offset Binary Operation (Note 5)

DS005686-19

For complementary output (operation as negative logic DAC), connect inverting input of op amp to IO(pin 2), connect IO(pin 4) to ground.

FIGURE 9. Positive Low Impedance Output Operation (Note 5)

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Typical Applications (Continued)

DS005686-20

For complementary output (operation as a negative logic DAC) connect non-inverting input of op am to IO(pin 2); connect IO(pin 4) to ground.

FIGURE 10. Negative Low Impedance Output Operation (Note 5)

DS005686-10

Typical values: RIN=5k,+VIN=10V

FIGURE 11. Pulsed Reference Operation (Note 5)

DS005686-9

VTH =VLC + 1.4V

15V CMOS, HTL, HNIL

VTH =7.6V

Note. Do not exceed negative logic input range of DAC.

FIGURE 12. Interfacing with Various Logic Families

DS005686-11

(a) I

REF

≥peak negative swing of I

DS005686-12

(b) +V

REF

must be above peak positive swing of V

FIGURE 13. Accommodating Bipolar References (Note 5)

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Typical Applications (Continued)

DS005686-7

FIGURE 14. Settling Time Measurement (Note 5)

DS005686-8

Note. For 1 µs conversion time with 8-bit resolution and 7-bit accuracy, an LM361 comparator replaces the LM319 and the reference current is doubled by

reducing R1, R2 and R3 to 2.5 kΩand R4 to 2 MΩ.

FIGURE 15. A Complete 2 µs Conversion Time, 8-Bit A/D Converter (Note 5)

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Physical Dimensions inches (millimeters) unless otherwise noted

Molded Small Outline Package (SO)

Order Numbers DAC0800LCM,

or DAC0802LCM

NS Package Number M16A

Molded Small Outline Package (SO)

Order Numbers DAC0800LCM,

or DAC0802LCM

NS Package Number M16A

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

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Molded Dual-In-Line Package

Order Numbers DAC0800, DAC0802

NS Package Number N16E

DAC0800/DAC0802 8-Bit Digital-to-Analog Converters

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.