SEIKO EPSON CORPORATION 1
PF915-03
Micro MINI E0C6008
4-bit Single Chip Microcomputer
● E0C6200C Core CPU
● Built-in LCD Driver
● Serial Interface
■DESCRIPTION
Micro MINI "E0C6008" is a single chip microcomputer for battery-driven products with 7-segment LCD display.
It achieves low cost performance, and is suitable for a product added some feature instead of standard IC.
It consists that Seiko Epson's original core CPU E0C6200C, LCD driver (48 segments × 4 commons), 832
words RAM, 4K words ROM, serial interface, clock timer and so on.
■FEATURES
● CMOS LSI 4-bit parallel processing
● Main clock .......................................................32.768kHz
● Sub clock ........................................................500kHz (Typ. CR/Ceramic)
● Instruction set..................................................108 instructions
● ROM capacity .................................................4,096 × 12 bits
● RAM capacity..................................................832 × 4 bits
● I/O port ............................................................I: 9 bits
O: 8 bits
I/O: 8 bits
● Battery low detection circuit (BLD) .................1.2V (E0C60L08)
2.4V (E0C6008)
2.4V (E0C60A08)
● Clock timer ......................................................1ch.
● Stopwatch timer ..............................................1ch.
● Watchdog timer...............................................Built-in
● Serial interface ................................................Synchronous 8 bits
● LCD driver.......................................................48 segments × 4/3/2 commons
● Operation voltage ...........................................0.9 to 1.7V (E0C60L08)
1.8 to 3.5V (E0C6008)
2.2 to 3.5V (E0C60A08)
● Power consumption ........................................1.0µA (32.768kHz X'tal, 3.0V, HALT)
2.2µA (32.768kHz X'tal, 3.0V, RUN)
50µA (500kHz Ceramic, 3.0V, RUN)
● Package ..........................................................Die form, QFP15-100pin or QFP5-100pin
Low Voltage
Operation
Products
2
E0C6008
■BLOCK DIAGRAM
OSC1
OSC2
OSC3
OSC4
AMPP
AMPM
COM0–3
SEG0–47
V
DD
V
L1
V
L2
V
L3
CA
CB
V
S1
V
SS
K00–K03, K10
K20–K23
TEST
RESET
P00–P03
P10–P13
R00–R03
R10–R13
SIN
SOUT
SCLK
Core CPU E0C6200C
ROM
4,096 words × 12 bits
System Reset
Control
Interrupt
Generator
RAM
832 words × 4 bits
LCD Driver
48 SEG × 4 COM
Power
Controller
OSC
SVD
Event
Counter
Comparator
Sound
Generator
Serial I/F
Timer
Stopwatch
Input Port
I/O Port
Output Port
■PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
COM1
COM0
SEG47
SEG46
SEG45
SEG44
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
No. Pin name 41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
AMPP
AMPM
K23
K22
K21
K20
K10
K03
K02
No. Pin name
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
TEST
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
No. Pin name 61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
K01
K00
SIN
SOUT
N.C.
SCLK
P03
P02
P01
P00
N.C.
N.C.
P13
P12
P11
P10
R03
R02
R01
R00
N.C. = No Connection
No. Pin name 81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
R12
R11
R10
R13
V
SS
RESET
OSC4
OSC3
V
S1
OSC2
OSC1
V
DD
V
L3
V
L2
V
L1
CA
CB
N.C.
COM3
COM2
No. Pin name
5180
31
50
INDEX
301
100
81
E0C6008
QFP5-100pin
3
E0C6008
■PIN DESCRIPTION
Pin name
V
DD
V
SS
V
S1
V
L1
V
L2
V
L3
CA, CB
OSC1
OSC2
OSC3
OSC4
K00–K03
K10
K20–K23
P00–P03
P10–P13
R00–R03
R10
R13
R11
R12
SIN
SOUT
SCLK
AMPP
AMPM
SEG0–47
COM0–3
RESET
TEST
Pin No. Function
Power supply pin (+)
Power supply pin (-)
Oscillation and internal logic system voltage output pin
LCD drive voltage output pin (approx. -1.05 V or 1/2·V
L2
)
LCD drive voltage output pin (2·V
L1
or approx. -2.10 V)
LCD drive voltage output pin (3·V
L1
or 3/2·V
L2
)
Boost capacitor connecting pin
Cryctal oscillation input pin
Crystal oscillation output pin
CR or ceramic oscillation input pin ∗ (N.C. for E0C6008 and E0C60L08)
CR or ceramic oscillation output pin ∗ (N.C. for E0C6008 and E0C60L08)
Input port pin
Input port pin
Input port pin
I/O port pin
I/O port pin
Output port pin
Output port pin or BZ output pin ∗
Output port pin or BZ output pin ∗
Output port pin or SIOF output pin ∗
Output port pin or FOUT output pin ∗
Serial interface data input pin
Serial interface data output pin
Serial interface clock input/output pin
Analog comparator non-inverted input pin
Analog comparator inverted input pin
LCD segment output pin
or DC output pin ∗
LCD common output pin (1/2, 1/3 or 1/4 duty are selectable ∗)
Initial reset input pin
Input pin for test
QFP5-100
92
85
89
95
94
93
96, 97
91
90
88
87
62–59
58
57–54
70–67
76–73
80–77
83
84
82
81
63
64
66
52
53
51–28, 26–3
2, 1, 100, 99
86
27
QFP15-100
90
83
87
93
92
91
94, 95
89
88
86
85
61–58
57
56–53
70–67
74–71
78–75
81
82
80
79
62
63
65
51
52
50–39, 37–26,
24–1
100–97
84
25
I/O
(I)
(I)
–
–
–
–
–
I
O
I
O
I
I
I
I/O
I/O
O
O
O
O
O
I
O
I/O
I
I
O
O
I
I
∗ Can be selected by mask option
5175
26
50
INDEX
251
100
76
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SEG47
SEG46
SEG45
SEG44
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
No. Pin name 41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
AMPP
AMPM
K23
K22
K21
K20
K10
K03
K02
K01
No. Pin name
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
SEG27
SEG26
SEG25
SEG24
TEST
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
N.C.
SEG11
SEG10
No. Pin name 61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
K00
SIN
SOUT
N.C.
SCLK
N.C.
P03
P02
P01
P00
P13
P12
P11
P10
R03
R02
R01
R00
R12
R11
N.C. = No Connection
No. Pin name 81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
R10
R13
V
SS
RESET
OSC4
OSC3
V
S1
OSC2
OSC1
V
DD
V
L3
V
L2
V
L1
CA
CB
N.C.
COM3
COM2
COM1
COM0
No. Pin name
E0C6008
QFP15-100pin
4
E0C6008
■BASIC EXTERNAL CONNECTION DIAGRAM
E0C6008 and E0C60L08
E0C60A08
K00
:
K03
K10
K20
:
K23
P00
:
P03
P10
:
P13
SIN
SOUT
SCLK
AMPM
AMPP
R00
:
R03
R11 (LAMP)
R12 (FOUT)
SEG0
SEG47
COM0
COM3
R10 (BZ)
R13 (BZ)
CB
CA
V
L1
V
L2
V
L3
V
DD
OSC1
OSC2
V
S1
OSC3
OSC4
RESET
TEST
V
SS
+
Lamp Piezo
C
1
C
2
C
5
N.C. 3.0 V (E0C6008)
or
1.5 V (E0C60L08)
N.C.
C
P
C
4
C
3
C
GX
X'tal
E0C6008
E0C60L08
LCD panel
I/O
SIO
O
I
X'tal
C
GX
C
1
C
2
C
3
C
4
C
5
C
P
R
A1
R
A2
Crystal oscillator
Trimmer capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Protection resistor
Protection resistor
32.768 kHz or 38.400 kHz,
C
I
= 35 kΩ
5–25 pF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
3.3 µF
100 Ω
100 Ω
R13 (BZ)
R10 (BZ)
R
A2
When the piezoelectric buzzer
is driven directly
R
A1
Piezo
K00
:
K03
K10
K20
:
K23
P00
:
P03
P10
:
P13
SIN
SOUT
SCLK
AMPM
AMPP
R00
:
R03
R11 (LAMP)
R12 (FOUT)
SEG0
SEG47
COM0
COM3
R10 (BZ)
R13 (BZ)
CB
CA
V
L1
V
L2
V
L3
V
DD
OSC1
OSC2
V
S1
OSC3
OSC4
RESET
TEST
V
SS
+
Lamp Piezo
C
1
C
2
C
5
CR
C
GC
R
CR
C
DC
3.0 V
C
P
C
4
C
3
C
GX
X'tal
E0C60A08
LCD panel
I/O
SIO
O
I
X'tal
C
GX
CR
C
GC
C
DC
R
CR
C
1
C
2
C
3
C
4
C
5
C
P
R
A1
R
A2
Crystal oscillator
Trimmer capacitor
Ceramic oscillator
Gate capacitor
Drain capacitor
Resistor for CR oscillation
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Protection resistor
Protection resistor
32.768 kHz or 38.400 kHz,
C
I
= 35 kΩ
5–25 pF
500 kHz
100 pF
100 pF
82 kΩ
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
3.3 µF
100 Ω
100 Ω
R13 (BZ)
R10 (BZ)
R
A2
When the piezoelectric buzzer
is driven directly
R
A1
Piezo
∗1
∗1 Ceramic oscillation
∗2 CR oscillation
∗2
Note: The above tables are simply an example, and are not guaranteed to work.
5
E0C6008
■ELECTRICAL CHARACTERISTICS
●Absolute Maximum Ratings
E0C6008 and E0C60A08
Rating
Supply voltage
Input voltage (1)
Input voltage (2)
Permissible total output current
∗
1
Operating temperature
Storage temperature
Soldering temperature / time
Permissible dissipation ∗
2
(V
DD
=0V)
Symbol
V
SS
V
I
V
IOSC
ΣI
VSS
Topr
Tstg
Tsol
P
D
Value
-5.0 to 0.5
V
SS
-0.3 to 0.5
V
S1
-0.3 to 0.5
10
-20 to 70
-65 to 150
260°C, 10sec (lead section)
250
Unit
V
V
V
mA
°C
°C
–
mW
∗1:
∗2:
The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in).
In case of plastic package.
E0C60L08
Rating
Supply voltage
Input voltage (1)
Input voltage (2)
Permissible total output current
∗
1
Operating temperature
Storage temperature
Soldering temperature / time
Permissible dissipation ∗
2
(V
DD
=0V)
Symbol
V
SS
V
I
V
IOSC
ΣI
VSS
Topr
Tstg
Tsol
P
D
Value
-2.0 to 0.5
V
SS
-0.3 to 0.5
V
S1
-0.3 to 0.5
10
-20 to 70
-65 to 150
260°C, 10sec (lead section)
250
Unit
V
V
V
mA
°C
°C
–
mW
∗1:
∗2:
The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in).
In case of plastic package.
●Recommended Operating Conditions
E0C6008
Condition
Supply voltage
Oscillation frequency
(Ta=-20 to 70°C)
Symbol
V
SS
f
OSC1
Unit
V
kHz
kHz
Max.
-1.8
–
–
Typ.
-3.0
32.768
38.400
Min.
-3.5
–
–
Remark
V
DD
=0V
Either one is selected
E0C60L08
Condition
Supply voltage
Oscillation frequency
∗1:
∗2:
(Ta=-20 to 70°C)
Symbol
V
SS
f
OSC1
Unit
V
V
V
kHz
kHz
Max.
-1.1
-0.9
∗2
-1.2
–
–
Typ.
-1.5
-1.5
-1.5
32.768
38.400
Min.
-1.7
-1.7
-1.7
–
–
When switching to heavy load protection mode.
The possibility of LCD panel display differs depending on the characteristics of the LCD panel.
Remark
V
DD
=0V
V
DD
=0V, with software control
∗1
V
DD
=0V, when analog comparator is used
Either one is selected
E0C60A08
Condition
Supply voltage
Oscillation frequency (1)
Oscillation frequency (2)
(Ta=-20 to 70°C)
Symbol
V
SS
f
OSC1
f
OSC3
Unit
V
kHz
kHz
kHz
Max.
-2.2
–
–
600
Typ.
-3.0
32.768
38.400
500
Min.
-3.5
–
–
50
Remark
V
DD
=0V
Either one is selected
duty 50±5%
6
E0C6008
●DC Characteristics
E0C6008 and E0C60A08
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
Low level output current (1)
Low level output current (2)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Symbol
V
IH1
V
IH2
V
IL1
V
IL2
I
IH1
I
IH2
I
IH3
I
IL
I
OH1
I
OH2
I
OL1
I
OL2
I
OH3
I
OL3
I
OH4
I
OL4
I
OH5
I
OL5
Unit
V
V
V
V
µA
µA
µA
µA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
Max.
0
0
0.8·V
SS
0.9·V
SS
0.5
16
100
0
-1.8
-0.9
-3
-3
-200
Typ.Min.
0.2·V
SS
0.1·V
SS
V
SS
V
SS
0
4
25
-0.5
6.0
3.0
3
3
200
Condition
K00–03, K10, K20–23, P00–03
P10–13, SIN
SCLK, RESET, TEST
K00–03, K10, K20–23, P00–03
P10–13, SIN
SCLK, RESET, TEST
V
IH1
=0V K00–03, K10, K20–23, P00–03
No pull-down P10–13, SIN, SCLK, AMPP
AMPM, RESET
V
IH2
=0V K00–03, K10, K20–23, SIN
With pull-down SCLK
V
IH3
=0V P00–03, P10–13, RESET, TEST
With pull-down
V
IL
=V
SS
K00–03, K10, K20–23, P00–03
P10–13, SIN, SCLK, AMPP
AMPM, RESET, TEST
V
OH1
=0.1·V
SS
R10, R11, R13
V
OH2
=0.1·V
SS
R00–03, R12, P00–03, P10–13
SOUT, SCLK
V
OL1
=0.9·V
SS
R10, R11, R13
V
OL2
=0.9·V
SS
R00–03, R12, P00–03, P10–13
SOUT, SCLK
V
OH3
=-0.05V COM0–3
V
OL3
=V
L3
+0.05V
V
OH4
=-0.05V SEG0–47
V
OL4
=V
L3
+0.05V
V
OH5
=0.1·V
SS
SEG0–47
V
OL5
=0.9·V
SS
E0C60L08
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
Low level output current (1)
Low level output current (2)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Symbol
V
IH1
V
IH2
V
IL1
V
IL2
I
IH1
I
IH2
I
IH3
I
IL
I
OH1
I
OH2
I
OL1
I
OL2
I
OH3
I
OL3
I
OH4
I
OL4
I
OH5
I
OL5
Unit
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
Max.
0
0
0.8·V
SS
0.9·V
SS
0.5
10
60
0
-300
-150
-3
-3
-100
Typ.Min.
0.2·V
SS
0.1·V
SS
V
SS
V
SS
0
2
12
-0.5
1400
700
3
3
100
Condition
K00–03, K10, K20–23, P00–03
P10–13, SIN
SCLK, RESET, TEST
K00–03, K10, K20–23, P00–03
P10–13, SIN
SCLK, RESET, TEST
V
IH1
=0V K00–03, K10, K20–23, P00–03
No pull-down P10–13, SIN, SCLK, AMPP
AMPM, RESET
V
IH2
=0V K00–03, K10, K20–23, SIN
With pull-down SCLK
V
IH3
=0V P00–03, P10–13, RESET, TEST
With pull-down
V
IL
=V
SS
K00–03, K10, K20–23, P00–03
P10–13, SIN, SCLK, AMPP
AMPM, RESET, TEST
V
OH1
=0.1·V
SS
R10, R11, R13
V
OH2
=0.1·V
SS
R00–03, R12, P00–03, P10–13
SOUT, SCLK
V
OL1
=0.9·V
SS
R10, R11, R13
V
OL2
=0.9·V
SS
R00–03, R12, P00–03, P10–13
SOUT, SCLK
V
OH3
=-0.05V COM0–3
V
OL3
=V
L3
+0.05V
V
OH4
=-0.05V SEG0–47
V
OL4
=V
L3
+0.05V
V
OH5
=0.1·V
SS
SEG0–47
V
OL5
=0.9·V
SS
7
E0C6008
●Analog Circuit Characteristics and Current Consumption
E0C6008 (Normal Operating Mode)
Characteristic
LCD drive voltage
BLD voltage
∗1
BLD circuit response time
Sub-BLD voltage
Sub-BLD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
∗1:
∗2:
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Symbol
V
L1
V
L2
V
L3
V
B0
V
B1
V
B2
V
B3
V
B4
V
B5
V
B6
V
B7
t
B
V
BS
t
BS
V
IP
V
IM
V
OF
t
AMP
I
OP
Unit
V
V
V
V
V
V
V
V
V
V
V
µsec
V
µsec
V
mV
msec
µA
µA
Max.
1/2·V
L2
×0.9
-1.90
3/2·V
L2
×0.9
-2.05
-2.10
-2.15
-2.20
-2.25
-2.30
-2.35
-2.40
100
-2.25
100
V
DD
-0.9
10
3
2.0
4.0
Typ.
-2.10
-2.20
-2.25
-2.30
-2.35
-2.40
-2.45
-2.50
-2.55
-2.40
1.0
2.2
Min.
1/2·V
L2
- 0.1
-2.30
3/2·V
L2
- 0.1
-2.35
-2.40
-2.45
-2.50
-2.55
-2.60
-2.65
-2.70
-2.55
V
SS
+0.3
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
The BLD circuit, sub-BLD circuit and analog comparator are in the OFF status.
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
BLC="0"
BLC="1"
BLC="2"
BLC="3"
BLC="4"
BLC="5"
BLC="6"
BLC="7"
Non-inverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.5V
V
IM
=V
IP
±15mV
During HALT Without
During operation
∗2
panel load
E0C6008 (Heavy Load Protection Mode)
Characteristic
LCD drive voltage
BLD voltage
∗1
BLD circuit response time
Sub-BLD voltage
Sub-BLD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
∗1:
∗2:
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Symbol
V
L1
V
L2
V
L3
V
B0
V
B1
V
B2
V
B3
V
B4
V
B5
V
B6
V
B7
t
B
V
BS
t
BS
V
IP
V
IM
V
OF
t
AMP
I
OP
Unit
V
V
V
V
V
V
V
V
V
V
V
µsec
V
µsec
V
mV
msec
µA
µA
Max.
1/2·V
L2
×0.9
-1.90
3/2·V
L2
×0.9
-2.05
-2.10
-2.15
-2.20
-2.25
-2.30
-2.35
-2.40
100
-2.25
100
V
DD
-0.9
10
3
20
25
Typ.
-2.10
-2.20
-2.25
-2.30
-2.35
-2.40
-2.45
-2.50
-2.55
-2.40
10
12
Min.
1/2·V
L2
- 0.1
-2.30
3/2·V
L2
- 0.1
-2.35
-2.40
-2.45
-2.50
-2.55
-2.60
-2.65
-2.70
-2.55
V
SS
+0.3
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
The BLD circuit and sub-BLD circuit are in the ON status (HLMOD="1", BLS="0").
The analog comparator is in the OFF status.
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
BLC="0"
BLC="1"
BLC="2"
BLC="3"
BLC="4"
BLC="5"
BLC="6"
BLC="7"
Non-inverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.5V
V
IM
=V
IP
±15mV
During HALT Without
During operation
∗2
panel load
8
E0C6008
E0C60L08 (Normal Operating Mode)
Characteristic
LCD drive voltage
BLD voltage
∗1
BLD circuit response time
Sub-BLD voltage
Sub-BLD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
∗1:
∗2:
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Symbol
V
L1
V
L2
V
L3
V
B0
V
B1
V
B2
V
B3
V
B4
V
B5
V
B6
V
B7
t
B
V
BS
t
BS
V
IP
V
IM
V
OF
t
AMP
I
OP
Unit
V
V
V
V
V
V
V
V
V
V
V
µsec
V
µsec
V
mV
msec
µA
µA
Max.
-0.95
2·V
L1
×0.9
3·V
L1
×0.9
-0.95
-1.00
-1.05
-1.10
-1.15
-1.20
-1.25
-1.30
100
-1.10
100
V
DD
-0.9
20
3
2.0
4.0
Typ.
-1.05
-1.05
-1.10
-1.15
-1.20
-1.25
-1.30
-1.35
-1.40
-1.20
1.0
2.2
Min.
-1.15
2·V
L1
- 0.1
3·V
L1
- 0.1
-1.15
-1.20
-1.25
-1.30
-1.35
-1.40
-1.45
-1.50
-1.30
V
SS
+0.3
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
The BLD circuit, sub-BLD circuit and analog comparator are in the OFF status.
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
BLC="0"
BLC="1"
BLC="2"
BLC="3"
BLC="4"
BLC="5"
BLC="6"
BLC="7"
Non-inverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.1V
V
IM
=V
IP
±30mV
During HALT Without
During operation
∗2
panel load
E0C60L08 (Heavy Load Protection Mode)
Max.
-0.95
2·V
L1
×0.85
3·V
L1
×0.85
-0.95
-1.00
-1.05
-1.10
-1.15
-1.20
-1.25
-1.30
100
-1.10
100
V
DD
-0.9
20
3
10
15
Typ.
-1.05
-1.05
-1.10
-1.15
-1.20
-1.25
-1.30
-1.35
-1.40
-1.20
6.5
8.5
Min.
-1.15
2·V
L1
- 0.1
3·V
L1
- 0.1
-1.15
-1.20
-1.25
-1.30
-1.35
-1.40
-1.45
-1.50
-1.30
V
SS
+0.3
Characteristic
LCD drive voltage
BLD voltage
∗1
BLD circuit response time
Sub-BLD voltage
Sub-BLD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
∗1:
∗2:
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Symbol
V
L1
V
L2
V
L3
V
B0
V
B1
V
B2
V
B3
V
B4
V
B5
V
B6
V
B7
t
B
V
BS
t
BS
V
IP
V
IM
V
OF
t
AMP
I
OP
Unit
V
V
V
V
V
V
V
V
V
V
V
µsec
V
µsec
V
mV
msec
µA
µA
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
The BLD circuit and sub-BLD circuit are in the ON status (HLMOD="1", BLS="0").
The analog comparator is in the OFF status.
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
BLC="0"
BLC="1"
BLC="2"
BLC="3"
BLC="4"
BLC="5"
BLC="6"
BLC="7"
Non-inverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.1V
V
IM
=V
IP
±30mV
During HALT Without
During operation
∗2
panel load
9
E0C6008
E0C60A08 (Normal Operating Mode)
Characteristic
LCD drive voltage
BLD voltage
∗1
BLD circuit response time
Sub-BLD voltage
Sub-BLD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
∗1:
∗2:
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Symbol
V
L1
V
L2
V
L3
V
B0
V
B1
V
B2
V
B3
V
B4
V
B5
V
B6
V
B7
t
B
V
BS
t
BS
V
IP
V
IM
V
OF
t
AMP
I
OP
Unit
V
V
V
V
V
V
V
V
V
V
V
µsec
V
µsec
V
mV
msec
µA
µA
µA
Max.
-0.95
2·V
L1
×0.9
3·V
L1
×0.9
-2.05
-2.10
-2.15
-2.20
-2.25
-2.30
-2.35
-2.40
100
-2.25
100
V
DD
-0.9
10
3
2.0
5.0
70
Typ.
-1.05
-2.20
-2.25
-2.30
-2.35
-2.40
-2.45
-2.50
-2.55
-2.40
1.1
3.0
50
Min.
-1.15
2·V
L1
- 0.1
3·V
L1
- 0.1
-2.35
-2.40
-2.45
-2.50
-2.55
-2.60
-2.65
-2.70
-2.55
V
SS
+0.3
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
The BLD circuit, sub-BLD circuit and analog comparator are in the OFF status.
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
BLC="0"
BLC="1"
BLC="2"
BLC="3"
BLC="4"
BLC="5"
BLC="6"
BLC="7"
Non-inverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.5V
V
IM
=V
IP
±15mV
During HALT Without
During operation
∗2
panel load
During operation at 500kHz
∗2
E0C60A08 (Heavy Load Protection Mode)
Characteristic
LCD drive voltage
BLD voltage
∗1
BLD circuit response time
Sub-BLD voltage
Sub-BLD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
∗1:
∗2:
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Symbol
V
L1
V
L2
V
L3
V
B0
V
B1
V
B2
V
B3
V
B4
V
B5
V
B6
V
B7
t
B
V
BS
t
BS
V
IP
V
IM
V
OF
t
AMP
I
OP
Unit
V
V
V
V
V
V
V
V
V
V
V
µsec
V
µsec
V
mV
msec
µA
µA
µA
Max.
-0.95
2·V
L1
×0.9
3·V
L1
×0.9
-2.05
-2.10
-2.15
-2.20
-2.25
-2.30
-2.35
-2.40
100
-2.25
100
V
DD
-0.9
10
3
10
15
75
Typ.
-1.05
-2.20
-2.25
-2.30
-2.35
-2.40
-2.45
-2.50
-2.55
-2.40
6.5
8.5
55
Min.
-1.15
2·V
L1
- 0.1
3·V
L1
- 0.1
-2.35
-2.40
-2.45
-2.50
-2.55
-2.60
-2.65
-2.70
-2.55
V
SS
+0.3
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
The BLD circuit and sub-BLD circuit are in the ON status (HLMOD="1", BLS="0").
The analog comparator is in the OFF status.
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
BLC="0"
BLC="1"
BLC="2"
BLC="3"
BLC="4"
BLC="5"
BLC="6"
BLC="7"
Non-inverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.5V
V
IM
=V
IP
±15mV
During HALT Without
During operation
∗2
panel load
During operation at 500kHz
∗2
10
E0C6008
●Oscillation Characteristics
Oscillation characteristics will vary according to different conditions (elements used, boad pattern). Use the following char-
acteristics are as reference values.
E0C6008 (OSC1 Crystal Oscillation)
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∆f/∆V
∆f/∆IC
∆f/∆C
G
V
hho
R
leak
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
Max.
5
10
-3.5
Typ.
20
45
Min.
-1.8
-1.8
-10
35
200
Condition
t
sta≤5sec (V
SS
)
t
stp≤10sec (V
SS
)
Including the parasitic capacitance inside the chip
V
SS
=-1.8 to -3.5V
C
G
=5 to 25pF
(V
SS
)
Between OSC1 and V
DD
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
E0C60L08 (OSC1 Crystal Oscillation)
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
∗1:
Symbol
Vsta
Vstp
C
D
∆f/∆V
∆f/∆IC
∆f/∆C
G
V
hho
R
leak
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
Max.
5
10
-1.7
Typ.
20
45
Min.
-1.1
-1.1
(-0.9)
∗1
-10
35
200
Parentheses indicate value for operation in heavy load protection mode.
Condition
t
sta≤5sec (V
SS
)
t
stp≤10sec (V
SS
)
Including the parasitic capacitance inside the chip
V
SS
=-1.1 (-0.9)
∗1
to -1.7V
C
G
=5 to 25pF
(V
SS
)
Between OSC1 and V
DD
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
E0C60A08 (OSC1 Crystal Oscillation)
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∆f/∆V
∆f/∆IC
∆f/∆C
G
V
hho
R
leak
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
Max.
5
10
-3.5
Typ.
20
45
Min.
-2.2
-2.2
-10
35
200
Condition
t
sta≤5sec (V
SS
)
t
stp≤10sec (V
SS
)
Including the parasitic capacitance inside the chip
V
SS
=-2.2 to -3.5V
C
G
=5 to 25pF
(V
SS
)
Between OSC1 and V
DD
Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C
E0C60A08 (OSC3 CR Oscillation)
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
f
OSC3
Vsta
t
sta
Vstp
Unit
%
V
msec
V
Max.
30
3
Typ.
480kHz
Min.
-30
-2.2
-2.2
Condition
(V
SS
)
V
SS
=-2.2 to -3.5V
(V
SS
)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, R
CR
=82kΩ, Ta=25°C)
E0C60A08 (OSC3 Ceramic Oscillation)
Characteristic
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
Vsta
t
sta
Vstp
Unit
V
msec
V
Max.
5
Typ.Min.
-2.2
-2.2
Condition
(V
SS
)
V
SS
=-2.2 to -3.5V
(V
SS
)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, Ceramic oscillator: 500kHz, C
GC
=C
DC
=100pF, Ta=25°C)
E0C6008
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko
Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of
any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that
this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual
property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this
material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the
subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an
export license from the Ministry of International Trade and Industry or other approval from another government agency.
© Seiko Epson Corporation 1999 All right reserved.
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
ED International Marketing Department I (Europe & U.S.A.)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5812 FAX : 042-587-5564
ED International Marketing Department II (Asia)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5814 FAX : 042-587-5110
