TDA7575PDTR - STMicroelectronics - Datasheet.Directory

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TDA7575PD

March 2004

■DMOS POWER OUTPUT

■NON-SWITCHING HI-EFFICIENCY

■SINGLE-CHANNEL 1Ω DRIVING CAPABILITY

■HIGH OUTPUT POWER CAPABILITY 2x28W/

4Ω @ 14.4V, 1KHZ, 10% THD, 2x40W/4Ω EIAJ

■

MAX. OUTPUT POWER 2x75W/2

Ω,

1x150W/1

Ω

■SINGLE-CHANNEL 1Ω DRIVING CAPABILITY

– 84W UNDISTORTED POWER

– FULL I2C BUS DRIVING WITH 4 ADDRESS

POSSIBILITIES:

– ST-BY, PLAY/MUTE, GAIN 12/26dB, FULL

DIGITAL DIAGNOSTIC

■POSSIBILITY TO DISABLE THE I2C

■DIFFERENTAL INPUTS

■FULL FAULT PROTECTION

■DC OFFSET DETECTION

■TWO INDEPENDENT SHORT CIRCUIT

PROTECTIONS

■CLIPPING DETECTOR PIN WITH

SELECTABLE THRESHOLD (2%/10%)

■ST-BY/MUTE PINS

DESCRIPTION

The TDA7575PD is a new BCD technology DUAL

BRIDGE type of car radio amplifier in PowerSO36

package specially intended for car radio applications.

Thanks to the DMOS output stage the TDA7575PD

has a very low distortion allowing a clear powerful

sound. Among the features, its superior efficiency

performance coming from the internal exclusive

structure, makes it the most suitable device to simpli-

fy the thermal management in high power sets.The

dissipated output power under average listening con-

dition is in fact reduced up to 50% when compared to

the level provided by conventional class AB solu-

tions.

This device is equipped with a full diagnostic array

that communicates the status of each speaker

through the I

C bus.

The TDA7575PD has also the

possibility of driving loads down to 1

Ω

paralleling the

outputs into a single channel. It is also possible to dis-

able the I

C and control the TDA7575PD by means of

the usual ST-BY and MUTE pins.

MULTIPOWER BCD TECHNOLOGY

MULTIFUNCTION DUAL BRIDGE POWER AMPLIFIER

WITH INTEGRATED DIGITAL DIAGNOSTICS

BLOCK DIAGRAM

I2CBUS

A B CLK

ADDRESS DATA VCC CD_OUT

OUT1+

OUT1-

OUT2+

OUT2-

CLIP

DETECTOR

SHORT CIRCUIT

PROTECTION

SHORT CIRCUIT

PROTECTION

IN1+

SVR S_GND

I2C EN

PW_GND TAB

ST-BY/HE 1ΩMUTE

IN1-

IN2+

IN2-

D01AU1269

MOSFET OUTPUT POWER STAGE

PowerSO36 (Slug up)

ORDERING NUMBER: TDA7575PD

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PIN CONNECTION

(Top view)

ABSOLUTE MAXIMUM RATINGS

THERMAL DATA

Symbol Parameter Value Unit

Vop Operating Supply Voltage 18 V

VSDC Supply Voltage 28 V

Vpeak Peak Supply Voltage (for t = 50ms) 50 V

VCK CK pin Voltage 6 V

VDATA Data Pin Voltage 6 V

IOOutput Peak Current (not repetitive t = 100ms) 8 A

IOOutput Peak Current (repetitive f > 10Hz) 6 A

Ptot Power Dissipation Tcase = 70°C 86 W

Tstg, TjStorage and Junction Temperature -55 to 150 °C

Symbol Parameter Value Unit

Rth j-case Thermal Resistance Junction-case Max 1 °C/W

TAB

OUT2+

D01AU1270

1027

1324

IN2+

IN2-

I2C-EN

CD-OUT

1-OHM

ST_BY

MUTE

IN1-

IN1+

SVR

N.C.

SGND

DATA

OUT1+

VCC

PWGND

VCC

OUT2+

OUT1-

OUT2-

OUT1-

VCC

PWGND

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TDA7575PD

Symbol Parameter Test Condition Min. Typ. Max. Unit

POWER AMPLIFIER

VSSupply Voltage Range 8 18 V

IdTotal Quiescent Drain Current 50 130 200 mA

Po Output Power EIAJ (VS = 13.7V) 35 40 W

THD = 10%

THD = 1%; BTL MODE

25 28

RL = 2Ω; EIAJ (VS = 13.7V)

RL = 2Ω; THD 10%

RL = 2Ω; THD 1%

RL = 2Ω; MAX POWER

Single channel configuration

(1Ω pin >2.5V); RL = 1Ω;

EIAJ (VS = 13.7V)

THD 3%

MAX POWER

125

140

130

150

THD Total Harmonic Distortion PO = 1-12W; STD MODE

HE MODE; PO = 1-2W

HE MODE; PO = 4-8W

0.03

0.5

0.1

PO = 1-12W, f = 10kHz 0.15 0.5 %

RL = 2; HE MODE; Po = 3W 0.03 0.5 %

Single channel configuration

(1Ω pin >2.5V); RL = 1; PO = 4-30W

0.02 0.1 %

CTCross Talk Rg = 600Ω; PO = 1W 60 75 dB

RIN Input Impedance 60 100 130 KΩ

GV1 Voltage Gain 1 (default) 25 26 27 dB

∆GV1 Voltage Gain Match 1 -1 0 1 dB

GV2 Voltage Gain 2 11 12 13 dB

∆GV2 Voltage Gain Match 2 -1 0 1 dB

EIN1 Output Noise Voltage Gain 1 Rg = 600Ω; Gv = 26dB

filter 20 to 22kHz

40 60 µV

EIN2 Output Noise Voltage Gain 2 Rg = 600Ω; Gv = 12dB

filter 20 to 22kHz

15 25 µV

SVR Supply Voltage Rejection f = 100Hz to 10kHz; Vr = 1Vpk;

Rg = 600Ω

50 60 dB

BW Power Bandwidth (-3dB) 100 KHz

ASB Stand-by Attenuation 90 100 dB

ISB Stand-by Current Consumption 2 20 µA

AMMute Attenuation 80 90 dB

VOS Offset Voltage Mute & Play -45 0 45 mV

VAM Min. Supply Mute Threshold 7 7.5 8 V

CMRR Input CMRR VCM = 1Vpk-pk; Rg = 0 Ω50 60 dB

ELECTRICAL CHARACTERISTCS:

(VS=14.4V; f=1KHz; RL=4Ω; Tamb= 25°C unless otherwise specified)

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VMC Maximum common mode input

level

f = 1kHz 1 Vrms

SR Slew Rate 1.5 4 V/µs

∆VPM Mute/Unmute Transient A-weighted -100 0 100 mVpp

∆VTO Mute/Stand-by Transient A-weighted -100 0 100 mVpp

TON Turn on Delay D2 (IB1) 0 to 1 15 40 ms

TOFF Turn off Delay D2 (IB1) 1 to 0 15 40 ms

VOFF St-By pin for St-By 0 1.5 V

VSB St-By pin for standard bridge 3.5 5 V

VHE St-By pin for Hi-eff 7 18 V

IOSt-By pin Current 1.5 < Vstby/HE < 18V 7 160 200 µA

St-By Pin Current Vstby < 1.5V -10 0 10 µA

VmMute pin voltage for mute mode 0 1.5 V

VmMute pin voltage for play mode 3.5 18 V

ImMute pin current (ST_BY) Vmute = 0V, Vstby < 1.5V -5 0 5 µA

ImMute pin current (operative) 0V < Vmute < 18V, Vstby > 3.5V 65 100 µA

VI2C I2C pin voltage for I2C disabled 0 1.5 V

VI2C I2C pin voltage for I2C enabled 2.5 18 V

I2C I2C pin current (stby) 0V < I2C EN < 18V, Vstby < 1.5V -5 0 5 µA

I2C I2C pin current (operative) I2C EN <18V, Vstby>3.5V 7 11 15 µA

V1OHM 1OHM pin voltage for 2ch mode 0 1.5 V

V1OHM 1OHM pin voltage for 1ohm

mode

2.5 18 V

I1OHM 1OHM pin current (stby) 0V < 1OHM <18V, Vstby < 1.5V -5 0 5 µA

I1OHM 1OHM pin current (operative) 1OHM <18V, Vstby > 3.5V 7 11 15 µA

La A Pin Voltage Low logic level 0 1.5 V

Ha High logic level 2.5 18 V

Ia A Pin Current (ST-BY) 0V < A < 18V, Vstby < 1.5V -5 0 5 µA

Ia A Pin Current (Operative) A<18V, Vstby > 3.5V 7 11 15 µA

Lb B Pin Voltage Low logic level 0 1.5 V

Hb High logic level 2.5 18 V

Ib B Pin Current (ST-BY) 0V < B < 18V, Vstby < 1.5V -5 0 5 µA

Ib B Pin Current (Operative) B < 18V, Vstby > 3.5V 7 11 15 µA

TWThermal warning 150 °C

TPI Thermal Protection intervention 170 °C

ICDH Clip Pin High Leakage Current CD off, 0V < VCD < 5.5V -15 0 15 µA

Symbol Parameter Test Condition Min. Typ. Max. Unit

ELECTRICAL CHARACTERISTCS:

(continued)

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TDA7575PD

ICDL Clip Pin Low Sink Current CD on; VCD < 300mV 1 mA

CD Clip detect THD level D0 (IB1) = 0 0.8 1.3 2.5 %

D0 (IB1) = 1 5 10 15 %

(*) ST-BY Pin high enables I2C bus; ST-BY Pin low puts the device in ST-BY condition.(see “prog” for more details)

TURN ON DIAGNOSTICS (Power Amplifier Mode)

Pgnd Short to GND det. (below this

limit, the Output is considered in

Short Circuit to GND)

Power Amplifier in st-by condition 1.2 V

Pvs Short to Vs det. (above this

limit, the Output is considered in

Short Circuit to VS)

Vs -0.9 V

Pnop Normal operation

thresholds.(Within these limits,

the Output is considered

without faults).

1.8 Vs -1.5 V

Lsc Shorted Load det. 0.5 Ω

Lop Open Load det. 130 Ω

Lnop Normal Load det. 1.5 70 Ω

TURN ON DIAGNOSTICS (Line Driver Mode)

Pgnd Short to GND det. (below this

limit, the Output is considered in

Short Circuit to GND)

Power Amplifier in st-by 1.2 V

Pvs Short to Vs det. (above this

limit, the Output is considered in

Short Circuit to VS)

Vs -0.9 V

Pnop Normal operation

thresholds.(Within these limits,

the Output is considered

without faults).

1.8 Vs -1.5 V

Lsc Shorted Load det. 1.5 Ω

Lop Open Load det. 400 Ω

Lnop Normal Load det. 4.5 200 Ω

PERMANENT DIAGNOSTICS (Power Amplifier Mode or Line Driver Mode)

Pgnd Short to GND det. (below this

limit, the Output is considered in

Short Circuit to GND)

Power Amplifier in Mute or Play

condition, one or more short circuits

protection activated

1.2 V

Pvs Short to Vs det. (above this

limit, the Output is considered in

Short Circuit to VS)

- 0.9

Pnop Normal operation

thresholds.(Within these limits,

the Output is considered

without faults).

1.8 Vs -1.5 V

Lsc Shorted Load det. Pow. Amp. mode 0.5 Ω

Line Driver mode 1.5 Ω

Symbol Parameter Test Condition Min. Typ. Max. Unit

ELECTRICAL CHARACTERISTCS:

(continued)

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C BUS INTERFACE

Data transmission from microprocessor to the TDA7575PD and viceversa takes place through the 2 wires I

C BUS

interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).

Data Validity

As shown by fig. 1, the data on the SDA line must be stable during the high period of the clock.

The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.

Start and Stop Conditions

As shown by fig. 2 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.

The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.

Byte Format

Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.

The MSB is transferred first.

Acknowledge

The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig.3). The

receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that

the SDAline is stable LOW during this clock pulse.

* Transmitter

=master (

P) when it writes an address to the TDA7575PD

= slave (TDA7575PD) when the

P reads a data byte from TDA7575PD

** Receiver

= slave (TDA7575PD) when the

P writes an address to the TDA7575PD

=master (

P) when it reads a data byte from TDA7575PD

VOOffset Detection Power Amplifier in play condition

AC Input signals = 0

±1.5 ±2 ±2.5 V

I2C BUS INTERFACE

fSCL Clock Frequency 400 KHz

VIL Input Low Voltage 1.5 V

VIH Input High Voltage 2.3 V

Symbol Parameter Test Condition Min. Typ. Max. Unit

ELECTRICAL CHARACTERISTCS:

(continued)

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TDA7575PD

Figure 1. Data Validity on the I2CBUS

Figure 2. Timing Diagramon the I2CBUS

Figure 3.

1 Ohm Capability Setting

It is possible to drive 1OHM load paralleling the outputs into a single channel.

In order to implement this feature, outputs are to be connected on the board as follows:

OUT1+ (PIN35 and PIN36) shorted to OUT2+ (PIN19 and PIN20)

OUT1- (PIN28 and PIN29) shorted to OUT2- (PIN26 and PIN27).

SDA

SCL

DATA LINE

STABLE, DATA

VALID

CHANGE

DATA

ALLOWED

D99AU1031

SCL

SDA

START

CBUS

STOP

D99AU1032

SCL 1

MSB

23789

SDA

START ACKNOWLEDGMENT

FROM RECEIVER

D99AU1033

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It is recommended to minimize the impedance on the board between OUT2 and the load in order to minimize

THD distortion. It is also recommended to control the maximum mismatch impedance between VCC pins

(PIN21/PIN22 respect to PIN33/PIN34) and between PWGND pins (PIN24/PIN25 respect to PIN30/PIN31),

mismatch that must not exceed a value of 20 mOhm.

With 1OHM feature settled the active input is IN2 (PIN17 and PIN18), therefore IN1 pins should be let floating.

It is possible to set the load capability acting on 1OHM pin as follows:

1OHM PIN (PIN15) < 1.5V: two channels mode (for a minimum load of 2 OHM)

1OHM PIN (PIN15) > 2.5V: one channel mode (for 1 OHM load).

IT IS TO REMEMBER THAT 1 0HM FUNCTION IS A HARDWARE SELECTION.

Therefore it is recommended to leave 1OHM PIN floating or shorted to GND to set the two channels mode con-

figuration, or to short 1OHM PIN to VCC to set the one channel (1OHM) configuration.

C Abilitation Setting

It is possible to disable the I

C interface by acting on I

C PIN (PIN16) and control the TDA7575PD by means of

the usual ST-BY and MUTE pins. In order to activate or deactivate this feature, I

C PIN must be set as follows:

I2C PIN (PIN16) < 1.5V: I

C bus interface deactivated

I2C PIN (PIN16) > 2.5V: I

C bus interface activated

It is also possible to let I

C PIN floating to deactivate the I

C bus interface, or to short I

C PIN to VCC to activate

it.

In particular:

C ENABLED: I

C pin (PIN16) > 2.5V

– STD MODE: Vstby (PIN5) > 3.5V, IB2(D1)=0

– HE MODE: Vstby (PIN5) > 3.5V, IB2(D1)=1

– PLAY MODE: Vmute (pin 4) >3.5V, IB1 (D2) = 1

The amplifier can always be switched off by putting Vstby to 0V, but with I

C enabled it can be turn on only

through I

C (with Vstby>3.5V).

C DISABLED: I

C pin (PIN16) < 1.5V

– STD MODE: 3.5V < stby (PIN5) < 5

– HE MODE: Vstby (PIN5) > 7V

– PLAY MODE: Vmute (pin 4) >3.5V

For both STD and HE MODE the play/mute mode can be set acting on Vmute pin.

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TDA7575PD

SOFTWARE SPECIFICATIONS

All the functions of the TDA7575PD are activated by I

C interface.

The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from

P to TDA7575PD) or

read instruction (from TDA7575PD to

P).

ADDRESS SELECTION

If R/W = 0, the

P sends 2 "Instruction Bytes": IB1 and IB2.

IB1

IB2

A6 1

A5 1

A4 0

A3 1

A2 0

A1 B

A0 A

R/W X

D7 X

D6 Diagnostic enable (D6 = 1)

Diagnostic defeat (D6 = 0)

D5 Offset Detection enable (D5 = 1)

Offset Detection defeat (D5 = 0)

D4 Gain = 26dB (D4 = 0)

Gain = 12dB (D4 = 1)

D3 X

D2 Mute (D2 = 0)

Unmute (D2 = 1)

D1 X

D0 CD 2% (D0 = 0)

CD 10% (D0 = 1)

D7 X

D6 used for testing

D5 used for testing

D4 Stand-by on - Amplifier not working - (D4 = 0)

Stand-by off - Amplifier working - (D4 = 1)

D3 Power Amplifier Mode Diagnostic (D3 = 0);

Line Driver Mode Diagnostic (D3 = 1)

D2 X

D1 Power amplifier working in standard mode (D1 = 0)

Power amplifier working in high efficiency mode (D1 = 1)

D0 X

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If R/W = 1, the TDA7575PD sends 2 "Diagnostics Bytes" to

P: DB1 and DB2.

DB1

DB2

D7 Thermal warming (if Tchip ≥ 150°C, D7 = 1)

D6 Diag. cycle not activated or not terminated (D6 = 0)

Diag. cycle terminated (D6 = 1)

D5 X

Channel 1

Turn-on diagnostic (D4 = 0)

Permanent diagnostic (D4 = 1)

Channel 1

Normal load (D3 = 0)

Short load (D3 = 1)

Channel 1

Turn-on diag.: No open load (D2 = 0)

Open load detection (D2 = 1)

Offset diag.: No output offset (D2 = 0)

Output offset detection (D2 = 1)

Channel 1

No short to Vcc (D1 = 0)

Short to Vcc (D1 = 1)

Channel 1

No short to GND (D1 = 0)

Short to GND (D1 = 1)

D7 Offset detection not activated (D7 = 0)

Offset detection activated (D7 = 1)

D6 X

D5 X

Channel 2

Turn-on diagnostic (D4 = 0)

Permanent diagnostic (D4 = 1)

Channel 2

Normal load (D3 = 0)

Short load (D3 = 1)

Channel 2

Turn-on diag.: No open load (D2 = 0)

Open load detection (D2 = 1)

Permanent diag.: No output offset (D2 = 0)

Output offset detection (D2 = 1)

Channel 2

No short to Vcc (D1 = 0)

Short to Vcc (D1 = 1)

Channel 2

No short to GND (D1 = 0)

Short to GND (D1 = 1)

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TDA7575PD

Examples of bytes sequence

- Turn-On diagnostic - Write operation

- Turn-On diagnostic - Read operation

The delay from 1 to 2 can be selected by software, starting from T.B.D. ms

- Turn-On of the power amplifier with mute on, diagnostic defeat.

- Turn-Off of the power amplifier

- Offset detection procedure enable

- Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits

(D2 of the bytes DB1, DB2, DB3, DB4).

■The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by input

capacitor with anomalous leackage current or humidity between pins.

■The delay from 4 to 5 can be selected by software, starting from T.B.D. ms

DIAGNOSTICS FUNCTIONAL DESCRIPTION:

a) TURN-ON DIAGNOSTIC.

It is activated at the turn-on (stand-by out) under I

C bus request. Detectable output faults are:

– SHORT TO GND

– SHORT TO Vs

– SHORT ACROSS THE SPEAKER

– OPEN SPEAKER

To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (fig. A) is internally

generated, sent through the speaker(s) and sunk back.The Turn On diagnostic status is internally stored until a

successive diagnostic pulse is requested (after a I2C reading).

If the "stand-by out" and "diag. enable" commands are both given through a single programming step, the pulse

takes place first (power stage still in stand-by mode, low, outputs= high impedance).

Start Address byte with D0 = 0 ACK IB1 with D6 = 1 ACK IB2 ACK STOP

Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK STOP

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP

X000XXXX XXX1XX1X

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP

X0XXXXXX XXX0XXXX

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP

XX1XX1XX XXX1XXXX

Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK STOP

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Afterwards, when the Amplifier is biased, the PERMANENT diagnostic takes place. The previous Turn On state

is kept until a short appears at the outputs.

Fig A: Turn - On diagnostic:

working principle

Fig. B and C show SVR and OUTPUT waveforms at the turn-on (stand-by out) with and without TURN-ON DI-

AGNOSTIC.

Fig B: SVR and Output behaviour

CASE 1:

without turn-on diagnostic

FIG. C: SVR and Output pin behaviour

CASE 2:

with turn-on diagnostic

CH-

CH+

Isource

Vs~5V

Isink t (ms)

I (mA)

Isink

Isource

~100mS

Measure time

Bias (power amp turn-on) t

Diagnostic Enable

(Permanent)

Permanent diagnostic

acquisition time (100mS Typ)

Permanent Diagnostics data (output)

permitted time

I2CB DATA

Vsvr

Out

FAULT

event Read Data

Bias (power amp turn-on)

permitted time

Turn-on diagnostic

acquisition time (100mS Typ)

Read Data

Permanent diagnostic

acquisition time (100mS Typ)

Permanent Diagnostics data (output)

permitted time

Diagnostic Enable

(Turn-on)

Turn-on Diagnostics data (output)

permitted time

I2CB DATA

Vsvr

Out

Diagnostic Enable

(Permanent)

FAULT

event

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TDA7575PD

The information related to the outputs status is read and memorized at the end of the current pulse top. The

acquisition time is 100 ms (typ.). No audible noise is generated in the process. As for SHORT TO GND / Vs the

fault-detection thresholds remain unchanged from 26 dB to 12 dB gain setting. They are as follows:

Concerning SHORT ACROSS THE SPEAKER / OPEN SPEAKER, the threshold varies from 26 dB to 12 dB

gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The

values in case of 26 dB gain are as follows:

If the Line-Driver mode (Gv= 12 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will

change as follows:

b) PERMANENT DIAGNOSTICS

Detectable conventional faults are:

– SHORT TO GND

– SHORT TO Vs

– SHORT ACROSS THE SPEAKER

The following additional features are provided:

– OUTPUT OFFSET DETECTION

The TDA7575PD has 2 operating statuses:

1) RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each oth-

er. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output status is

made every 1 ms (fig. G). Restart takes place when the overload is removed.

2) DIAGNOSTIC mode. It is enabled via I

C bus and self activates if an output overload (such to cause the in-

tervention of the short-circuit protection) occurs to the speakers outputs . Once activated, the diagnostics pro-

cedure develops as follows (fig. H):

– To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output

status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not per-

formed and the channel returns back active.

– Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a du-

ration of about 100 ms is started.

– After a diagnostic cycle, the audio channel interested by the fault is switched to RESTART mode. The

D02AU1341

S.C. to GND x S.C. to Vs

0V 1.8V VS-1.5V VS

xNormal Operation

1.2V VS-0.9V

S.C. across Load x Open Load

0V 1.5Ω70ΩInfinite

xNormal Operation

0.5Ω130Ω

D01AU1254

D01AU1252

S.C. across Load x Open Load

0Ω4.5Ω200Ωinfinite

xNormal Operation

1.5Ω400Ω

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relevant data are stored inside the device and can be read by the microprocessor. When one cycle

has terminated, the next one is activated by an I2C reading. This is to ensure continuous diagnostics

throughout the car-radio operating time.

– To check the status of the device a sampling system is needed. The timing is chosen at microproces-

sor level (over than half a second is recommended).

Fig. G: Restart timing without Diagnostic Enable (Permanent)

Each 1mS time, a sampling of the fault is done

Fig H: Restart timing with Diagnostic Enable (Permanent)

OUTPUT DC OFFSET DETECTION.

Any DC output offset exceeding +/- 2 V are signalled out. This inconvenient might occur as a consequence of

initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the

speakers at risk of overheating.

This diagnostic has to be performed with low-level output AC signal (or Vin = 0).

The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command):

– START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1

– STOP = Actual reading operation

Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any

overloads leading to activation of the short-circuit protection occurs in the process.

circuit protection intervention

1-2mS 1mS 1mS 1mS 1mS

Overcurrent and short

(i.e. short circuit to GND)

Short circuit removed

Out

circuit protection intervention

Overcurrent and short

(i.e. short circuit to GND)

Short circuit removed

1mS 100mS 1mS1mS

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TDA7575PD

MULTIPLE FAULTS.

When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one

of them is initially read out. The others are notified after successive cycles of I

C reading and faults removal,

provided that the diagnostic is enabled. This is true for both kinds of diagnostic (Turn on and Permanent).

The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit

with the 4 ohm speaker unconnected is considered as double fault.

Double fault table for Turn On Diagnostic

S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted

to ground (test-current source side= so, test-current sink side = sk). More precisely, in both the Channels SO =

CH+, and SK = CH-.

In Permanent Diagnostic the table is the same, with only a difference concerning Open Load(*) , which is not

among the recognisable faults. Should an Open Load be present during the device's normal working, it would

be detected at a subsequent Turn on Diagnostic cycle (i.e. at the successive Car Radio Turn on).

FAULTS AVAILABILITY

All the results coming from I

Cbus, by read operations, are the consequence of measurements inside a defined

period of time. If the fault is stable throughout the whole period, it will be sent out. This is true for DC diagnostic

(Turn on and Permanent), for Offset Detector.

To guarantee always resident functions, every kind of diagnostic cycles (Turn on, Permanent, Offset) will be

reactivate after any I2C reading operation. So, when the micro reads the I

C, a new cycle will be able to start,

but the read data will come from the previous diag. cycle (i.e. The device is in Turn On state, with a short to Gnd,

then the short is removed and micro reads I2C. The short to Gnd is still present in bytes, because it is the result

of the previous cycle. If another I2C reading operation occurs, the bytes do not show the short). In general to

observe a change in Diagnostic bytes, two I2C reading operations are necessary.

C PROGRAMMING/READING SEQUENCES

A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as

follows (after battery connection):

– TURN-ON: (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT

– TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN)

Car Radio Installation: DIAG ENABLE (write) --- 200 ms --- I

C read (repeat until All faults disappear).

– OFFSET TEST: Device in Play (no signal) --

– OFFSET ENABLE - 30ms - I2C reading

(repeat I

C reading until high-offset message disappears).

S. GND (sc) S. GND (sk) S. Vs S. Across L. Open L.

S. GND (sc) S. GND S. GND S. Vs + S. GND S. GND S. GND

S. GND (sk) / S. GND S. Vs S. GND Open L. (*)

S. Vs / / S. Vs S. Vs S. Vs

S. Across L. ///S. Across L.N.A.

Open L. ////Open L. (*)

Obsolete Product(s) - Obsolete Product(s)

TDA7575PD

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OUTLINE AND

MECHANICAL DATA

DIM. mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 3.25 3.43 0.128 0.135

A2 3.1 3.2 0.122 0.126

A4 0.8 1 0.031 0.039

A5 0.2 0.008

a1 0.030 0.040

0.0011 0.0015

b 0.22 0.38 0.008 0.015

c 0.23 0.32 0.009 0.012

D 15.8 16 0.622 0.630

D1 9.4 9.8 0.37 0.38

D2 1 0.039

E 13.9 14.5 0.547 0.57

E1 10.9 11.1 0.429 0.437

E2 2.9 0.114

E3 5.8 6.2 0.228 0.244

E4 2.9 3.2 0.114 1.259

e0.65 0.026

e3 11.05 0.435

G 0 0.075 0 0.003

H 15.5 15.9 0.61 0.625

h 1.1 0.043

L 0.8 1.1 0.031 0.043

N 10˚ (max)

s 8˚ (max)

(1) “D and E1” do not include mold flash or protusions.

Mold flash or protusions shall not exceed 0.15mm (0.006”)

(2) No intrusion allowed inwards the leads.

PowerSO36 (SLUG UP)

7183931 C

Obsolete Product(s) - Obsolete Product(s)

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted

by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject

to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not

authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics.

All other names are the property of their respective owners

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TDA7575PD