VNI2140J Dual high side smart power solid state relay Features Type VNI2140J Vdemag(1) RDSon(1) VCC-45 V 0.08 Iout(1) VCC 1 A (2) 45 V 1. Per channel PowerSSO-12 2. Current limitation Description Nominal current: 0.5 A per channel Shorted load protections Junction overtemperature protection Case overtemperature protection for thermal independence of the channels Thermal case shutdown restart not simultaneous for the various channels Protection against loss of ground Current limitation 1 A per channel Undervoltage shutdown Open load in off-state and short to VCC detection Open-drain diagnostic outputs 3.3 V CMOS/TTL compatible inputs Fast demagnetization of inductive loads Conforms to IEC 61131-2 Table 1. The VNI2140J is a monolithic device designed using STMicroelectronics' VIPower technology. The device drives two independent resistive or inductive loads with one side connected to ground. Active current limitation prevents a drop in system power supply in cases of shorted-load, and built-in thermal shutdown protects the chip from damage due to over-temperature and shortcircuit. In overload conditions, channel turns OFF and ON automatically to maintain the junction temperature between TTSD and TR. If the case temperature reaches TCSD, the overloaded channel is turned OFF and restarts only when case temperature decreases down to TCR. In order to avoid high-peak current from the supply, when more than one channel is overloaded the TCSD restart is not simultaneous. Non overloaded channels continue to operate normally. The open-drain diagnostics output indicates over-temperature conditions and openload in off state. Device summary Order codes Package VNI2140J Packaging Tube PowerSSO-12 VNI2140JTR November 2011 Tape and reel Doc ID 15187 Rev 8 1/23 www.st.com 23 Contents VNI2140J Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 Open load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9 Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/23 Doc ID 15187 Rev 8 VNI2140J 1 Block diagram Block diagram Figure 1. Block diagram Doc ID 15187 Rev 8 3/23 Pin connections 2 VNI2140J Pin connections Figure 2. Pin connections (top view) NC Input 1 Diag 1 GND Diag 2 Input 2 Table 2. 4/23 VCC Output 1 Output 1 Output 2 Output 2 VCC Pin description n Name Description 1 NC 2 Input 1 Channel 1 input 3.3 V CMOS/TTL compatible 3 Diag 1 Channel 1 diagnostic in open-drain configuration 4 GND 5 Diag 2 Channel 2 diagnostic in open-drain configuration 6 Input 2 Channel 2 input 3.3 V CMOS/TTL compatible 7 VCC 8 Output 2 Channel 2 power stage output, internally protected 9 Output 2 Channel 2 power stage output, internally protected 10 Output 1 Channel 1 power stage output, internally protected 11 Output 1 Channel 1 power stage output, internally protected 12 VCC Supply voltage TAB TAB Supply voltage Not connected Device ground connection Supply voltage Doc ID 15187 Rev 8 VNI2140J 3 Maximum ratings Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Unit 45 V VCC Power supply voltage -VCC Reverse supply voltage -0.3 V IGND DC ground reverse current -250 mA IOUT Output current (continuous) Internally limited A -5 A IR Reverse output current (per channel) IIN Input current (per channel) 10 mA VIN Input voltage +VCC V VDIAG Diag pin voltage +VCC V IDIAG Diag pin current 10 mA VESD Electrostatic discharge (R = 1.5 k; C = 100 pF) 2000 V EAS Single pulse avalanche energy per channel not simultaneously 300 mJ PTOT Power dissipation at Tc = 25 C Internally limited W TJ Junction operating temperature Internally limited C -55 to 150 C Value Unit TSTG 3.1 Value Storage temperature Thermal data Table 4. Thermal data Symbol Parameter Rth(JC) Thermal resistance junction-case (1) Max 1 C/W Rth(JA) Thermal resistance junction-ambient (2) Max See Figure 11 on page 15 C/W 1. Per channel 2. When mounted using minimum recommended pad size on FR-4 board Doc ID 15187 Rev 8 5/23 Electrical characteristics 4 VNI2140J Electrical characteristics 9 V < VCC < 36 V; -40 C < TJ < 125 C; unless otherwise specified Table 5. Symbol Vcc Power section Parameter Test conditions Supply voltage Min. Typ. 9 Max. Unit 45 V 0.150 52 V 4 A mA 0.080 RDS(ON) On-state resistance IOUT = 0.5 A at TJ = 25 C IOUT = 0.5 A VCLAMP Clamp voltage Is = 20 mA Supply current All channel in off-state On-state with VIN =5 V (TJ = 125 C) Output current at turn-off VCC = VDIAG = VIN = VGND = 24 V, VOUT = 0 V 1 mA Off-state output voltage VIN = 0 V and IOUT = 0 A 3 V 0 5 A -35 0 A IS ILGND VOUT(OFF) IOUT(OFF) IOUT(OFF1) VIN = VOUT = 0 V OFF-state output current VIN = 0 V; VOUT = 4 V 45 300 1.9 VCC = 24 Table 6. Symbol td(ON) tr td(OFF) tf tDOL Switching Parameter Test conditions 6/23 Typ. Max. Unit Turn-on delay time of output current IOUT = 0.5 A, resistive load Input rise time < 0.1 s, TJ = 25 C - 20 - s Rise time of output current IOUT = 0.5 A, resistive load Input rise time < 0.1 s, TJ = 25 C - 10 - s Turn-off delay time of output current IOUT = 0.5 A, resistive load Input rise time < 0.1 s, TJ = 25 C - 30 - s Fall time of output current IOUT = 0.5 A, resistive load Input rise time < 0.1 s, TJ = 25 C - 8 - s - 500 - s - 3 - V/S - 4 - V/S Delay time for open load detection dV/dt(ON) Turn ON voltage slope dV/dt(off) Min. Turn OFF voltage slope Doc ID 15187 Rev 8 VNI2140J Electrical characteristics Table 7. Logical input Symbol Parameter VIL Input low level voltage VIH Input high level voltage VI(HYST) IIN Table 8. Symbol VDIAG (1) Test conditions Min. V V V 10 VIN = 36 V 210 A Protection and diagnostic Parameter Diag voltage output low Test conditions Min. Typ. IDIAG = 1.5 mA (fault condition) 7 VUSDHYS Undervoltage hysteresis 0.4 DC short circuit current VCC = 24 V; RLOAD < 10 m Diag leakage current VCC = 32 V VOL Open-load off-state voltage detection threshold VIN = 0 V TTSD TR 0.8 VIN = 15 V Undervoltage protection ILDIAG Unit 0.15 VUSD ILIM Max. 2.20 Input hysteresis voltage Input current Typ. Unit 0.6 V 9 V 0.5 1 V 2 3 Junction shutdown temperature 150 170 Junction reset temperature 135 155 THIST Junction thermal hysteresis 7 15 TCSD Case shutdown temperature 125 130 TCR Case reset temperature 110 TCHYST Case thermal hysteresis 7 15 Vdemag Output voltage at turn-OFF VCC45 VCC50 A A 30 2 IOUT = 0.5 A; LLOAD >= 1 mH Max. 4 V C 200 C C 135 C C C VCC52 V 1. Diag determination > 100 ms after the switching edge. Doc ID 15187 Rev 8 7/23 Electrical characteristics Figure 3. 8/23 VNI2140J Current and voltage conventions Doc ID 15187 Rev 8 VNI2140J 5 Truth table Truth table Table 9. Truth table INPUTn OUTPUTn DIAGn Normal operation L H L H H H Overtemperature L H L L H L Undervoltage L H L L X X Shorted load (Current limitation) L H L X H H Output voltage > VOL L H Z (1) H L H Short to VCC L H H H L H 1. Z = Depending on the external circuit Doc ID 15187 Rev 8 9/23 Switching waveforms 6 Switching waveforms Figure 4. 10/23 VNI2140J Switching waveforms Doc ID 15187 Rev 8 VNI2140J Switching waveforms Figure 5. Switching waveforms (continued) Figure 6. Switching parameter test conditions IOUT VIN Doc ID 15187 Rev 8 11/23 Switching waveforms Figure 7. 12/23 VNI2140J Typical application circuit Doc ID 15187 Rev 8 VNI2140J 7 Open load Open load In order to detect the open load fault a pull-up resistor must be connected between the VCC line and the output pin. In a normal condition a current flows through the network made up of a pull-up resistor and a load. The voltage across the load is less than VOLMIN; so the diag pin is kept high. This is the result in the condition: Equation 1 R LOAD V CC ------------------------------------ < V OLMIN R LOAD + R PU or Equation 2 V CC ------------------- - 1 R LOAD < R PU V OLMIN When a open load event occurs the voltage on the output pin rises to a value higher than VOLMAX (depending on the pull-up resistor). The diag pin will go down. This result in the condition: Equation 3 V CC - V OLMAX R PU < -----------------------------------------I OUT ( OFF1 )MIN Figure 8. Open load detection Doc ID 15187 Rev 8 13/23 Open load VNI2140J Figure 9. 14/23 Turn on/off to open load Doc ID 15187 Rev 8 VNI2140J 8 Package and PCB thermal data Package and PCB thermal data Figure 10. PowerSSO-12 PC board Figure 11. RthJA vs PCB copper area in open box free air condition Figure 12. PowerSSO-12 thermal Impedance junction ambient single pulse Doc ID 15187 Rev 8 15/23 Package and PCB thermal data VNI2140J Pulse calculation formula Equation 4 ZTH = RTH x + ZTHtp (1 - ) where = tP/T Figure 13. Thermal fitting model of a double channel HSD in PowerSSO-12 Table 10. 16/23 Thermal parameter Area/island (cm2) Footprint 2 8 R1 (C/W) 0.1 R2 (C/W) 0.2 R3 (C/W) 7 R4 (C/W) 10 10 9 R5 (C/W) 22 15 10 R6 (C/W) 26 20 15 C1 (W.s/C) 0.0001 C2 (W.s/C) 0.002 C3 (W.s/C) 0.05 C4 (W.s/C) 0.2 0.1 0.1 C5 (W.s/C) 0.27 0.8 1 C6 (W.s/C) 3 6 9 Doc ID 15187 Rev 8 VNI2140J 9 Reverse polarity protection Reverse polarity protection This schematic can be used with any type of load. The following is an indication on how to dimension the RGND resistor. RGND = (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0: during reverse polarity situations) is: PD = (-VCC)2/RGND Note: In normal condition (no reverse polarity) due to the diode there will be a voltage drop between GND of the device and GND of the system. Figure 14. Reverse polarity protection + Vcc Inputi Outputi Diagi GND Load RGND Doc ID 15187 Rev 8 Diode 17/23 Package mechanical data 10 VNI2140J Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 18/23 Doc ID 15187 Rev 8 VNI2140J Package mechanical data Table 11. PowerSSO-12TM mechanical data mm Symbol Min. Typ. Max. A 1.250 1.620 A1 0.000 0.100 A2 1.100 1.650 B 0.230 0.410 C 0.190 0.250 D 4.800 5.000 E 3.800 4.000 e 0.800 H 5.800 6.200 h 0.250 0.500 L 0.400 1.270 k 0 8 X 1.900 2.500 Y 3.600 4.200 ddd 0.100 Figure 15. PowerSSO-12TM package dimensions Doc ID 15187 Rev 8 19/23 Package mechanical data VNI2140J Figure 16. PowerSSO-12TM tube shipment (no suffix) Figure 17. PowerSSO-12TM tape and reel shipment (suffix "TR") 20/23 Doc ID 15187 Rev 8 VNI2140J Package mechanical data Figure 18. Suggested footprint Doc ID 15187 Rev 8 21/23 Revision history 11 VNI2140J Revision history Table 12. 22/23 Document revision history Date Revision Changes 16-Dec-2008 1 Initial release 29-Apr-2009 2 Updated Table 5 on page 6 03-Jul-2009 3 Updated features in coverpage and Table 5 on page 6 27-Aug-2009 4 Updated Section 9: Reverse polarity protection 25-Mar-2010 5 Updated Coverpage and Table 4 on page 5 26-Apr-2010 6 Updated Table 5 on page 6 21-Jul-2010 7 Updated Table 8 on page 7 15-Nov-2011 8 Updated Figure 18 on page 21 Doc ID 15187 Rev 8 VNI2140J Please Read Carefully: Information in this document is provided solely in connection with ST products. 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