Philips Semiconductors Product specification
74ABT240Octal inverting buffer (3-State)
2
1996 Sep 10 853–1608 17274
FEATURES
•Octal bus interface
•3-State buffers
•Output capability: +64mA/–32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
•Power-up 3-State
•Live insertion/extraction permitted
DESCRIPTION
The 74ABT240 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT240 device is an octal inverting buffer that is ideal for
driving bus lines. The device features two Output Enables (1OE,
2OE), each controlling four of the 3-State outputs.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS
Tamb = 25°C; GND = 0V TYPICAL UNIT
tPLH
tPHL Propagation delay
nAx to nYxCL = 50pF; VCC = 5V 3.1 ns
CIN Input capacitance VI = 0V or VCC 4 pF
COUT Output capacitance Outputs disabled; VO = 0V or VCC 7 pF
ICCZ Total supply current Outputs disabled; VCC =5.5V 50 µA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
20-Pin Plastic DIP –40°C to +85°C 74ABT240 N 74ABT240 N SOT146-1
20-Pin plastic SO –40°C to +85°C 74ABT240 D 74ABT240 D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT240 DB 74ABT240 DB SOT339-1
20-Pin PlasticTSSOP Type I –40°C to +85°C 74ABT240 PW 74ABT240PW DH SOT360-1
PIN DESCRIPTION
PIN
NUMBER SYMBOL NAME AND FUNCTION
2, 4, 6, 8 1A0 – 1A3 Data inputs
11, 13, 15,
17 2A0 – 2A3 Data inputs
18, 16, 14,
12 1Y0 – 1Y3 Data outputs
9, 7, 5, 3 2Y0 – 2Y3 Data outputs
1, 19 1OE, 2OE Output enables
10 GND Ground (0V)
20 VCC Positive supply voltage
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3 1Y3
GND
2A2
1Y2
2A1
1Y1
2A0
1Y0
2OE
VCC
2A3
SA00034
Philips Semiconductors Product specification
74ABT240Octal inverting buffer (3-State)
1996 Sep 10 3
LOGIC SYMBOL
1
1A0
2
1A1
4
1A2
6
1A3
8
2OE
19
2A0
11
13
15
17
2A1
18
2A2
16
2A3
14
12
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y39
7
5
3
1OE
SA00035
FUNCTION TABLE
INPUTS OUTPUTS
1OE 1An 2OE 2An 1Yn 2Yn
L L L L H H
L H L H L L
H X H X Z Z
H =High voltage level
L =Low voltage level
X =Don’t care
Z =High impedance ”off” state
LOGIC SYMBOL (IEEE/IEC)
EN
1
218
416
614
812
19
11 9
13 7
15 5
17 3
EN
SA00036
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage –0.5 to +7.0 V
IIK DC input diode current VI < 0 –18 mA
VIDC input voltage3–1.2 to +7.0 V
IOK DC output diode current VO < 0 –50 mA
VOUT DC output voltage3output in Off or High state –0.5 to +5.5 V
IOUT DC output current output in Low state 128 mA
Tstg Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product specification
74ABT240Octal inverting buffer (3-State)
1996 Sep 10 4
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
Min Max
UNIT
VCC DC supply voltage 4.5 5.5 V
VIInput voltage 0 VCC V
VIH High-level input voltage 2.0 V
VIL Low-level Input voltage 0.8 V
IOH High-level output current –32 mA
IOL Low-level output current 64 mA
∆t/∆v Input transition rise or fall rate 0 10 ns/V
Tamb Operating free-air temperature range –40 +85 °C
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Tamb = +25°CTamb = –40°C
to +85°CUNIT
Min Typ Max Min Max
VIK Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V
VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V
VOH High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V
VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V
VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V
IIInput leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA
IOFF Power-off leakage current VCC = 0.0V; VI or VO ≤ 4.5V; ±5.0 ±100 ±100 µA
IPU/IPD Power-up/down 3-state
output current3VCC = 2.1V; VO = 0.5V; VI = GND or VCC;
VOE = Don’t care ±5.0 ±50 ±50 µA
IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 5.0 50 50 µA
IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –5.0 –50 –50 µA
ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA
IOOutput current1VCC = 5.5V; VO = 2.5V –50 –100 –180 –50 –180 mA
ICCH VCC = 5.5V; Outputs High, VI = GND or VCC 50 250 250 µA
ICCL Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or VCC 24 30 30 mA
ICCZ VCC = 5.5V; Outputs 3-State;
VI = GND or VCC 50 250 250 µA
∆ICC Additional supply current per
input pin2Outputs 3-State, one input at 3.4V, other
inputs at VCC or GND; VCC = 5.5V 0.5 1.5 1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC 5V ± 10% a
transition time of up to 100µsec is permitted.
Philips Semiconductors Product specification
74ABT240Octal inverting buffer (3-State)
1996 Sep 10 5
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM Tamb = +25°C
VCC = +5.0V Tamb = –40°C to +85°C
VCC = +5.0V ±0.5V UNIT
Min Typ Max Min Max
tPLH
tPHL Propagation delay
nAx to nYx11.0
1.6 2.7
3.5 4.1
4.3 1.0
1.6 4.8
4.8 ns
tPZH
tPZL Output enable time
to High and Low level 21.1
1.1 3.1
4.2 4.7
5.8 1.1
1.1 5.2
6.2 ns
tPHZ
tPLZ Output disable time
from High and Low level 21.8
1.6 3.7
3.0 5.7
5.4 1.8
1.6 6.4
5.8 ns
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
nAx INPUT VM
VM
nYx OUTPUT
VM
VM
tPHL tPLH
SA00037
Waveform 1. Waveforms Showing the Input (nAx) to
Output (nYx) Propagation Delays
nOE INPUT VM
VM
tPZH tPHZ
nYx OUTPUT
VOH
VM
VM
nYx OUTPUT
VOL
tPZL tPLZ 3.5V
0V
VOL + 0.3V
VOH – 0.3V
SA00017
Waveform 2. Waveforms Showing the 3-State Output
Enable and Disable Times
Philips Semiconductors Product specification
74ABT240Octal inverting buffer (3-State)
1996 Sep 10 6
TEST CIRCUIT AND WAVEFORMS
PULSE
GENERATOR
RT
VIN VOUT
CLRL
VCC
RL
7.0V
Test Circuit for 3-State Outputs
VMVM
tWAMP (V)
NEGATIVE
PULSE 10% 10%
90% 90%
0V
VMVM
tW
AMP (V)
POSITIVE
PULSE
90% 90%
10% 10% 0V
tTHL (tF)
tTLH (tR) tTHL (tF)
tTLH (tR)
VM = 1.5V
Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY Amplitude Rep. Rate tWtRtF
74ABT 3.0V 1MHz 500ns 2.5ns 2.5ns
SWITCH POSITION
TEST SWITCH
tPLZ closed
tPZL closed
All other open
SA00012
D.U.T.
