LRI64-A6S2U - STMicroelectronics - Datasheet.Directory

1/38September 2004

LRI64

Memory TAG IC, 64-bit Unique ID with WO RM User Area

13.56MHz, ISO 15693 Standard Compliant

FEATURES SUMMARY

■ISO15693 Compliant

■13.5 6MHz ±7kHz Carrier Frequency

■Sup ported data transfer to th e LRI64:

10% ASK mod ula tion u s i n g “ 1 - o u t- o f-4” p u lse

pos ition coding (26 kbit/s)

■Sup ported data transfer from the LRI64:

Load mo dulat ion using Manc hest er coding

with 423kHz single sub-carrier in fast data rate

(26 kbit/s)

■Internal Tu ning Capacitor

■7 x 8 bits WORM User Area

■64-bit Unique Identifier (UID)

■Read Block and Write Block Commands (8-bit

blocks)

■7m s Prog ra mming Time ( t yp ic al)

■More than 40-Ye ar Data Retention

■Ele ctrical Article Surveillance capable

(software controlled)

Figure 1. Delivery Forms

Wafer

Antenna (A1)

Antenna (A7)

Antenna (A6)

LRI64

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TABLE OF CONTENTS

FEATUR ES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 1. Delivery Forms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Memory Mapping. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. LRI64 Memory Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

AC1, AC0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

R ead Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Write Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Get_System_Info. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Initial Dialogue for Vicinity Cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

POWER TRANSFER. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Operating Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

COMMUNICATION SIGNAL FROM VCD TO LRI64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 2. 10% M odulation Paramet ers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4. 10% Modulation W aveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

Figure 5. “1-out-of-4” Coding Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

DATA RATE AND DATA CODING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 6. “1-out-of-4” Coding Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

VCD TO LRI64 FRAMES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0

Figure 7. Reques t SOF, using the “1-out-of-4” Data Coding Mode . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 8. Request EOF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0

COMMUNICATIONS SIGNAL FROM LRI64 TO VCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Load Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Subcarrier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1

Bit R e p res e nt a tio n and C o din g using One Subca r rier , at the Hi g h Da ta Rat e . . . . . . . . . . . . 11

Logic 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1

Figure 9. Logic 0, High Data Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1

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LRI64

Logic 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1

Figure 10.Logi c 1, High Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

LRI64 TO VCD FRAMES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

LRI64 SOF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

LRI64 EOF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 11.Respons e S OF, using High Data Rate and One Subcarrier . . . . . . . . . . . . . . . . . . . . . . 12

Figure 12.Respons e E OF, using High Data Rate and One Subcarrier . . . . . . . . . . . . . . . . . . . . . . 12

SPECIAL FIELDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Unique Identifier (UID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3

Figure 13.UID Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 14.Decision Tree for AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Application Family Identifier (AFI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Data Storage Format Identifier (DSFID). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Cyclic Redundancy Code (CRC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 15.CRC Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

LRI64 PROTOCOL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

Figure 16.V CD Request Frame Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 17.LRI 64 Response Frame Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 18.LRI64 Protocol Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4

LRI64 STATES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Power-off State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Ready State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5

Quiet State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

A ddressed Mod e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5

N on-Addre ssed Mode (General Request) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 19.LRI64 State Transition Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

FLAGS AND ERROR CODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Request Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 3. Request Flags 1 to 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 6

Table 4. Requ es t Flags 5 to 8 (when Bit 3 = 0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 5. Requ es t Flags 5 to 8 (when Bit 3 = 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Response Flags. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 6. Response Flags 1 to 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 6

Response Error C ode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 6

Table 7. Response Error Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

ANTI-COLLISION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 7

Request Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

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4/38

Mask Leng th and Mask Value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

Inventory Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 7

Figure 20.Com parison between t he Mask, Slot Number and UID. . . . . . . . . . . . . . . . . . . . . . . . . . 17

REQUEST PROCESSING BY THE LRI64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Expla nation of the Possible Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 21.Des cription of a Possible Anti-collision Seque nce between LRI64 Devices . . . . . . . . . . 19

TIMING DEFINITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table 8. Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0

LRI64 Response Delay, t1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

VCD New Request Delay, t2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0

VCD New Request Delay when there is No LRI64 Response, t3. . . . . . . . . . . . . . . . . . . . . . . . 20

COMMANDS CODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 9. Com m and Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1

Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1

Figure 22.I nvento ry, Request Frame Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23.Inventory, Response Frame Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Stay Quiet. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 24.S tay Quiet, Request Frame Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 25.S tay Quiet Frame E xchange bet ween VC D and LRI64 . . . . . . . . . . . . . . . . . . . . . . . . . 22

Read Single Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 10. Block Lock Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3

Figure 26.Read S ingle Block, Reques t Frame Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 27.Read S ingle Block, Respons e Frame Forma t, when Error_Flag is n ot Set. . . . . . . . . . . 23

Figure 28.Read Si ngle Block, Res ponse Frame Format, when Error_Flag i s Set. . . . . . . . . . . . . . 23

Figure 29.RE AD Single Block Frame Excha nge bet ween VCD and LRI64 . . . . . . . . . . . . . . . . . . 23

Write Single Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 30.Write Single Block, Request Frame Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 31.Write Single Block , Respon se Frame Format, when Error_Flag is not Set . . . . . . . . . . . 24

Figure 32.Write Single Block , Respon se Frame Format, when Error_Flag is Set. . . . . . . . . . . . . . 24

Figure 33.Write Single Block Frame Exchange between VCD and LRI64 . . . . . . . . . . . . . . . . . . . 24

Get System Info. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 34.Get System Info, Request Fram e Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 35.Get System Info, Response Fram e Format , when Error_Flag is not Set . . . . . . . . . . . . 25

Figure 36.Get System Info, Response Frame Form at , when Error_Flag is Set . . . . . . . . . . . . . . . 25

Figure 37.Get System Info Frame Exch ange between V CD and LRI64 . . . . . . . . . . . . . . . . . . . . . 25

MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 11. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 12. Op erating C onditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 7

Figure 38.LRI 64 Synchron ous Timing, Transm it and Receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

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LRI64

Table 13. DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 14. AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 8

PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 39.A 1 Antenna on Tape Out line. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 15. A 1 Antenn a on Tape Mecha nical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 40.A 6 Antenna on Tape Out line. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 16. A 6 Antenn a on Tape Mecha nical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 41.A 7 Antenna on Tape Out line. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 17. A 7 Antenn a on Tape Mecha nical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

PAR T NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 18. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

APPENDIX A.ALGORITHM FOR PULSED SLOTS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

APPENDIX B.C-EXAMPLE TO CALCULATE OR CHECK THE CRC16

ACCORDING TO ISO /IEC 13239 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 19. CRC Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4

CRC Calculation Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4

APPENDIX C.APPLICATION FAMILY IDENTIFIER (AFI) CODING . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 20. AFI Coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6

REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Table 21. Document Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

LRI64

6/38

S UM MARY DE SCRIP TION

The LRI64 is a contactless memory, powered by

an externally transmitted radio wave. It contains a

120-bit non-vol atile memory. The memory is orga-

nized as 15 blocks of 8 bits, of which 7 blo cks are

accessible as Write-Once Read-Many (WORM)

memory.

Figure 2. Logic Diagram

The LRI64 is accessed using a 13.56MHz carrier

wave. Incoming data are demodulat ed from the re-

ceived Amplitude Shift Keying (ASK) signal, 10%

modulated. The data are transferred from the

reader to the LRI64 at 26Kbit/s, using the “1-ou t-

of-4” pulse encoding mode.

Outgoing data are sent by t he LRI64, generated by

load variation on the car rier wave, using Manches-

ter coding with a single sub-carrier frequency of

423kHz. T he data are t ransferred fr om the LRI64

to the reader at 26Kbit/s, in the high data rate

mode.

The LRI64 supports the high data rate communi-

cation protocols of the ISO15693 recommenda-

tion. All other data rates and modulations are not

supported by the LRI64.

Table 1. Signal Names

Memory Ma pping

The LRI64 is organized as 15 blocks of 8 bits as

shown in Figure 3. Each block is automatically

write-protected after the first valid write access.

Figu re 3. LRI 6 4 Memory Mapp in g

The L RI6 4 u se s the firs t 8 blocks (bl o cks 0 to 7 ) to

store t he 64-bit Uni que Identifier (UI D). The UID is

used during the anti-collision sequence (Invento-

ry). I t is writt en, by ST, at time of manufacture, but

part of it can be cust omer-accessible and custom-

er-writable, on special request.

The LRI64 has an AFI register, in which to store

the Application Family Identifier value, which is

also used during the anti-collision sequence.

The LRI64 has a DSFID register, in which t o store

the Data Storage Form at Iden tifier value, which is

used for the LRI64 Inventory answer.

The five following blocks (blocks 10 to 14) are

Write-Once Read-Many (WORM) memory. It is

possible to write to each of them once. After the

first valid write access, the block is automatically

locked, and only read commands are possible.

SIGNAL DESCRIPTION

AC1, AC0. The pads for the Antenna Coil. AC1

and AC0 must be directly bonded to the antenna.

AC1 Antenna Coil

AC0 Antenna Coil

AI08590

AC1

LRI64

AC0

Power

Supply

Regulator

Manchester

Load

Modulator

ASK

Demodulator

120-bit

WORM

Memory

AI09741

Block

Addr

01234567

UID 0

UID 1

UID 2

UID 3

UID 4

UID 5 = IC_ID

UID 6 = 02h

UID 7 = E0h

AFI (WORM Area)

DSFID (WORM Area)

WORM Area

7/38

LRI64

COMMANDS

The LRI64 supports the following comma nds:

Inventory. Used to perform the anti-collision se-

quence. The LRI64 answers to the I nvent ory c om-

mand when all of the 64 bits of the UID have been

correctly written.

Stay Quiet. Used to put the LRI64 in Quiet mode.

In this mode, the LRI64 only responds to com-

mands in Addressed mode.

Read Block. Used to output the 8 bits of the se-

lected block.

Write Block. Used to write a new 8-bit value in

the selected block, provided that the block is not

locked. This command can be issued only once to

each block.

Get_System_Info. Used to allow the application

system to identify the product. It gives the LRI64

memory size, and IC reference (IC_ID ).

In it ial D i a logue for Vi c i n ity Ca rds

The dialogue between the Vicinity Coupling De-

vice (VCD) and t he LRI 64 is conducted according

to a technique called Reader Talk First (RTF). This

involves the following sequence of operations:

1. activation of the LRI64 by the RF operating

field of the VCD

2. transm iss ion of a command by the VCD

3. transm iss ion of a response by the LRI64

POWER TRANSFER

Power transfer to t he LRI64 is accom pl ished by in-

ductive couplin g of the 13.5 6MHz radio signal be-

tween the antennas of the LRI64 and VCD. The

RF field transmitted by the VCD induces an AC

voltage on the LRI64 antenna , which is then recti-

fied, smoothed and voltage-reg ulated. Any am pli-

tude modulation present on the signal is

demodulat ed by the Amplitude Shift K eying (ASK)

demodulator.

Frequency

The ISO15693 standard defines the carrier fre-

quency (fC) of the operating field to be

13.56MHz±7kHz.

Ope rat in g Fi el d

The LRI64 operates continuously between Hmin

and Hmax.

– The minimum operating field is Hmin and has a

value of 150mA /m (rms).

– The maximum operating field is H max and has

a val ue of 5A/m (rms).

A VCD generates a field of at least Hmin and not

exceeding H max in the operating volume.

LRI64

8/38

COMMUNICA TION SIGNAL FRO M VCD TO LRI 6 4

Communi cations between the VCD and the LRI64

involves a type of Amplitude Modulation called

Amplitude Shift Keying (ASK).

The LRI64 only supports the 10% modulation

mode speci fied i n t he IS O15693 standard. Any re-

quest that the VCD might send using the 100%

modulation mode, is ignored, and the LRI64 re-

mains in its current state. However, the LRI64 is,

in fact, operational for any degree of modulation

index from between 10% and 30% .

The modulation index is defined as (a-b)/(a+b)

where a and b are the peak and minimum signal

amplitude, respectively, of the carrier frequency,

as shown in Figure 4.

Table 2. 10% Mo dulation Parameters

Figure 4. 10% Modulation Wavefor m

Figu re 5. “ 1- ou t-o f -4 ” Coding Ex am ple

Parameter Min Max

hr – 0.1 x (a-b)

hf – 0.1 x (a-b)

AI06655B

tRFF tRFSFL tRFR

ab t

AI06659B

75.52 µs

75.52 µs 75.52 µs 75.52 µs

10 01 11

9/38

LRI64

DATA RATE AND DATA CODING

The data coding method involves pulse position

modulation. The LRI64 supports the “1-out-of-4”

pulse coding mode. Any request that the VCD

might send in the “1-out-of-256” pulse coded

mode, is ignored, and the LRI64 remains in its cur-

rent state.

Two bit values are encoded at a time, by the posi-

tioning of a pause of the carrier frequen cy in one

of four possible 18.88µs (256/fc) time slots, as

shown in Figure 6.

Four successive pairs of bits form a byte. The

transmission of one byte takes 302.08 µs and,

consequently, the data rate is 26.48 kbits/s (fc/

512).

The encoding for the least significant pair of bits is

transmitted first. For example F igure 5. shows the

transmission of E1h (225d, 1110 0001b) by the

VCD.

Figu re 6. “ 1- ou t-o f -4 ” Coding M od e

AI06658

9.44 µs 9.44 µs

75.52 µs

28.32 µs 9.44 µs

75.52 µs

47.20µs 9.44 µs

75.52 µs

66.08 µs 9.44 µs

75.52 µs

Pulse position for "00"

Pulse position for "11"

Pulse position for "10" (0=LSB)

Pulse position for "01" (1=LSB)

LRI64

10/38

VCD TO LRI64 FRAM ES

Request Frames are delimit ed by a Start of Frame

(SOF) and an End of Frame (EOF) and are imple-

mented using a code violation mechanism. Un-

used options are reserved for fu ture use.

The LRI64 is ready to receive a new command

frame from the V CD after a delay of t 2 (s e e Table

14.) after having sent a response frame to the

VCD.

The LRI64 generates a Power On delay of tPOR

(see Table 14.) after being activated by the power-

ing field. After this delay, the LRI64 is ready to re-

ceive a command f rame from the VCD.

In the IS O15693 st andard, the SOF is used to de-

fine the data coding mode that the VCD is going to

use in the following command frame.

The SOF that is sho wn in F igure 7. selects the “1-

out-of-4” data coding m ode. (The LRI 64 does not

support the SOF for the “1-out-of-256” data coding

mode.)

The corresponding EOF sequence is shown in

Figure 8.

Figure 7. Request SOF, using the “1-out-of-4” Data Coding Mode

Figu re 8. Re qu e st EO F

AI06660

37.76 µs

9.44 µs 9.44 µs

37.76 µs

9.44 µs

AI06662

9.44 µs

37.76 µs

9.44 µs

11/38

LRI64

COMMUNICATIONS SIGNAL FROM LRI64 TO VCD

The ISO15693 standard defines several modes,

for some parameters, to cater for use in different

application requirements and noise environments.

The LRI64 does not support all of these modes,

but supports t he single subcarrier mode at the fast

data rate.

Loa d Modulat i on

The LRI64 is capable of communication to the

VCD via the inductive coupling between the two

antennas. Th e carrier is load ed, with a s ubcarrier

with frequency fS, generated by switching a load in

the LRI64.

The amplitude of t he variation to the signal , as re-

ceived on the VCD antenna, is at least 10mV,

when measured as des cri bed in the test methods

defined in International Standard ISO1037 3-7.

Subcarrier

The LRI64 supports the one subcarrier modulat ion

response format. This format is selected by the

VCD usi ng the fir st bit in the protocol header.

The frequency, fS, of the subcarrier load modula-

tion is 423.75kHz (=fC/32).

Data Rate

The LRI64 response uses the high data rate for-

mat (26.48 kbit s/s). T he selection of the da ta rate

is made by the VCD using the second bit in the

protocol header.

Bit Representation and Coding using One

Subcarrier, at the High Data Rate

Data bits are encoded using Manchester coding,

as described in F igure 9. and Figure 10.

Logic 0. A logic 0 starts with 8 pulses of

423.75kHz (fC/32) followed by an unmodulated

period of 18.88µ s as shown in Figure 9.

Figu re 9. Lo gi c 0, Hig h D at a R at e

Logic 1. A logic 1 starts with an unmodulated

period of 18.88µs followed by 8 pulses of

423.75kHz (fC/3 2) as shown in Figure 10.

Figu re 10 . Lo gi c 1, H i gh Da ta R at e

AI06663

37.76 µs

AI06664

37.76 µs

LRI64

12/38

LRI64 TO VCD FRAMES

Response Frames are delimited by a Start of

Frame (SOF) and an End of Frame (EOF) and are

implemented using a code violation mechanism.

The LRI64 supports these in the one subcarrier

mode , a t th e fa st d a ta rat e , o n ly.

The VCD is ready to receive a response frame

from the LRI64 before 320.9µs (t1) after having

sent a command frame .

LRI64 SOF

SOF comprises three parts: (see Fi gure 11.)

– an unmo dulat ed period of 56.64µs,

– 24 pulses of 423.75kHz (fc/32),

– a logic 1 which start s with an unmodulated

period of 18.88µs followed by 8 pulses of

423.75kHz.

LRI 64 EOF

EOF comprises three parts: (see Fi gure 12.)

– a logic 0 which starts with 8 pulses of

423.75kHz followed by an unmodulated

period of 18.88µs.

– 24 pulses of 423.75kHz (fC/32),

– an unmodulated time of 56 .64µ s.

Figure 11. Respon se SOF, using High Data Rate and One Subcarrier

Figure 12. Respon se EOF, using High Data Rate and One Subcarrier

AI06671B

113.28 µs 37.76 µs

AI06675B

113.28 µs

37.76 µs

13/38

LRI64

SPECIAL FIELDS

Unique Identifier (UID)

Members of the LRI64 family are uniquely identi-

fied by a 64-bit Unique Identifier (UID). This is

used for addressing each LRI64 device uniquely

and individu ally, during the ant i-collision loop and

for one-to-one e xchange between a VCD and an

LRI64.

The UID complies with ISO/IEC 15963 and ISO/

IEC 7816-6. It is a read-only code, and comprises

(as summarized in Figure 13.):

– 8-bit prefix, the most significant bits, set at E0h

– 8-bit IC Manufacturer code (ISO/IEC 7816-6/

AM1), set at 02h (for STM icroelect ronics)

– 48-bit Unique Serial Number

Figure 13. UID Format

Figure 14. Decision Tree for AFI

Application Family Identifier (AFI)

The Application Family Identifier (AFI) indicates

the type of appl ication t argeted by the VCD, and is

used to select only those LRI64 devices meeting

the required application criteria (as summarized i n

Figure 14.). The value is programmed by the

LRI64 issuer in the AFI register. Once pro-

grammed , it cannot be modified.

The most signi ficant nibble of the A FI is used to in-

dicate one specific application, or all famil i es. The

least significant nibble of the AFI is used to code

one specif ic s ub-f am ilies, or a ll s ub- fa m ilies. Sub-

family codes, other than 0, are proprie tary (as de-

scribed in the ISO 15693-3 documentation).

Data Storag e Format Identifier (DSFID)

The Data Storage Format Identifier (DSFID) indi-

cates how the data is structured in the LRI64

memory. It is c oded on one byt e. It al lows for quick

and brief knowledge on the logical organization of

the data. It is pro grammed by the LRI64 issue r in

the DSFID register. Once programmed, it cannot

be modified.

Cyclic Redundancy Code (CRC)

The Cycli c Redundancy Code (CRC) is calculated

as defined in ISO/IEC 132 39, starting from an ini-

tial reg ister content of all ones: FFFFh.

The 2-byte CRC is appended to each Request and

each Response, within each frame, before the

EOF. The CRC i s calculated on all the bytes after

the SOF, up to the CRC field.

Upon reception of a Request from the VCD, the

LRI64 verif ies that the CRC value is valid. If it i s in-

valid, it discards the frame, and does not answer

the VCD.

Upon rec eption of a Response from the LRI64, it is

recommended that the VCD verify that the CRC

valu e is valid . If it is in valid, the act ion s tha t ne ed

to be performed are up to the VCD designer.

The CRC is transm itted Least Significant Byte first.

Each byte is transm itted Leas t Si gnificant Bit first,

as shown in Figure 15.).

Figure 15. CRC Format

AI09725

E0h Unique Serial Number02h

63 55 47 0

Most significant bits Least significant bits

AI06679B

Inventory Request

Received

No Answer

Yes

AFI value

= 0 ?

Yes

No AFI Flag

Set ?

Yes

Answer given by the VICC

to the Inventory Request

AFI value

= Internal

value ?

AI09726

Most Significant ByteLeast Significant Byte

l.s.bit l.s.bitm.s.bit m.s.bit

LRI64

14/38

LRI6 4 P ROTO COL DE SCR IPT IO N

The Transmission protocol defines the mecha-

nism to exchange instructions and data between

the VCD and the LRI64, in each direction. Based

on “VCD talks first”, the LRI64 does not start trans-

mitting unless it has received and properly decod-

ed an instruction sent by the VCD.

The protocol is based on an exchange of:

– a Reque st fro m the V CD to t h e L RI64

– a Response from the LRI64 to t he VCD

Each Reques t and each Respon se are contained

in a Fram e. The frame delimiters (SOF, EOF) are

described in the previous paragraphs.

Each Request (Figure 16.) consists of:

– Request SOF (Figure 7.)

– Request Flags ( Table 3. to Table 5.)

– Com mand Code

– Parameters (depending on the Command)

– App lication Data

– 2-byte CRC (Figure 15.)

– Request EOF (Figure 8.)

Each Response (Figure 17.) consists of:

– R espons e SOF (Figure 11.)

– R espons e Flags (Table 6.)

– Parameters (depending on the Command)

– App lication Data

– 2-byte CRC (Figure 15.)

– R espons e EOF (Figure 12.)

The number of bi ts transmitt ed in a frame is a mul-

tiple of eight, and thus always an integer number

of bytes.

Single-byte fields are transmitted Least Significant

Bi t first .

Multiple-byte fields are transmitted Least Signifi-

cant Byte first, with each byte transmitted Least

Significant Bit fi rst.

The setting of the flags indicates the presence of

any optional fields. When the flag is set, 1, the field

is present. When the flag is reset, 0, the field is ab-

sent.

Figure 16. VCD Request Fr ame Format

Figure 17. LRI64 Resp on se Frame F ormat

Figure 18. LRI64 Protocol Timing

AI09727

Request

SOF Request

Flags Command

Code Parameters Data 2-Byte

CRC Request

EOF

AI09728

Response

SOF Response

Flags Parameters Data 2-Byte

CRC Response

EOF

AI06830B

VCD Request Frame Request Frame

VICC Response Frame Response Frame

Timing t1 t2 t1 t2

15/38

LRI64

LRI64 STATES

A LRI64 can be in any one of three states:

–Power-off

– Ready

– Quiet

Transitions b etwe en thes e sta tes are as spec ified

in Figur e 19.

Power-off State

The LRI64 is in the Power-off state when it re-

ceives insuf fici ent energy from the VCD.

Ready State

The L RI64 is in the Ready state when it receives

enough energy from the VCD. It answers to any

Request in Addressed and Non-addressed

modes.

Quiet State

When in the Quiet State, the LRI64 answers to any

Request in Addressed mode.

MODES

The term mode refers to the mechanism for spec-

ifying, in a Request, the set of LRI64 devices that

shall answer to the Reques t.

Addressed Mode

When the Address_flag is set to 1 (Addressed

mode), the Reque st contains the Uni que ID (U ID)

of the addressed LRI64 device (su ch as an LRI64

device). Any LRI64 receiving a Request in which

the Address_flag is set to 1, compares the re-

ceived Unique ID to its own UID. If it matches, it

execute the Request (if possible) and returns a

Response to the VCD, as specified by the com-

mand description. If it does not match, the LRI64

device remains silent.

Non-Addressed Mode ( General Request)

When the Addres s_flag is set to 0 (Non-addressed

mode), the Request does not contain a Unique ID

field. Any LRI64 device receiving a Request in

which the Address_flag is set to 0, executes the

Request and returns a Response to the VCD as

specified by the command desc ription.

Figure 19. L RI64 State Transition Diag ram

AI09723

Power Off

In fieldOut of

field

Write, Read, Get_System_Info

in addressed mode

Stay quiet(UID)

Out of

field Inventory (if UID written)

Write, Read, Get_System_Info

in addressed and

non-addressed modes

Ready

Quiet

LRI64

16/38

FLAGS AND ERROR CODES

Request Flags

In a Request, the 8-bit Flags Field specifies the ac-

tions to be performed by the LRI64, and whether

corresponding fields are present or not.

Flag bit 3 (the Inventory_f lag) defines t he way t he

four most significant flag bits (5 to 8) are used.

When bit 3 i s res et (0), bi ts 5 t o 8 def ine the LRI64

selection criteria. When bit 3 is set (1), bits 5 to 8

define the LRI64 In ventory param eters.

Table 3. Request Flags 1 to 4

Note: 1. If the value of the Request Flag is a non authorized value,

the LRI 64 does not e xe cute the command, a nd does not

respond to th e request.

Table 4. Request Flags 5 to 8 (wh en Bit 3 = 0)

Note: 1. Only bit 6 (Address flag) can be configured for t he LRI64.

All others bi ts (5, 7 and 8) must be reset to 0.

Table 5. Request Flags 5 to 8 (wh en Bit 3 = 1)

Note: 1. Bits 7 and 8 must be reset t o 0.

Response Flags

In a Response, the 8-bit Flags Field indicates how

actions have been performed by the LRI64, and

whether corresponding fields are present or not.

Table 6. Response Flags 1 to 8

Response Error Code

If the Error Flag is set by the LRI64 in the Re-

sponse, the Error Code Field is present and pro-

vides information about the error that occurred.

Table 7. shows the one error code that is support-

ed by the LRI64.

Table 7. Response Error Code

Bit Name Value 1 Description

1Sub-

carrier

Flag 0Single sub-carrier

frequency mode.

(Option 1 is not supported)

2Data_rate

Flag 1High data rate mode.

(Option 0 is not supported)

3Inventory

Flag

0Flags 5 to 8 meaning are

according to Table 4.

1Flags 5 to 8 meaning are

according to Table 5.

4Protocol

Extension

Flag 0No Protocol format

extension. Must be set to 0.

(Option 1 is not supported)

Bit Name Value 1 Description

5Select

Flag 0No selection mode.

Must be set to 0.

(Option 1 is not supported)

6Address

Flag

Non addressed mode.

The UID field is not present

in the request. All LRI64

shall answer to the request.

Addressed mode.

The UID field is present in

the request. Only the LRI64

that matches the UID

answers the request.

7Option

Flag 1 0No option. Must be set to 0.

(Option 1 is not supported)

8RFU 1 0No option. Must be set to 0.

(Option 1 is not supported)

Bit Name Value 1 Description

5 AFI Flag 0 AFI field is not present

1 AFI field is present

6Nb_slots

Flag 016 slots

11 slot

7Option

Flag 0No option. Must be set to 0.

(Option 1 is not supported)

8RFU 0 No option. Must be set to 0.

(Option 1 is not supported)

Bit Name Value Description

1 Error Flag

0 No error

1Error detected. Error

code is in the "Error"

field.

2RFU 0

3RFU 0

4RFU 0

5RFU 0

6RFU 0

7RFU 0

8RFU 0

Error

Code Meaning

0Fh Error with no specific inf ormation given

17/38

LRI64

ANTI-COLLISION

The purpose of t he ant i-collision sequence is to al-

low the VCD to compile a list of the LRI64 devices

that are present in the VCD f ield, each on e identi-

fied b y its unique ID (UID ).

The VCD is the master of the communication with

one or multiple LRI64 devices. It initiates t he com-

munication by issuing the Inventory Request

(Figure 22.).

Request Flags

The Nb_slots_flag needs to be set appropriately.

The AFI Flag needs to be set, if the Optional AFI

Field is to be present.

Mask Len gth and Mask Value

The Mask Length defines the number of significant

bits in the Mask Value.

The Mask Value is contained in an i nteger number

of bytes.

The least significant bit of each is transmitted first.

If the Mas k Lengt h is not a m ultipl e of 8 (bits), the

most significant end of the Mask Value is pad ded

with the required number of null bits (set to 0) so

that the Mask Value is contained in an integer

number of by t es, so that t he ne xt f ield (the 2-Byte

CRC) starts at the n ext byte bou ndary.

In the example of Figure 20., the Mask Length is

11 bits. The Mask Value, 10011001111, is padded

out at the m ost significant end with five bits set to

0. The 11 bits Mask plus the current slot number is

comp ared to the UID .

Inventory Respons es

Each LRI64 sends its Response in a given time

slot, or els e remains silent.

The first slot starts i mmediately after the reception

of the Request EOF.

To switch to the next slot, th e VCD sends another

EOF.

The fol l owing rules and restrictions apply:

– if no LRI64 answer is det e cted, the VCD may

swi tch to the next slot by sending an EOF

– if one or more LRI64 answers are detected,

the VCD waits until th e comple te frame has

been rec eived before send ing an EOF, to

swi tch to the next slot.

The pulse shall be generated according to the def-

inition of the EOF in ISO/IEC 15693-2.

Figure 20. Comparison betwe en the Mask, Slot Number and UID

AI06682

Mask value received in the Inventory command 0000 0100 1100 1111b16 bits

The Mask value less the padding 0s is loaded

into the Tag comparator 100 1100 1111b11 bits

The Slot counter is calculated xxxxNb_slots_flags = 0 (16 slots), Slot Counter is 4 bits

The Slot counter is concatened to the Mask value xxxx 100 1100 1111b

Nb_slots_flags = 0 15 bits

The concatenated result is compared with

the least significant bits of the Tag UID. xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx 64 bits

LSBMSB

b0b63

CompareBits igno red

UID

4 bits

LRI64

18/38

RE QUEST PROC ESSING BY THE LRI64

Upon reception of a vali d Request , the LRI64 per-

forms the f ollowi ng al gori thm, where:

–NbS is the tota l number of slots (1 or 16)

–SN is the current slot num ber (0 to 15)

– The fu nction LSB(value,n) returns th e n least

signifi cant bits of value

– The function MSB(value,n) ret urns the n most

signifi cant bits of value

– “&” is the concatenati on operator

–Slot_Frame is either a SO F or an EOF

SN = 0

if ( Nb_slots_fl ag)

then NbS = 1

SN_le ngth = 0

endif

else NbS = 16

SN_le ngth = 4

endif

label1:

if L SB(UID, SN_ length + Mas k_length) =

LSB(S N,SN_length )&LSB(Mask,M ask_length)

then answe r to invento ry request

endif

wait (Slot_Fram e)

if S lot_Frame = SOF

then Stop Anticollision

decod e/process re quest

exit

endif

if S lot_Frame = EOF

if SN < NbS-1

thenSN = SN + 1

goto label1

exit

endif

Explanation of the Possible Cases

Figure 21. summarizes the main possible cases

that can occur during an anti-collision sequence

when the number of slots is 16.

The different steps are:

– The V CD sends an Inventory Request, in a

fram e, terminated by a EOF. The number of

slots is 16.

– LRI64 #1 transmits its Response in Slot 0. It is

the only one to do so, therefore no collision

occurs and its UID is received and registered

by the VCD;

– The VCD sends an EOF, t o switch to the next

slot.

– In slot 1, two LRI64 dev ices, #2 and #3,

transmit their Responses. This generates a

collision. The VCD records it, and remembers

that a collision was detected in Slot 1.

– The VCD sends an EOF, t o switch to the next

slot.

– In Slot 2, no LRI64 transmits a Response.

Theref ore the VCD does not detect a LRI64

SOF, and decides to swit ch t o the nex t sl ot by

sen ding an EOF.

– In slot 3, there is another collision caused by

R espons es from LRI64 #4 and #5

– The VCD then decides to send a Request (for

instance a Read Block) to LRI64 #1, whose

U ID was already correctly recei ved.

– All LRI64 devices det ec t a SOF and exit the

anti -collision seque nce. They process this

Request and si nce the Request is addressed

to LRI64 #1, only LRI64 #1 t ransm its its

Response.

– All LRI64 devices are ready to receive another

Request. If it i s an Inventory command, the

slot numbering seque nce restarts from 0.

Note: the decision to interrupt the anti-collision se-

quence is up to the V CD. It could have con tinued

to send E O Fs until Slot 15 and the n send the Re-

quest to LRI 64 #1.

19/38

LRI64

Figure 21. Description of a Possible Anti-collision Sequence betw een LR I64 Devices

AI06831B

Slot 0 Slot 1 Slot 2 Slot 3

VCD SOF Inventory

Request EOF EOF EOF EOF SOF Req uest to

LRI512 1 EOF

Response

2Response

VICCs Response

from

LRI512 1

Response

1Response

3Response

Timing t1 t2 t1 t2 t3 t1 t2 t1

Comment No

collision Collision No

Response Collision

Time

LRI64

20/38

TIMING DEFINITIONS

Figure 21. s hows three specific del ay times: t1, t2

and t3. All of them have a minimum value, speci-

fied in Table 14.. The t1 parameter also has a max-

imum and a typic al value specified in T able 14., as

summarized in Ta ble 8.

Table 8. Timing Values

Note: 1. tSOF is the d uration for the LRI64 to transmit an SOF to

the VCD.

2. t1(max) do es not a pply for write alike requests. Timing

conditions for write alike requests are defined in the com-

mand desc ription.

3. The tol erance o f s pecific timi ngs is ± 32/fC.

LRI64 Response Delay, t1

Upon detection of the rising edge of the EOF re-

ceived from the VCD, the LRI64 waits for a time

equal to

t1(typ) = 4352 / fC

before starting to transmit its response to a VCD

request, or switching to the next slot when in an in-

ventory process.

VCD New Request Delay, t2

t2 is the time after which the VCD may send an

EOF to switch to the next slot when one or more

LRI64 responses have been received during an in-

ventory command. It starts from the reception of

the EOF received from the LRI64 devices.

The EOF sent by the VCD is 10% modulated, in-

dependent of the modulation index used for trans-

mitting th e VCD request to the LRI64.

t2 i s also the time aft er whi ch the VCD may send a

new request to the LRI64 as described in Figure

18. t2(min) = 4192 / fC

VCD New Request Delay when there is No

LRI64 Response , t3

t3 is the time after which the VCD may send an

EOF to switch to the next slot when no LRI64 re-

sponse has been received.

The EOF sent by the VCD is 10% modulated, in-

dependent of the modulation index used for trans-

mitting th e VCD request to the LRI64.

From the time the VCD has generated the rising

edge of an EOF:

– The VCD wai ts for a time at least equal to the

sum of t3(min) and the typical response time of

an LRI64, which depends on the data rate and

subcarrier modulation mode, before sending a

subs equent EOF.

Min. Typ. Max.

t1t1(min) t1(typ) = 4352 / fCt1(max)

t2t2(min) = 4192 / fC——

t3t1(max) + tSOF

(see notes1,2)——

21/38

LRI64

COMMANDS CODES

The LRI64 supports the comm and code s l isted in

Table 9.

Tabl e 9. Command Codes

Inventory

When receiving the Inventory request, the LRI64

performs the anti-collision sequence. The

Inventory_flag is set to 1. The meanings of Flags

5 to 8 is as desc ribed in Table 5.

The Request Frame (Figure 22.) contains:

– Request Flags ( Table 3. and Table 5.)

– Inventory Command Code (01h, Table 9.)

– AFI, if the AFI Flag is set

– Mask Length

– Mask Value

– 2-byte CRC (Figure 15.)

In case of errors in the Inventory request frame,

the LRI64 does not generate any answer.

The Response Fra me (Figure 23.) contains:

– R espons e Flags (Table 6.)

–DSFID

– U nique ID

– 2-byte CRC (Figure 15.)

Figure 22. Inventory, Request Frame Fo rm at

Figure 23. Inventory, Respo nse Frame Fo rmat

Command Code Function

01h Inventory

02h Stay Quiet

20h Read Single Block

21h Write Single Block

2Bh Get System Info

AI09729

Request

SOF Request

Flags Command

Code Optional

AFI Mask Value 2-Byte

CRC Request

EOF

8 bits 8 bits

01h 8 bits 0 to 8 bytes 16 bits

Mask

Length

8 bits

AI09730

Response

SOF Response

Flags DSFID 2-Byte

CRC Response

EOF

8 bits 8 bits 16 bits

UID

64 bits

LRI64

22/38

Stay Quiet

The Stay Quiet Command is always executed in

Addressed Mode (the Address_F lag is set to 1).

The Request Frame (Figure 24.) contains:

– R equest Flags (22h, as described in Table 3.

and Table 4.)

– Stay Quiet Command Code (02h, Table 9.)

– U nique ID

– 2-byte CRC (Figure 15.)

When receiving the Stay Quiet command, the

LRI64 enters the Quiet State and does not send

back a Response. There is no response to the

Stay Quiet Comman d.

When in the Quiet State:

– the LRI64 does not process any Reques t in

whi ch the Inventory_flag is set

– the LRI64 resp onds to commands in the

Add ressed mode if the UID matche s

The LRI64 exits the Quiet State when i t is tak en to

the Power O ff sta te ( Figure 19.).

Figure 24. Stay Quiet, Request Frame Format

Figure 25. Stay Quiet Frame Exch ang e betwee n VCD and LRI64

AI09731

Request

SOF Request

Flags Command

Code 2-Byte

CRC Request

EOF

8 bits

22h 8 bits

02h 16 bits

UID

64 bits

AI06842

VCD SOF Stay Quiet

Request EOF

23/38

LRI64

Read Single Block

When recei ving the Read Single Bloc k Com mand,

the LRI64 read the requested bloc k and send back

its 8 bits value in the Re sp onse.The Option_Flag

is supported. The Read Single Block can be is-

sued in both addressed and non addressed

modes.

The Request Frame (Figure 26.) contains:

– Request Flags ( Table 3. and Table 4.)

– R ead Single Block Comm and Code (20h,

Table 9.)

– U nique ID (Optional)

– Block Num ber

– 2-byte CRC (Figure 15.)

If there is no error, at the LRI64, the Response

Frame (F igure 27.) contains:

– R espons e Flags (Table 6.)

– Blo ck Locking Status, if Option_Flag is set

– 1 byte of Block Da ta ( T able 10.)

– 2-byte CRC (Figure 15.)

Otherwise, if there is an error, the Response

Frame (F igure 28.) contains:

– R espons e Flags (01h, Table 6.)

– Error Code (0Fh, Table 7.)

– 2-byte CRC (Figure 15.)

Table 10. Block Lock Status

Figure 26. Read Single Blo ck, Request Frame F ormat

Figure 27. Read Sing le Block, Respo nse Frame Fo rm at, when E rro r_Flag is not Set

Figure 28. Read Single Blo ck, Response Frame Format, when Error_Flag is Set

Figure 29. READ Single Block Frame Exchange be tween VCD and LRI64

Bit Name Value Description

0Block

Locked 0 Current Block not locked

1 Current Block locked

7RFU 0

AI09732

Request

SOF Request

Flags Command

Code UID 2-Byte

CRC Request

EOF

8 bits 8 bits

20h 64 bits 16 bits

Block

Number

8 bits

AI09733

Response

SOF Response

Flags BlockLock

Status 2-Byte

CRC Response

EOF

8 bits 8 bits 16 bits

Data

8 bits

AI09734

Response

SOF Response

Flags Error

Code 2-Byte

CRC Response

EOF

8 bits

01h 8 bits

0Fh 16 bits

AI06832B

VCD

VICC t1

SOF Read Single

Block Request EOF

SOF Read Single

Block Response EOF

LRI64

24/38

Write Single Block

When re ceiving the Write Single Bl ock comm and,

the LRI64 writ es the requested block with the data

contained in the Request and report the success

of the operation in the Response. The Option_Flag

is not supported a nd must be set to 0. The Write

Single Block can be issued i n both addressed and

non addressed mo des.

During the write cycle tW, no m odulation shall oc-

cur, otherwise the LRI64 may program the data in-

correctly in the memory.

The Request Frame (Figure 30.) contains:

– Request Flags ( Table 3. and Table 4.)

– Write Single Block Comm and Code (21h,

Table 9.)

– U nique ID (Optional)

– Block Num ber

–Data

– 2-byte CRC (Figure 15.)

If there is no error, at the LRI64, an empty Re-

sponse Frame (Figure 31.) is sent back after the

write cycle, c ontaining no parameters. It just con-

tains:

– R espons e Flags (Table 6.)

– 2-byte CRC (Figure 15.)

Otherwise, if there is an error, the Response

Frame (F igure 32.) contains:

– R espons e Flags (01h, Table 6.)

– Error Code (0Fh, Table 7.)

– 2-byte CRC (Figure 15.)

Figu re 30 . Wri te Single Block, Requ es t Fra m e F orm at

Figure 31. Write Single Block, Response Frame Format, when Error_Flag is not Set

Figure 32. Write Single Block, Response Frame Format, when Error_Flag is Set

Figure 33. Write Single Block Frame E xchange b etween VCD and LRI64

AI09735

Request

SOF Request

Flags Command

Code UID 2-Byte

CRC Request

EOF

8 bits 8 bits

21h 64 bits 16 bits

Block

Number

8 bits

Data

8 bits

AI09736

Response

SOF Response

Flags 2-Byte

CRC Response

EOF

8 bits 16 bits

AI09737

Response

SOF Response

Flags Error

Code 2-Byte

CRC Response

EOF

8 bit

01h 8 bits

0Fh 16 bits

AI06833B

VCD

VICC

t1 EOF

SOF Write Single

Block Request EOF

SOF Write Single

Block Response Write sequence when error

SOF Write Single

Block Response EOF

t1tw

25/38

LRI64

Get System Info

When receiving the Get System Info command,

the LRI64 send back its information data in the Re-

sponse.The Option_Flag is supported and must

be set to 0. The G et System In fo can be issue d in

both addressed and non addressed modes.

The Request Frame (Figure 26.) contains:

– Request Flags ( Table 3. and Table 4.)

– Get S ystem Info Command Code (2Bh, Table

9.)

– U nique ID (Optional)

– 2-byte CRC (Figure 15.)

If there is no error, at the LRI64, the Response

Frame (F igure 27.) contains:

– R espons e Flags (Table 6.)

– Informat i on Flags set to 0Fh, indicating the

four information fields that are present

(DSFID, AFI, Memory Size, IC Reference)

– U nique ID

– D SFID value (as written in block 9)

– AF I value (as written in block 8)

– Mem ory size: for the LRI64, there are 15

block s (0Eh) of 1 byte (00h).

– IC Reference: only the 6 most significant bits

are used. The product code of the LRI64 is

00 0101b=5d

– 2-byte CRC (Figure 15.)

Otherwise, if there is an error, the Response

Frame (F igure 28.) contains:

– R espons e Flags (01h, Table 6.)

– Error Code (0Fh, Table 7.)

– 2-byte CRC (Figure 15.)

Figure 34. Get System Info, Request Frame For mat

Figure 35. Ge t System Info, Response Fra m e Format, whe n Er ror_ Flag is not Se t

Figure 36. Ge t System Info, Response Fra m e Format, whe n Er ror_ Flag is Set

Figure 37. Get System Info Frame Exchang e betwee n VC D and LRI64

AI09738

Request

SOF Request

Flags Command

Code UID 2-Byte

CRC Request

EOF

8 bits 8 bits

2Bh 64 bits 16 bits

AI09739

Response

SOF Response

Flags Information

Flags UID 2-Byte

CRC Response

EOF

8 bits

00h 8 bits

0Fh 64 bits 16 bits

DSFID

8 bits

AFI

8 bits

Memory

Size

16 bits

000Eh

Ref

8 bits

000101xxb

AI09740

Response

SOF Response

Flags Error

Code 2-Byte

CRC Response

EOF

8 bits

01h 8 bits

0Fh 16 bits

AI09724

VCD

VICC t1

SOF Get System

Info Request EOF

SOF Get System

Info Response EOF

LRI64

26/38

MAXI MUM RAT IN G

Stressing the device ab ove t he rating listed in t he

Absolute Maxi mum Ratings table may cause per-

manent damage to the device. These are stress

ratings only and operation of the device at t hese or

any other con ditions ab ove those i ndicated in t he

Operating sections of this specification is not im-

plied. Exposure to Absolute Max imum Rating con-

ditions for extended periods may affect device

reliability. Refer also to the STMicroelectronics

SURE Program and other relevant quality docu-

ments.

Table 11. Absolute Maximum Ratings

Note: 1. Mil. S td. 883 - Method 3015

2. E SD test: ISO 10373-7 specification

Symbol Parameter Min. Max. Unit

TSTG, hSTG, tSTG Storage Conditions

Wafer

15 25 °C

23 months

kept in its antistatic bag

A1, A6, A7

15 25 °C

40% 60% RH

2 years

ICC Supply Current on AC0 / AC1 –20 20 mA

VMAX Input Voltage on AC0 / AC1 –7 7 V

VESD Electrostatic Discharge Voltage 1 A1, A6, A7 –7000 7000 V

27/38

LRI64

DC AND A C PARAMETERS

This section summarizes the operating and mea-

surement condition s, and t he DC a nd AC charac-

teristics of the device. The parameters i n the DC

and AC Characteristic tables that follow are de-

rived from tests performed under the Measure-

ment Conditions summarized in the relevant

tables. Des igners shoul d c heck that the operating

conditions in t heir circuit matc h the measurem ent

conditions when relying on the quoted parame-

ters.

Table 12. Operating Conditions

Figure 38. LRI64 Synch ro nous Tim ing, Transm it and Receiv e

Figure 38. shows an ASK modulated signal, from

the VCD to the LRI64. The test condition for the

AC/DC parameters are:

– Cl ose coupling condition with test er antenna

(1mm)

– Gives LRI64 performance on tag antenna

Table 13. DC Characteristics

Note: 1. TA=–20 to 85°C

Symbol Parameter Min. Max. Unit

TAAmbient Operating Temperature –20 85 °C

AI06680B

tRFF tRFR

tRFSBL

tMIN CD

fCC

Symbol Parameter Test Conditions 1 Min. Typ. Max. Unit

VCC Regulated Voltage 1.5 3.0 V

VRET R etrom odul ated Induc ed

Voltage ISO10373-7 10 mV

ICC Supply Current Read VCC =3.0V 50 µA

Write VCC =3.0V 150 µA

CTUN Internal Tuning Capacitor f=13.56MHz for W4/1 21 pF

f=13.56MHz for W4/2 28.5 pF

LRI64

28/38

Table 14. AC Characteristics

Note: 1. TA=–20 to 85°C

2. All ti m in g measu rem ents w ere performed on a reference antenna wi th the following character ist i cs:

External size: 75mm x 48mm

Number of turns: 6

Width of condu ct or: 1mm

Spac e between 2 conduct ors: 0.4mm

Value of the Tuning Capacitor: 28.5pF (LRI64-W4)

Value of the coi l : 4.3µH

Tuning Frequency: 14.4MHz.

Symbol Parameter Test Conditions 1, 2 Min. Typ. Max. Unit

fCExternal RF Signal Frequency 13.553 13.56 13.567 MHz

MICARRIER 10% Carrier Modulation Index MI=(A-B)/(A+B) 10 30 %

tRFR, tRFF 10% Rise and Fall Time 0 3.0 µs

tRFSBL 10% Minimum Pulse Width for

Bit 7.1 9.44 µs

tJIT Bit Pulse Jitter –2 +2 µs

tMINCD Minimum Time from Carrier

Generation to First Data From H-field min 0.1 1 ms

fSH Subcarr i er Freq uenc y High fC/32 423.75 kHz

t1Time for LRI64 Response 4352/fC313 320.9 322 µs

t2Time between Commands 4224/fC309 311.5 314 µs

tWProgramming Time 93297/fC6.88 ms

29/38

LRI64

P ACKAGE ME CHANICA L

Figu re 39 . A1 A nte n na on Ta pe O ut line

No te : Drawing is not to scal e.

Table 15. A1 Antenna on Tape Mechanical Data

Symbol Parameter Typ Min Max Unit

A1 Coil Width 45 4 4.5 45. 5 mm

A2 Coil Length 76 7 5.5 76. 5 mm

B1 Antenna Cut Width 49 48.8 49.2 mm

B2 Antenna Cut Length 82 81.8 82.2 mm

C1 Die Position from Antenna 23 22.8 23.2 mm

C2 Die Position from Antenna 56 55.8 56.2 mm

Silicon Thickness 180 165 195 µm

Q Unloaded Q value 35

FNOM Unloaded free-air resonance 15.1 MHz

PAH-field Energy for Device Operation 0.03

90 A/m

dbµA/m

A1 B1

ai10119

LRI64

30/38

Figu re 40 . A6 A nte n na on Ta pe O ut line

No te : Drawing is not to scal e.

Table 16. A6 Antenna on Tape Mechanical Data

Symbol Parameter Typ Min Max Unit

A Coil Diameter 35 3 4.5 35. 5 mm

B Antenna cut diameter 40 38.8 40.2 mm

I Hole Diameter 16 15.8 16.2 mm

Overall Thickness of copper antenna coil 80 70 90 µm

Silicon Thickness 180 165 195 µm

Q Unloaded Q value 35

FNOM Unloaded free-air resonance 15.1 MHz

PAH-field Energy for Device Operation 0.5

114 A/m

dbµA/m

ai10120

31/38

LRI64

Figu re 41 . A7 A nte n na on Ta pe O ut line

No te : Drawing is not to scal e.

Table 17. A7 Antenna on Tape Mechanical Data

Symbol Parameter Typ Min Max Unit

A1 Coil Width 40 3 9.5 40. 5 mm

A2 Coil Lengt h 20 19.5 20. 5 mm

B1 Antenna Cut Width 44 43.8 44.2 mm

B2 Antenna Cut Length 24 23.8 24.2 mm

C1 Die Position from Antenna 10 9.8 10.2 mm

C2 Die Position from Antenna 20 19.8 20.2 mm

Overall Thickness of copper antenna coil 160 145 175 µm

Silicon Thickness 180 165 195 µm

Q Unloaded Q value 35

FNOM Unloaded free-air resonance 15.1 MHz

PAH-field Energy for Device Operation 1

120 A/m

dbµA/m

C1C1

A1 B1

ai10121

LRI64

32/38

PART NUMBERING

Table 18. Ordering Information Scheme

For a list of available opt ions (speed, package, etc.) or for further inf ormation on any aspect of this devic e,

please contact your nearest ST Sales Office, or send your enquiries to the following e-mail address: mem-

ories.contactless@st.com

Example: LRI64 – W4 / XXX

Device Type

LRI64

Package

W4 =180 µm ± 15 µm Unsawn Wafer, 18.5 pF tuning capacitor

SBN18= 180µm ± 15 µm Bumped and Sawn Wafer on 8-inch Frame

A1T= 45mm x 76mm Copper Antenna on Continuous Tape

A1S= 45mm x 76mm Copper Singulated Adhesive Antenna on Tape

A6S2U= 35mm Copper Singulated Adhesive CD Antenna on white PET Tape and no marking

A7T= 20mm x 40mm Copper Antenna on Continuous Tape

Customer Code

XXX = Given by STMicroelectronics

33/38

LRI64

APPENDIX A. ALGORITHM FOR PULSED SLOTS

The following pseudo-code describes how the

anti-collision could be implemented on the VCD,

using recursive functions.

func tion push ( mask, addres s); pu shes on pri vate stack

func tion pop (m ask, address ); pops f rom private stack

func tion pulse_ next_pause; generates a power pulse

func tion store( LRI64_UID); stores LRI64_UID

func tion poll_l oop (sub_add ress_size as integer)

pop (m ask, address )

mask = address & m ask; gen erates new m ask

; send the Request

mode = anti-collis ion

send_R equest (Requ est_cmd, mo de, mask len gth, mask va lue)

for su b_address = 0 to (2^sub _address_siz e - 1)

pulse_next_pause

if no_collision_is_detected ; LRI64 is inventorie d

then

stor e (LRI64_UID )

else; rem ember a coll ision was d etected

push(mask,address)

endif

next s ub_address

if stack_not_empty ; if some collisions have been detected and

then ; not yet processe d, the funct ion calls i tself

poll_ loop (sub_ad dress_size); re cursively to process the last st ored collisi on

endif

end poll_loop

main_cycle:

mask = null

addres s = null

push ( mask, addres s)

poll_loop(sub_address_size)

end_main_cycle

LRI64

34/38

APPENDIX B. C- EXAMPLE TO CALCULATE OR CHECK THE CRC16

ACCOR DING TO ISO/IEC 13239

The Cyclic Re dundancy Check (CRC) is calculat-

ed on all data contained in a message, from the

start of the F lags through to the end of D ata. T his

CRC is used from VCD to LRI64 and from LRI64

to VCD.

To add extra protection against shifting errors, a

further transformation on the calculated CRC is

made. The One’s Complement of the calculated

CRC is the value attached to the message for

transmission.

For checking of received messages the 2 CRC

bytes are often also included in the re-calculation,

for ease of use. In this case, given the expected

value for the generated CRC is the residue of

F0B8h

Table 19. CRC Definition

CRC Calculation Example

This example in C language illustrat es one method

of calculating the CRC on a given set of bytes

comprising a message.

#def ine POLYNO MIAL 0 x8408 // x^16 + x ^12 + x^5 + 1

#def ine PRESET _VALUE 0x FFFF

#def ine CHECK_ VALUE 0xF 0B8

#def ine NUMBER _OF_BYTES 4// Example: 4 d ata bytes

#def ine CALC_C RC 1

#def ine CHECK_ CRC 0

void main()

{

un signed int current_crc _value;

un signed char array_of_da tabytes[NUMB ER_OF_BYTES + 2] = {1, 2, 3, 4, 0x91, 0x39} ;

in t number_of_d atabytes = N UMBER_OF_BY TES;

in t calculate_o r_check_crc;

in t i, j;

ca lculate_or_ check_crc = CALC_CRC;

// c alculate_or _check_crc = CHECK_CRC;/ / This coul d be an othe r exampl e

if (calculate _or_check_cr c == CALC_CR C)

{

number_of _databytes = NUMBER_OF_B YTES;

}

el se // ch eck CRC

{

number_of _databytes = NUMBER_OF_B YTES + 2;

}

cu rrent_crc_v alue = PRESE T_VALUE;

fo r (i = 0; i < number_of _databytes; i++)

{

current_c rc_value = c urrent_crc_v alue ^ ((un signed int)a rray_of_ databytes[i] );

for (j = 0; j < 8; j+ +)

{

if (c urrent_crc_v alue & 0x000 1)

CRC Definition

CRC Type Length Polynomial Direction Preset Residue

ISO/IEC 13239 16 bits X16 + X12 + X5 + 1 = Ox8408 Backward FFFFh F0B8h

35/38

LRI64

{

c urrent_crc_v alue = (curr ent_crc_val ue >> 1) ^ P OLYNOMIA L;

}

else

{

c urrent_crc_v alue = (curr ent_crc_val ue >> 1);

}

if (calculate _or_check_cr c == CALC_CR C)

{

current_c rc_value = ~ current_crc_ value;

printf (" Generated CR C is 0x%04X\ n", current _crc_value);

// curren t_crc_value is now ready to be appe nded to the data str eam

// (first LSByte, the n MSByte)

}

else // check CRC

{

if (curre nt_crc_value == CHECK_VA LUE)

{

print f ("Checked CRC is ok (0 x%04X)\n", current_crc_ value);

}

else

{

print f ("Checked CRC is NOT o k (0x%04X)\ n", current_ crc_valu e);

}

LRI64

36/38

APPENDIX C. APPLICATION FAMILY ID ENTIFIER (AFI) CODING

AFI (Application Family Identifier) represents the

type of application targeted by the VCD and is

used to extract from al l the LRI64 present only the

LRI64 meeting the required application criteria.

It is programmed by the LRI64 issuer (the pur-

chaser of the LRI64). Once locked, it can not be

modified.

The most significant nibble of AFI i s used to code

one specific or all application families, as defined

in Table 20.

The least significant nibble of AFI is used to code

one specific or all application sub-families. Sub-

family codes different from 0 are proprietary.

Tabl e 20. AFI Coding

Note: x and y eac h repres ent any single-di gi t hexadecimal va l ue between 1 and F

AFI

Most

Significant

Nibble

AFI

Least

Significant

Nibble

Meaning

LRI64 Devices respond from E xamples / Note

0 0 All families and sub-families No applicative preselection

x 0 All sub-families of family X Wide applicative preselection

x y Only the Yth sub-family of family X

0 y Proprietary sub-family Y only

1 0, y Transport Mass transit, Bus, Airline,...

2 0, y Financial IEP, Banking, Retail,...

3 0, y Identification Access Control,...

4 0, y Telecommunication Public Telephony, GSM,...

5 0, y Medical

6 0, y Multimedia Internet services....

7 0, y Gaming

8 0, y Data Storage Portable Files...

9 0, y Item Management

A 0, y Express Parcels

B 0, y Postal Services

C 0, y Airline Bags

D0, yRFU

E0, yRFU

F0, yRFU

37/38

LRI64

REVISION HISTORY

Table 21. Document Revi sion History

Date Rev. Description of Revision

27-Aug-2003 1.0 First Issue

16-Jul-2004 2.0 First public release of full datasheet

22-Sep-2004 3.0 Values changed for tW, t1 and t2

LRI64

38/38

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