36 V, 19 MHz, Low Noise, Low Bias Current,
JFET Operational Amplifier
ADA4627-1
Rev. B
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved.
FEATURES
Low offset voltage: 200 μV maximum
Offset drift: 1 μV/°C typical
Very low input bias current: 5 pA maximum
Extended temperature range: −40°C to +125°C
±5 V to ±15 V dual supply
Guaranteed GBW: 16 MHz
Voltage noise: 6.1 nV/√Hz at 1 kHz
High slew rate: 60 V/μs
High gain: 120 dB typical
High CMRR: 116 dB typical
High PSRR: 112 dB typical
Low supply current: 7.5 mA maximum
APPLICATIONS
High impedance sensors
Photodiode amplifier
Precision instrumentation
Phase-locked loop filters
High end, professional audio
DAC output amplifier
ATE
Medical
PIN CONFIGURATIONS
NULL
1
–IN
2
+IN
3
V–
4
NC
8
V+
7
OUT
6
NULL
5
NC = NO CONNECT
ADA4627-1
TOP VIEW
(Not to Scale)
07559-001
Figure 1. 8-Lead SOIC_N (R-8)
PIN 1
INDICATOR
NOTES
1. NC = NO CONNE CT.
2. IT IS RE COMME NDED
THAT T HE EXPOSED PAD BE
CONNECTED TO V–.
1NC 2
–IN
3+IN 4V–
7V+
8NC
6OUT
5NC
TOP VIEW
(No t toScale)
ADA4627-1
07559-002
Figure 2. 8-Lead LFCSP_VD (CP-8-2)
GENERAL DESCRIPTION
The ADA4627-1 is a wide bandwidth precision amplifier
featuring low noise, very low offset, drift, and bias current.
Operation is specified from ±5 V to ±15 V dual supply.
The ADA4627-1 provides benefits previously found in few
amplifiers. This amplifier combines the best specifications
of precision dc and high speed ac op amps.
With a typical offset voltage of only 70 μV, drift of less than
1 μV/°C, and noise of only 0.86 μV p-p (0.1 Hz to 10 Hz), the
ADA4627-1 is suited for applications in which error sources
cannot be tolerated.
The ADA4627-1 is specified for both the industrial temperature
range of −25°C to +85°C and the extended industrial temper-
ature range of −40°C to +125°C. It is available in tiny 8-lead
LFCSP and 8-lead SOIC packages.
The ADA4627-1 is a member of a growing series of high speed,
precision op amps offered by Analog Devices, Inc. (see Table 1).
Table 1. High Speed Precision Op Amps
Supply
5 V Low
Cost 5 V
26 V Low
Power
30 V Low
Cost 30 V
Single AD8615 AD8651 AD8610 AD8510 ADA4627-1
Dual AD8616 AD8652 AD8620 AD8512
Quad AD8618 AD8513
ADA4627-1
Rev. B | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics—30 V Operation ............................. 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 12
Input Voltage Range ................................................................... 12
Input Offset Voltage Adjust Range........................................... 12
Input Bias Current ...................................................................... 12
Noise Considerations ................................................................. 12
THD + N Measurements ........................................................... 12
Printed Circuit Board Layout, Bias Current, and Bypassing 13
Output Phase Reversal ............................................................... 13
Driving Capacitive Loads .......................................................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 15
REVISION HISTORY
10/09—Rev. A to Rev. B
Changes to Figure 2 .......................................................................... 1
9/09—Rev. 0 to Rev. A
Changes to General Description Section ...................................... 1
Changes to Table 2 ............................................................................ 3
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 15
7/09—Revision 0: Initial Version
ADA4627-1
Rev. B | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—30 V OPERATION
VSY = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
B Grade A Grade
Parameter Symbol Test Conditions/Comments Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage1 V
OS 70 200 120 300 μV
−40°C ≤ TA ≤ +85°C 350 410 μV
−40°C ≤ TA ≤ +125°C 400 660 μV
Offset Voltage Drift,
Average
∆VOS/∆T −40°C ≤ TA ≤ +125°C 1 2 1 3 μV/°C
Power Supply Rejection
Ratio
PSRR VSY = ±4.5 V to ±18 V 106 112 103 108 dB
−40°C ≤ TA ≤ +125°C 101 99 dB
Input Bias Current2 I
B 1 5 1 5 pA
−40°C ≤ TA ≤ +85°C 0.5 0.5 nA
−40°C ≤ TA ≤ +125°C 2 2 nA
Input Offset Current IOS 0.5 5 0.5 5 pA
−40°C ≤ TA ≤ +85°C 0.5 0.5 nA
−40°C ≤ TA ≤ +125°C 2 2 nA
NOISE PERFORMANCE
Voltage Noise Density en f = 10 Hz 16.5 40 16.5 40 nV/√Hz
f = 100 Hz 7.9 20 7.9 20 nV/√Hz
f = 1 kHz 6.1 8 6.1 8 nV/√Hz
f = 10 kHz 4.8 6 4.8 6 nV/√Hz
Voltage Noise en p-p 0.1 Hz to 10 Hz 0.69 1.6 0.69 1.6 μV p-p
Current Noise Density in f = 100 Hz 1.6 2.5 fA/√Hz
Current Noise in p-p 0.1 Hz to 10 Hz 30 48 fA p-p
Input Resistance RIN 10 10 TΩ
Input Capacitance,
Differential Mode
CINDM 8 8 pF
Input Capacitance,
Common Mode
CINCM 7 7 pF
Input Voltage Range −11 +11 −11 +11 V
−40°C ≤ TA ≤ +125°C −10.5 +10.5 −10.5 +10.5 V
Common-Mode
Rejection Ratio
CMRR −40°C ≤ TA ≤ +125°C,
VCM = −11 V to +11 V
106 116 100 110 dB
V
CM = −10.5 V to +10.5 V 98 97 dB
Large Signal Voltage Gain AVO R
L = 1 kΩ, VO = −10 V to +10 V 112 120 106 120 dB
−40 ≤ TA ≤ +85°C 110 104 dB
−40 ≤ TA ≤ +125°C 102 100 dB
DYNAMIC PERFORMANCE
Slew Rate SR 10 V step, RL = 1 kΩ,
CL = 100 pF, AV = +1
40 56/783 40 56/783 V/μs
SR 10 V step, RL = 1 kΩ, CL = 100 pF,
Rs = Rf = 1 kΩ, AV = −1
40 82/843 40 82/843 V/μs
Settling Time to 0.01% tS V
IN = 10 V step, CL = 35 pF,
RL = 1 kΩ, AV = −1
550 550 ns
Settling Time to 0.1% tS V
IN = 10 V step, CL = 35 pF,
RL = 1 kΩ, AV = −1
450 450 ns
Gain Bandwidth Product GBP RL = 1 kΩ, CL = 20 pF, AV = 1 164 19 164 19 MHz
Phase Margin ΦM R
L = 1 kΩ, CL = 20 pF, AV = 1 72 72 Degrees
Total Harmonic
Distortion + Noise
THD + N f = 1 kHz, AV = 1 0.000045 0.000045 %
ADA4627-1
Rev. B | Page 4 of 16
B Grade A Grade
Parameter Symbol Test Conditions/Comments Min Typ Max Min Typ Max Unit
POWER SUPPLY
Supply Current per
Amplifier
ISY I
O = 0 mA ±7.0 ±7.5 ±7.0 ±7.5 mA
−40°C ≤ TA ≤ +125°C ±7.8 ±7.8 mA
OUTPUT CHARACTERISTICS
Output Voltage High VOH R
L = 1 kΩ to VCM 12.0 12.3 12.0 12.3 V
−40°C ≤ TA ≤ +85°C 11.8 11.8 V
−40°C ≤ TA ≤ +125°C 11.7 11.7 V
Output Voltage Low VOL R
L = 1 kΩ to VCM −12.7 −12.3 −12.7 −12.3 V
−40°C ≤ TA ≤ +85°C −12.1 −12.1 V
−40°C ≤ TA ≤ +125°C −12.0 −12.0 V
Output Current IOUT V
O = ±10 V ±45 ±45 mA
Short-Circuit Current ISC T
A = 25°C +70/−55 +70/−55 mA
Closed-Loop Output
Impedance
ZOUT f = 1 MHz, AV = −100 41 41 Ω
1 VOS is measured fully warmed-up.
2 Tested/extrapolated from 125°C.
3 Rising/falling.
4 Not tested. Guaranteed by simulation and characterization.
ADA4627-1
Rev. B | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 36 V
Input Voltage Range1(V−) − 0.3 V to (V+) + 0.3 V
Input Current1 ±10 mA
Differential Input Voltage2 ±VSY
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
ESD Human Body Model 2.5 kV
1 Input pin has clamp diodes to the power supply pins. Input current should
be limited to 10 mA or less whenever input signals exceed the power supply
rail by 0.3 V.
2 Differential input voltage is limited to ±30 V or the supply voltage, whichever
is less.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. This
was measured using a standard two-layer board. For the LFCSP
package, the exposed pad should be soldered to a copper plane.
Table 4. Thermal Resistance
Package Type θJA θ
JC Unit
8-Lead SOIC_N (R-8) 155 45 °C/W
8-Lead LFCSP (CP-8-2) 77 14 °C/W
ESD CAUTION
ADA4627-1
Rev. B | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
1
10
100
0.01 0.1 1 10
FREQUENCY (kHz )
VOLTAGE NOISE DENSIT Y (nV/
√
Hz)
ADA4627-1
TA = 25°C
VSY = ±15V
07559-003
Figure 3. Voltage Noise Density
60
80
100
120
140
–50 –25 0 25 50 75 100 125
TEM P E RATURE (°C)
OPEN-LOOP GAIN (dB)
R
L
= 1kΩ
R
L
= 600Ω
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
V
O
= ±11V
07559-004
Figure 4. Open-Loop Gain vs. Temperature
120
100
80
60
40
20
0100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
CMRR (d B)
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
07559-010
Figure 5. CMRR vs. Frequency
–40
–20
0
20
40
60
80
100
120
1k 10k 100k 1M 10M 100M
FREQUENCY ( Hz )
GAIN (dB)
–90
–45
0
45
90
135
180
225
270
PHASE (Degrees)
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
07559-006
19.1MHz
78°
Figure 6. Open-Loop Gain and Phase vs. Frequency
0.01
0.1
1
10
100
100 1k 10k 100k 1M 10M 100M
FREQUENCY ( Hz)
Z
OUT
(Ω)
A
V
= –100
A
V
= –10
A
V
= –1
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
0
7559-007
Figure 7. Closed-Loop ZOUT vs. Frequency
150
100
50
0
–50
–100
–150
–15 –10 –5 0 5 10 15
V
OS
(µV)
V
CM
(V)
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
07559-069
Figure 8. VOS vs. Common-Mode Voltage
ADA4627-1
Rev. B | Page 7 of 16
TA = 25°C, unless otherwise noted.
0
20
40
60
80
100
120
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
PSRR (dB)
PSRR+
PSRR–
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
07559-009
Figure 9. PSRR vs. Frequency
0
1
2
3
4
5
6
7
8
0 4 8 12162024283236
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
+125ºC
+85ºC
+25ºC
–40ºC
07559-011
ADA4627-1
T
A
= 25°C
Figure 10. Supply Current vs. Supply Voltage and Temperature
100
110
120
–40 –20 0 20 40 60 80 100 120
PSRR (dB)
TEMPERATURE (°C)
ADA4627-1
R
L
= 1kΩ
±4.5V < V
SY
< ±15V
07559-068
Figure 11. PSRR vs. Temperature
60
70
80
90
100
110
120
–50 –25 0 25 50 75 100 125
TE M P ERATURE (°C)
COMMON- MODE REJECTIO N RATIO (dB)
ADA4627-1
V
SY
= ±15V
V
CM
= ±11.5V
07559-012
Figure 12. CMRR vs. Temperature
0.001
1
10
20
0.01 0.1 1 100
10
I
LOAD
(mA)
V
OL
–
V
SS
(V)
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
07559-058
Figure 13. VOUT Sinking vs. ILOAD Current
0.001
1
10
20
0.01 0.1 1 100
10
I
LOAD
(mA)
V
DD
–
V
OH
(V)
ADA4627-1
T
A
= 25° C
V
SY
= ±15V
07559-057
Figure 14. VOUT Sourcing vs. ILOAD Current
ADA4627-1
Rev. B | Page 8 of 16
TA = 25°C, unless otherwise noted.
0
1
2
3
4
5
6
7
8
0 4 8 12162024283236
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
ADA4627-1
T
A
= 25°C
SOIC PACKAGE
07559-015
Figure 15. Supply Current vs. Supply Voltage
0.00001
0.0001
0.001
0.01
0.1
0.001 0.01 0.1 1
THD + N ( %)
AMPLITUDE (V rms)
ADA4627-1
TA = 25°C
VSY = ±15V
VIN = 1kHz
RL = 600Ω
80kHz F ILTER
07559-072
Figure 16. THD + N vs. VIN
–20
–10
0
10
20
30
40
50
60
10 100 1k 10k 100k 1M 10M 100M
GAIN (dB)
FREQUENCY (kHz)
A
V
=+100
A
V
=+10
A
V
=+1
07559-070
ADA4627-1
T
A
= 25°C
V
SY
= ±15
Figure 17. Closed-Loop Gain vs. Frequency
0.01 0.1 1 10
THD + N (%)
FREQ UE NCY (kHz )
0.01
0.001
0.0001
0.00001
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
V
IN
= 810mV
R
L
= 600Ω
80kHz F I L TER
07559-071
Figure 18. THD + N vs. Frequency
0.1
1
10
100
1,000
10,000
10 30 50 70 90 110 130
I
B
(pA)
TEM P ERATURE (°C)
07559-078
y = 0. 2895
0.0647x
R
2
= 0. 999 1
EXTRAPOLATED
MEASURED
ADA4627-1
V
SY
= ±15
Figure 19. Input Bias Current vs. Temperature
I
B
(pA)
V
CM
(V)
+25ºC
+85°C
I
B
+
I
B
+
I
B
–
I
B
–
–15 –10 –5 0 5 10 15
ADA4627-1
V
SY
= ±15V
100
75
50
25
0
–25
–50
–75
–100
07559-073
Figure 20. Input Bias Current vs. VCM and Temperature
ADA4627-1
Rev. B | Page 9 of 16
TA = 25°C, unless otherwise noted.
100
0
200
300
400
500
600
700
800
900
1000
1100
1200
–15 –10 –5 0 5 10 15
I
B
(
p
A
)
V
CM
(V)
I
B
–
I
B
+
ADA4627-1
T
A
= 125° C
V
SY
= ±15V
07559-074
Figure 21. Input Bias Current vs. VCM at 125°C
80
60
40
20
0
–20
–40
–60
–80
0 60 120 180 240 300
V
OS
(µV)
TIME (Seconds)
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
07559-075
Figure 22. Input Offset Voltage vs. Time
60
50
40
30
20
10
01 10 100 1000 10,000
OVERSHOOT (%)
LOAD CAPACITANCE (pF)
OS–
T
A
= 25°C
V
SY
= ±15V
A
V
= +1
V
IN
= 100mV p-p
OS+
07559-023
Figure 23. Small Signal Overshoot vs. Load Capacitance
07559-061
OUT PUT VO LT AG E (5V/ DIV)
TIME (1µs/DIV)
1
ADA4627-1
T
A
= 25°C
A
V
= –1
V
IN
= 20V p-p
R
F
= R
IN
= 2kΩ
C
F
= 10pF
R
L
= 1kΩ
C
L
= 1nF
Figure 24. Large Signal Transient Response
07559-062
OUTPUT VO LTAG E (5V/DIV)
TIME ( 2 00ns/ DIV)
1
ADA4627-1
TA = 25° C
AV = +1
VIN = 20V p-p
RF = 0Ω
Figure 25. Large Signal Transient Response
07559-059
CH1 5.00V
OUT PUT VOL T AG E (5 V/ DI V )
TIME (200ns/DIV)
1
ADA4627-1
TA = 25°C
AV = –1
VIN = 20V p-p
RF = RIN = 2kΩ
Figure 26. Large Signal Transient Response
ADA4627-1
Rev. B | Page 10 of 16
TA = 25°C, unless otherwise noted.
07559-063
OUTPUT VOLTAGE (5V/DIV)
TIME (1µs/DIV)
1
ADA4627-1
T
A
= 25°C
A
V
= +1
V
IN
= 20V p-p
R
F
= 0Ω
R
L
= 1kΩ
C
L
= 1nF
Figure 27. Large Signal Transient Response
07559-060
OUTPUT VO LTAG E (5V/DIV)
TIME ( 200ns/ DIV)
1
ADA4627-1
TA = 25°C
AV = –1
VIN = 20V p- p
RF = RIN = 2kΩ
CF = 10pF
RL = 1kΩ
CL= 100p F
Figure 28. Large Signal Transient Response
07559-064
OUT P UT VO LT AGE (50mV /DIV)
TIME ( 200ns/ DIV)
1
ADA4627-1
TA = 25°C
AV = +1
VIN = 200mV p-p
RF = 0Ω
Figure 29. Small Signal Transient Response
07559-066
OUTP UT VOLT AG E (50mV/DI V)
TIME ( 200ns/ DIV)
1
ADA4627-1
TA = 25°C
AV = –1
VIN = 200mV p- p
RF = RIN = 2kΩ
CF = 5pF
Figure 30. Small Signal Transient Response
07559-065
OUT P UT VOLTAGE (50mV/DIV)
TIME ( 200ns/ DIV)
1
ADA4627-1
TA = 25°C
AV = +1
VIN = 200mV p - p
RF = 0Ω
RL = 1kΩ
CL= 1nF
Figure 31. Small Signal Transient Response
07559-067
OUTPUT VO L TAGE (50mV/DI V )
TIME ( 200ns/ DIV)
1
ADA4627-1
TA = 25°C
AV = –1
VIN = 200mV p- p
RF = RIN = 2kΩ
CF = 5pF
RL = 1kΩ
CL= 100pF
Figure 32. Small Signal Transient Response
ADA4627-1
Rev. B | Page 11 of 16
TA = 25°C, unless otherwise noted.
–20
–15
–10
–5
0
5
10
15
20
0 0.51.01.52.02.53.03.54.0
TIME (ms)
AMPL ITUDE ( V )
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
07559-033
V
IN
V
OUT
Figure 33. No Phase Reversal
07559-076
INPUT VOLTAGE (5V/DIV)
OUTPUT VOLTAGE (1mV/DIV)
TIME ( 200ns/ DIV)
2
1
VIN
VOUT
ADA4627-1
TA = 25°C
VSY = ±15
Figure 34. Negative Settling Time to 0.01%
07559-077
INPUT VOLTAGE (5V/DIV)
OUTPUT VOLTAGE (1mV/DIV)
TIME ( 200ns/ DIV)
2
1
VIN
VOUT
ADA4627-1
TA = 25°C
VSY = ±15
Figure 35. Positive Settling Time to 0.01%
OUTPUT VOLTAGE (200mV/DIV)
TIME ( 1s/DI V )
1
ADA4627-1
T
A
= 25°C
V
SY
= ±15V
DUT GAIN = 100
4TH ORDER BAND PASS FI X TURE G AIN = 10k
TOTAL GAIN = 1M
0
7559-040
Figure 36. 0.1 Hz to 10 Hz Noise
ADA4627-1
Rev. B | Page 12 of 16
THEORY OF OPERATION
The ADA4627-1 is a high speed, unity gain stable amplifier with
excellent dc characteristics. The typical offset voltage of 70 μV
allows the amplifier to be easily configured for high gains
without the risk of excessive output voltage errors. The small
temperature drift of 2 μV/°C ensures a minimum offset voltage
error over the entire temperature range of −40°C to +125°C,
making the amplifier ideal for a variety of sensitive measure-
ment applications in harsh operating environments.
INPUT VOLTAGE RANGE
The ADA4627-1 is not a rail-to-rail input amplifier, thus, care
is required to ensure that both inputs do not exceed the input
voltage range. Under normal negative feedback operating
conditions, the amplifier corrects its output to ensure that
the two inputs are at the same voltage. However, if either input
exceeds the input voltage range, the loop opens and large
currents begin to flow through the ESD protection diodes in
the amplifier.
These diodes are connected between the inputs and each supply
rail to protect the input transistors against an electrostatic discharge
event, and they are normally reverse-biased. However, if the
input voltage exceeds the supply voltage, these ESD diodes can
become forward-biased. Without current limiting, excessive
amounts of current may flow through these diodes, causing
permanent damage to the device. If inputs are subject to over-
voltage, insert appropriate series resistors to limit the diode
current to less than 5 mA.
INPUT OFFSET VOLTAGE ADJUST RANGE
The ADA4627-1 SOIC package has offset adjust pins for
compatibility with some existing designs. The recommended
offset nulling circuit is shown in Figure 37.
07559-051
2
3
6
7
4
ADA4627-1
–V
S
+
V
S
100kΩ
1
5
Figure 37. Standard Offset Null Circuit
With a 100 kΩ potentiometer, the adjustment range is
more than ±11 mV. However, the VOS temperature drift
increases by several μV/°C for every millivolt of offset adjust.
The ADA4627-1 has matching thin film resistors that are laser
trimmed at two temperatures to minimize both offset voltage
and offset voltage drift. The offset voltage at room temperature
is less than 0.5 mV, and the offset voltage drift is only a few
μV/°C or less, therefore, it is not recommended to use the offset
adjust pins, especially for offset adjust of a complete signal
chain. Signal chain offset can be addressed with an auto-
zero amplifier used to form a composite amplifier, or if the
ADA4627-1 is at an inverting amplifier stage, it can be modified
easily to create a summing amplifier where a potentiometer can
be added (see Figure 38). The LFCSP package does not have
offset adjust pins.
07559-052
2
3
6
ADA4627-1 +
V
OUT
–
V
IN
+
–
R
F
R
IN
200Ω
100kΩ
499kΩ499kΩ
0.1µF –V
S
+V
S
Figure 38. Alternate Offset Null Circuit for Inverting Stage
INPUT BIAS CURRENT
Because the ADA4627-1 has a JFET input stage, the input bias
current, due to the reverse-biased junction, has a leakage
current that approximately doubles every 10°C. The power
dissipation of the part, combined with the thermal resistance of
the package, results in the junction temperature increasing 20 to
30 degrees Centigrade above ambient. This parameter is tested
with high speed ATE equipment, which does not result in the
die temperature reaching equilibrium. This is correlated with
bench measurements to match the guaranteed maximum at
room temperature in Table 2.
The input current can be reduced by keeping the temperature as
low as possible and using a light load on the output.
NOISE CONSIDERATIONS
The JFET input stage offers very low input voltage noise and
input current noise. The thermal noise of a 1 kΩ resistor at
room temperature is 4 nV/√Hz, thus low values of resistance
should be used for dc-coupled inverting and noninverting
amplifier configurations. In the case of transimpedance
amplifiers (TIAs), current noise is more important.
The ADA4627-1 is an excellent choice for both of these appli-
cations. Analog Devices offers a wide variety of low voltage
noise and low current noise op amps in a variety of processes
optimized for different supply voltage ranges. Refer to
Application Note AN-940 for a complete discussion of noise,
calculations, and selection tables for more than three dozen
low noise, op amp families.
THD + N MEASUREMENTS
Total harmonic distortion plus noise (THD + N) is usually
measured with an audio analyzer from Audio Precision, Inc.
The analyzer consists of a low distortion oscillator that is swept
from the starting frequency to the ending frequency. The
ADA4627-1
Rev. B | Page 13 of 16
oscillator is connected to the circuit under test, and the output
of the circuit goes back to the analyzer.
The analyzer has a tunable notch filter in lock step with the
swept oscillator. This removes the fundamental frequency,
but allows all of the harmonics and wideband noise to be
measured with an integrating voltmeter. However, there is
a switchable low-pass filter in series with the notch filter.
If the sine wave is at 100 Hz, then the tenth harmonic is still
at 1 kHz, thus having a low pass at 80 kHz is not a problem.
When the oscillator reaches 20 kHz, the fourth harmonic
(80 kHz) is partially attenuated, resulting in a lower reading
from the voltmeter. When evaluating THD + N curves from
any manufacturer, careful attention should be paid to the test
conditions. The difference between an 80 kHz low-pass filter
and a 500 kHz filter is shown in Figure 39.
0.01 0.1 1 10 100
THD + N (%)
FREQ UE NCY (kHz )
80kHz F ILTER
500kHz F IL TER
0.01
0.001
0.0001
0.00001
ADA4627-1
TA = 25°C
VSY = ± 15V
VIN = 810mV
RL = 600Ω
07559-017
Figure 39. THD + N vs. Frequency
PRINTED CIRCUIT BOARD LAYOUT, BIAS
CURRENT, AND BYPASSING
To take advantage of the very low input bias current of the
ADA4627-1 at room temperature, leakage paths must be
considered. A printed circuit board, with dust and humidity,
can have 100 MΩ of resistance over a few tenths of an inch.
A 1 mV differential between the two points results in 10 pA
of leakage current, more than the guaranteed maximum.
The op amp inputs should be guarded by surrounding the nets
with a metal trace maintained at the predicted voltage. In the
case of an inverting configuration or transimpedance amplifier,
(see Figure 40), the inverting and noninverting nodes can be
surrounded by traces held at a quiet analog ground.
07559-053
2
3
6
8
ADA4627-1
+
V
OUT
–
I
N
C
F
R
F
GUARD
Figure 40. Inverting Amplifier with Guard
For a noninverting configuration, the trace can be driven from
the feedback divider, but the resistors should be chosen to offer
a low impedance drive to the trace (see Figure 41).
0
7559-054
3
2
6
8
ADA4627-1
+
V
OUT
–
V
S
+
–
GUARD
R
F
R
I
Figure 41. Noninverting Amplifier with Guard
The board layout should be compact with traces as short as
possible. For second-order board considerations, such as
triboelectric effects and piezoelectric effects, as well as a table
of insulating material properties, see the AD549 data sheet.
In some cases, shielding from air currents may be helpful.
A general rule of thumb, for op amps with gain bandwidth
products higher than 1 MHz, bypass capacitors should be very
close to the part, within 3 millimeters. Each supply should be
bypassed with a 0.01 μF ceramic capacitor in parallel with a
1 μF bulk decoupling capacitor. The ceramic capacitors should
be closer to the op amp. Sockets, which add inductance and
capacitance, should not be used.
OUTPUT PHASE REVERSAL
Output phase reversal occurs in some amplifiers when the input
common-mode voltage range is exceeded. As common-mode
voltage is moved outside the common-mode range, the outputs
of these amplifiers can suddenly jump in the opposite direction
to the supply rail. This is the result of the differential input pair
shutting down, causing a radical shifting of internal voltages
that results in the erratic output behavior.
The ADA4627-1 amplifier has been carefully designed to
prevent any output phase reversal if both inputs are maintained
within the specified input voltage range. If one or both inputs
exceed the input voltage range but remain within the supply
rails, an internal loop opens and the output varies. Therefore,
the inputs should always be a minimum of 3 V away from either
supply rail.
DRIVING CAPACITIVE LOADS
Adding capacitance to the output of any op amp results in addi-
tional phase shift, which reduces stability and leads to overshoot
or oscillation. The ADA4627-1 has a high phase margin and low
output impedance, so it can drive reasonable values of capacitance.
This is a common situation when an amplifier is used to drive the
input of switched capacitor ADCs. For other considerations and
various circuit solutions, see the Analog Dialogue article titled
Ask the Applications Engineer-25, Op Amps Driving Capacitive
Loads, available at www.analog.com.
ADA4627-1
Rev. B | Page 14 of 16
OUTLINE DIMENSIONS
0
90308-B
1
EXPOSED
PAD
(BOTTOM VIEW)
0.50
BSC
PIN 1
INDICATOR
0.50
0.40
0.30
TOP
VIEW
12° MAX 0.70 M AX
0.65TYP
0.90 MAX
0.85 NOM 0.05 M A X
0.01 NOM
0.20 REF
1.89
1.74
1.59
4
1.60
1.45
1.30
3.25
3.00 SQ
2.75
2.95
2.75 SQ
2.55
58
PIN 1
INDICATOR
SEATING
PLANE 0.30
0.23
0.18
0.60 M A X
0.60 M A X
FOR PRO PER CONNECTI ON OF
THE EX POSE D PAD, REFER TO
THE PIN CONFI GURATION AND
FUNCT ION DESCRIP TIONS
SECTION OF THIS DATA SHEET.
Figure 42. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-8-2)
Dimensions shown in millimeters
CONT ROLLING DIM E NS IONS ARE IN M ILLI M E TERS; INCH DIM E NSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILL IMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPRO P RIATE FO R USE I N DESIGN.
COMP LIANT TO JE DEC STANDARDS MS-012-AA
012407-A
0.25 ( 0.0098)
0.17 ( 0.0067)
1.27 ( 0.0500)
0.40 ( 0.0157)
0.50 ( 0 .0196)
0.25 ( 0 .0099) 45°
8°
0°
1.75 ( 0 .0688)
1.35 ( 0 .0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 ( 0.1574)
3.80 ( 0.1497)
1.27 (0.0500)
BSC
6.20 ( 0.2441)
5.80 ( 0.2284)
0.51 ( 0.0201)
0.31 ( 0.0122)
COPLANARITY
0.10
Figure 43. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ADA4627-1
Rev. B | Page 15 of 16
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADA4627-1ACPZ-R21
−40°C to +125°C 8-Lead LFCSP_VD CP-8-2 A29
ADA4627-1ACPZ-RL1
−40°C to +125°C 8-Lead LFCSP_VD CP-8-2 A29
ADA4627-1ACPZ-R71
−40°C to +125°C 8-Lead LFCSP_VD CP-8-2 A29
ADA4627-1ARZ1
−40°C to +125°C 8-Lead SOIC_N R-8
ADA4627-1ARZ-RL1
−40°C to +125°C 8-Lead SOIC_N R-8
ADA4627-1ARZ-R71
−40°C to +125°C 8-Lead SOIC_N R-8
ADA4627-1BRZ1
−40°C to +125°C 8-Lead SOIC_N R-8
ADA4627-1BRZ-R71
−40°C to +125°C 8-Lead SOIC_N R-8
ADA4627-1BRZ-RL1
−40°C to +125°C 8-Lead SOIC_N R-8
1 Z = RoHS Compliant Part.
ADA4627-1
Rev. B | Page 16 of 16
NOTES
©2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07559-0-10/09(B)
