MIL-PRF-19500/485N
10 June 2013
SUPERSEDING
MIL-PRF-19500/485M
1 June 2010
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, TRANSISTOR, PNP, SILICON, LOW-POWER
TYPES: 2N5415, 2N5415S, 2N5415UA, 2N5415U4, 2N5416, 2N5416S, 2N5416UA,
AND 2N5416U4, JAN, JANTX, JANTXV, JANS, JANSM, JANSD, JANSP, JANSL,
JANSR, JANSF, JANSG, JANSH, JANHCB, JANHCD, JANKCB, JANKCD, JANKCBM,
JANKCBD, JANKCBP, JANKCBL, JANKCBR, JANKCBF, JANKCBG, AND JANKCBH
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for PNP, silicon, switching transistors. Four
levels of product assurance are provided for each device type as specified in MIL-PRF-19500. Two levels of product
assurance are provided for each unencapsulated device type. Provisions for radiation hardness assurance (RHA) to
eight radiation levels is provided for JANTXV, JANS, JANHC, and JANKC product assurance levels. RHA level
designators “M”, “D”, “P“, “L”, “R”, “F”, “G”, and “H” are appended to the device prefix to identify devices, which have
passed RHA requirements.
1.2 Physical dimensions. See figure 1 (similar to TO-5), figures 2 and 3 for JANHC and JANKC (die) dimensions,
figure 4 for UA package, and figure 5 for U4.
1.3 Maximum ratings. Unless otherw ise spe cif ied, T A = +25°C.
Types
PT (1)
TA = +25°C
PT (2)
TC = +25°C
PT (3)
TSP = +25°C
RθJA
RθJC
RθJSP
VCBO
VCEO
VEBO
IC
TSTG
and TJ
2N5415, S
2N5415UA
2N5415U4
2N5416, S
2N5416UA
W
0.75
0.75
1
0.75
0.75
W
10
15
10
W
2
2
°C/W
234
234
145
234
234
°C/W
17.5
12
17.5
°C/W
N/A
80
N/A
N/A
80
V dc
200
200
200
350
350
V dc
200
200
200
300
300
V dc
6.0
6.0
6.0
6.0
6.0
A dc
1.0
1.0
1.0
1.0
1.0
°C
-65 to
+200
(1) Derate linearly 4.29 mW/°C for TA > +25°C. 6.90 mW/ °C for U4.
(2) Derate linearly 57.2 mW/°C for TC > +25°C. 86 mW/ °C for U4.
(3) Derate linearly 12.5 mW/°C for TSP > +25°C.
AMSC N/A FSC 5961
Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil . Since
contact infor mation can change, you may want to verify the currency of this address information using the
ASSIST Online database at https://assist.dla.mil .
The documentation and process conversion measures
necessary to comply with this document shall be
completed by 10 September 2013.
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