LT1204 4-Input Video Multiplexer with 75MHz Current Feedback Amplifier DESCRIPTIO U FEATURES 0.1dB Gain Flatness > 30MHz Channel Separation at 10MHz: 90dB 40mV Switching Transient, Input Referred - 3dB Bandwidth, AV = 2, RL = 150: 75MHz Channel-to-Channel Switching Time: 120ns Easy to Expand for More Inputs Large Input Range: 6V 0.04% Differential Gain, RL = 150 0.06 Differential Phase, RL = 150 High Slew Rate: 1000V/s Output Swing, RL = 400: 13V Wide Supply Range: 5V to 15V The LT (R)1204 is a 4-input video multiplexer designed to drive 75 cables and easily expand into larger routing systems. Wide bandwidth, high slew rate, and low differential gain and phase make the LT1204 ideal for broadcast quality signal routing. Channel separation and disable isolation are greater than 90dB up to 10MHz. The channelto-channel output switching transient is only 40mVP-P, with a 50ns duration, making the transition imperceptible on high quality monitors. A unique feature of the LT1204 is its ability to expand into larger routing matrices. This is accomplished by a patent pending circuit that bootstraps the feedback resistors in the disable condition, raising the true output impedance of the circuit. The effect of this feature is to eliminate cable misterminations in large systems. UO APPLICATI S Broadcast Quality Video Multiplexing Large Matrix Routing Medical Imaging Large Amplitude Signal Multiplexing Programmable Gain Amplifiers The large input and output signal levels supported by the LT1204 when operated on 15V supplies make it ideal for general purpose analog signal selection and multiplexing. A shutdown feature reduces the supply current to 1.5mA. , LTC and LT are registered trademarks of Linear Technology Corporation. UO TYPICAL APPLICATI VIN0 V+ +1 All Hostile Crosstalk 15V 2 3 CFA GND VIN1 - +1 75 VO 15 V- 14 4 -15V 5 FB 13 GND VIN2 S/D 12 +1 ENABLE 11 75 6 7 VIN3 GND VIN3 LOGIC A1 10 RF 1k RG 1k VS = 15V VIN 0 = GND VIN 1,2,3 = 0dBm RL = 100 -40 -60 -80 -100 A0 9 +1 75 -120 8 REF 1 LT1204 1204 TA01 -15V 6.8k -20 VOUT 75 VIN2 Surface Mount PCB Measurements + 75 VIN1 16 ALL HOSTILE CROSSTALK (dB) 1 VIN0 10 FREQUENCY (MHz) 100 1204 TA02 8.2k 1 LT1204 W W W AXI U U ABSOLUTE RATI GS Supply Voltage ..................................................... 18V - Input Current (Pin 13) .................................... 15mA +Input and Control/Logic Current (Note 1) ........ 50mA Output Short-Circuit Duration (Note 2) ......... Continuous Specified Temperature Range (Note 3) ....... 0C to 70C Operating Temperature Range ............... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Junction Temperature (Note 4) ............................ 150C Lead Temperature (Soldering, 10 sec).................. 300C W U U PACKAGE/ORDER I FOR ATIO TOP VIEW 15 VO VIN1 3 14 V - GND 4 13 FB 12 SHDN VIN2 5 12 SHDN 11 ENABLE GND 6 11 ENABLE 10 A1 VIN3 7 10 A1 A0 REF 8 9 16 V GND 2 15 VO VIN1 3 14 V - GND 4 13 FB VIN2 5 GND 6 REF + 16 V 1 7 ORDER PART NUMBER TOP VIEW VIN0 1 VIN0 VIN3 ORDER PART NUMBER GND 2 + 8 9 LT1204CN* A0 SW PACKAGE 16-LEAD PLASTIC SO N PACKAGE 16-LEAD PDIP TJMAX = 150C, JA = 70C/W LT1204CSW* *See Note 3 *See Note 3 TJMAX = 150C, JA = 90C/W Consult factory for Industrial and Military grade parts. ELECTRICAL CHARACTERISTICS 0C TA 70C, 5V VS 15V, VCM = 0V, Pin 8 grounded and pulse tested unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage Any Positive Input, TA = 25C MIN TYP MAX 5 14 16 mV mV 5 mV Between Any Positive Input, VS = 15V 0.5 Input Offset Voltage Drift Any Positive Input 40 Positive Input Bias Current Any Positive Input, TA = 25C Offset Matching IIN+ Negative Input Bias Current TA = 25C 8 10 A A 20 100 150 A A en Input Noise Voltage f = 1kHz, RF = 1k, RG = 10, RS = 0 + in Noninverting Input Noise Current Density - in Inverting Input Noise Current Density CIN V/C 3 IIN- UNITS 7 nV/Hz f = 1kHz 1.5 pA/Hz f = 1kHz 40 pA/Hz Input Capacitance Input Selected Input Deselected 3.0 3.5 pF pF COUT Output Capacitance Disabled, Pin 11 Voltage = 0V RIN Positive Input Resistance, Any Positive Input VS = 5V, VIN = - 1.5V, 2V, TA = 25C VS = 15V, VIN = 5V 2 5 4 8 pF 20 20 M M LT1204 ELECTRICAL CHARACTERISTICS 0C TA 70C, 5V VS 15V, VCM = 0V, Pin 8 grounded and pulse tested unless otherwise noted. SYMBOL CMRR PARAMETER CONDITIONS MIN TYP Input Voltage Range, Any Positive Input VS = 5V, TA = 25C 2.5 - 2.0 6.0 4.0 V V V V 55 58 dB dB VS = 15V VS = 15V, Pin 8 Voltage = - 5V 2.0 - 1.5 5.0 3.75 VS = 5V, VCM = - 1.5V, 2V, TA = 25C VS = 15V, VCM = 5V 48 48 Negative Input Current Common Mode Rejection VS = 5V, VCM = - 1.5V, 2V, TA = 25C VS = 15V, VCM = 5V Common Mode Rejection Ratio 0.05 0.05 MAX UNITS 1 1 A/V A/V 5 A/V Power Supply Rejection Ratio VS = 4.5V to 15V Negative Input Current Power Supply Rejection VS = 4.5V to 15V AVOL Large-Signal Voltage Gain VS = 15V, VOUT = 10V, RL = 1k VS = 5V, VOUT = 2V, RL = 150 57 57 73 66 dB dB ROL Transresistance VO /IIN- VS = 15V, VOUT = 10V, RL = 1k VS = 5V, VOUT = 2V, RL = 150 115 115 310 210 k k VOUT Output Voltage Swing VS = 15V, RL = 400, TA = 25C 12 10 13.5 V V 3.0 2.5 3.7 V V 35 55 125 mA 19 19 1.5 24 24 3.5 mA mA mA PSRR VS = 5V, RL = 150, TA = 25C 60 76 0.5 dB IOUT Output Current RL = 0, TA = 25C IS Supply Current (Note 5) Pin 11 = 5V Pin 11 = 0V Pin 12 = 0V Disabled Output Resistance VS = 15V, Pin 11 = 0V, VO = 5V, RF = RG = 1k 14 25 k VS = 15V, Pin 11 = 0V, VO = 5V, RF = 2k, RG = 222 8 20 k MIN TYP U DIGITAL I PUT CHARACTERISTICS 0C TA 70C, VS = 15V, RF = 2k, RG = 220, RL = 400 unless otherwise noted. SYMBOL PARAMETER CONDITIONS VIL Input Low Voltage Pins 9, 10, 11, 12 VIH Input High Voltage Pins 9, 10, 11, 12 IIL Input Low Current Pins 9, 10 Voltage = 0V IIH Input High Current Pins 9, 10 Voltage = 5V Enable Low Input Current Pin 11 Voltage = 0V Enable High Input Current MAX 0.8 2 UNITS V V A 1.5 6 10 150 nA 4.5 15 A Pin 11 Voltage = 5V 200 300 A ISHDN Shutdown Input Current Pin 12 Voltage 0V VSHDN 5V 20 80 A tsel Channel-to-Channel Select Time (Note 6) Pin 8 Voltage = - 5V, TA = 25C 120 240 ns tdis Disable Time (Note 7) Pin 8 Voltage = - 5V, TA = 25C 40 100 ns ten Enable Time (Note 8) Pin 8 Voltage = - 5V, TA = 25C 110 200 ns tSHDN Shutdown Assert or Release Time (Note 9) Pin 8 Voltage = - 5V, TA = 25C 1.4 10 s 3 LT1204 AC CHARACTERISTICS TA = 25C, VS = 15V, RF = RG = 1k, unless otherwise noted. SYMBOL PARAMETER CONDITIONS tr, tf Small-Signal Rise and Fall Time RL = 150, VOUT = 125mV SR Slew Rate (Note 10) RL = 400 tS TYP 5.6 400 MAX UNITS ns 1000 V/s Channel Select Output Transient All VIN = 0V, RL = 400, Input Referred 40 mV Settling Time 0.1%, VOUT = 10V, RL = 1k 70 ns All Hostile Crosstalk (Note 11) SO PCB #028, RL = 100, RS = 10 92 dB Disable Crosstalk (Note 11) SO PCB #028, Pin 11 Voltage = 0V, RL = 100, RS = 50 95 dB Shutdown Crosstalk (Note 11) SO PCB #028, Pin 12 Voltage = 0V, RL = 100, RS = 50 92 dB All Hostile Crosstalk (Note 11) PDIP PCB #029, RL = 100, RS = 10 76 dB Disable Crosstalk (Note 11) PDIP PCB #029, Pin 11 Voltage = 0V, RL = 100, RS = 50 81 dB Shutdown Crosstalk (Note 11) PDIP PCB #029, Pin 12 Voltage = 0V, RL = 100, RS = 50 76 dB Differential Gain (Note 12) VS = 15V, RL = 150 VS = 5V, RL = 150 0.04 0.04 % % Differential Phase (Note 12) VS = 15V, RL = 150 VS = 5V, RL = 150 0.06 0.12 DEG DEG The denotes specifications which apply over the specified operating temperature range. Note 1: Analog and digital inputs (Pins 1, 3, 5, 7, 9, 10, 11 and 12) are protected against ESD and overvoltage with internal SCRs. For inputs < 6V the SCR will not fire, voltages above 6V will fire the SCRs and the DC current should be limited to 50mA. To turn off the SCR the pin voltage must be reduced to less than 2V or the current reduced to less than 10mA. Note 2: A heat sink may be required depending on the power supply voltage. Note 3: Commercial grade parts are designed to operate over the temperature range of - 40C to 85C but are neither tested nor guaranteed beyond 0C to 70C. Industrial grade parts specified and tested over - 40C to 85C are available on special request. Consult factory. Note 4: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LT1204CN: TJ = TA + (PD)(70C/W) LT1204CS: TJ = TA + (PD)(90C/W) Note 5: The supply current of the LT1204 has a negative temperature coefficient. For more information see Typical Performance Characteristics. Note 6: Apply 0.5V DC to Pin 1 and measure the time for the appearance of 5V at Pin 15 when Pin 9 goes from 5V to 0V. Pin 10 Voltage = 0V. Apply 0.5V DC to Pin 3 and measure the time for the appearance of 5V at Pin 15 when Pin 9 goes from 0V to 5V. Pin 10 Voltage = 0V. Apply 0.5V DC to Pin 5 and measure the time for the 4 MIN appearance of 5V at Pin 15 when Pin 9 goes from 5V to 0V. Pin 10 Voltage = 5V. Apply 0.5V DC to Pin 7 and measure the time for the appearance of 5V at Pin 15 when Pin 9 goes from 0V to 5V. Pin 10 Voltage = 5V. Note 7: Apply 0.5V DC to Pin 1 and measure the time for the disappearance of 5V at Pin 15 when Pin 11 goes from 5V to 0V. Pins 9 and 10 are at 0V. Note 8: Apply 0.5V DC to Pin 1 and measure the time for the appearance of 5V at Pin 15 when Pin 11 goes from 0V to 5V. Pins 9 and 10 are at 0V. Above a 1MHz toggle rate, ten reduces. Note 9: Apply 0.5V DC at Pin 1 and measure the time for the appearance of 5V at Pin 15 when Pin 12 goes from 0V to 5V. Pins 9 and 10 are at 0V. Then measure the time for the disappearance of 5V DC to 500mV at Pin 15 when Pin 12 goes from 5V to 0V. Note 10: Slew rate is measured at 5V on a 10V output signal while operating on 15V supplies with RF = 2k, RG = 220 and RL = 400. Note 11: VIN = 0dBm (0.223VRMS) at 10MHz on any 3 inputs with the 4th input selected. For Disable crosstalk and Shutdown crosstalk all 4 inputs are driven simultaneously. A 6dB output attenuator is formed by a 50 series output resistor and the 50 input impedance of the HP4195A Network Analyzer. RF = RG = 1k. Note 12: Differential Gain and Phase are measured using a Tektronix TSG120 YC/NTSC signal generator and a Tektronix 1780R Video Measurement Set. The resolution of this equipment is 0.1% and 0.1. Five identical MUXs were cascaded giving an effective resolution of 0.02% and 0.02. LT1204 W U TYPICAL AC PERFOR A CE Measurements taken from SO Demonstration Board #028. VS (V) AV RL () RF () RG () SMALL SIGNAL - 3dB BW (MHz) SMALL SIGNAL 0.1dB BW (MHz) SMALL SIGNAL PEAKING (dB) 15 1 150 1k 1.1k 1.6k None None 88.5 95.6 48.3 65.8 0.1 0 12 1 150 1k 976 1.3k None None 82.6 90.2 49.1 63.6 0.1 0.1 5 1 150 1k 665 866 None None 65.5 68.2 43.6 42.1 0.1 0.1 15 2 150 1k 787 887 787 887 75.7 82.2 45.8 61.3 0 0.1 12 2 150 1k 750 845 750 845 71.9 77.5 45.0 52.1 0 0 5V 2 150 1k 590 649 590 649 58.0 62.1 32.4 42.7 0 0.1 15 10 150 1k 866 1k 95.3 110 44.3 47.4 28.7 30.9 0.1 0.1 12 10 150 1k 825 931 90.9 100 43.5 46.3 27.2 32.1 0 0.1 5 10 150 1k 665 750 73.2 82.5 37.2 39.3 22.1 27.8 0 0.1 TRUTH TABLE A1 A0 ENABLE SHUTDOWN CHANNEL SELECTED 0 0 1 1 0 1 0 1 1 1 1 1 1 1 1 1 VIN0 VIN1 VIN2 VIN3 X X 0 1 High Z Output X X X 0 Off 5 LT1204 U W TYPICAL PERFOR A CE CHARACTERISTICS 12V Frequency Response, AV = 1 5V Frequency Response, AV = 1 3 -40 2 1 -60 1 0 -80 VS = 12V RL = 150 RF = 976 PHASE GAIN (dB) 2 GAIN -1 -100 GAIN (dB) -20 3 0 VS = 5V RL = 150 RF = 655 PHASE -60 -80 GAIN -1 -100 -2 -120 -3 -140 -3 -140 -4 -160 -4 -160 -5 -180 -5 -180 -6 1M -200 -6 1M 10M 100M FREQUENCY (Hz) 1G -120 -2 -200 10M 100M FREQUENCY (Hz) PHASE 7 9 -40 8 -60 7 -100 -120 4 0 VS = 5V RL = 150 RF = 590 RG = 590 PHASE -20 -40 -60 6 -80 GAIN 5 -100 -120 4 3 -140 3 -140 2 -160 2 -160 1 -180 1 -180 0 1M -200 0 1M 10M 100M FREQUENCY (Hz) 1G -200 10M 100M FREQUENCY (Hz) 12V Frequency Response, AV = 10 21 PHASE 23 -40 22 -60 21 -80 GAIN -100 0 PHASE VS = 5V RL = 150 RF = 665 RG = 73.2 -20 -40 -60 20 19 -80 GAIN -100 18 -120 17 -140 17 -140 16 -160 16 -160 15 -180 15 -180 14 1M -200 14 1M 10M 100M FREQUENCY (Hz) 1G 1204 G03 -120 18 -200 10M 100M FREQUENCY (Hz) 1G 1204 G06 PHASE (DEG) 19 -20 PHASE (DEG) 20 24 GAIN (dB) 23 22 5V Frequency Response, AV = 10 0 VS = 12V RL = 150 RF = 825 RG = 90.9 1G 1204 G05 1204 G02 24 PHASE (DEG) -80 GAIN 5 PHASE (DEG) 6 -20 GAIN (dB) VS = 12V RL = 150 RF = 750 RG = 750 8 GAIN (dB) 5V Frequency Response, AV = 2 10 0 9 1G 1204 G04 12V Frequency Response, AV = 2 10 GAIN (dB) -40 0 1204 G01 6 -20 PHASE (DEG) 4 PHASE (DEG) 0 4 LT1204 U W TYPICAL PERFOR A CE CHARACTERISTICS Maximum Capacitive Load vs Feedback Resistor Maximum Undistorted Output vs Frequency 15 AV = 10 10 AV = 1 5 AV = 2 RL = 1k AV = 2 TA = 25C 5dB PEAKING 1000 VS = 5V VS = 15V 100 10 FREQUENCY (MHz) 0 100 1 2 FEEDBACK RESISTOR (k) -40 -50 -70 -80 CH1 -90 -100 CH2 -110 CH4 CH3 -40 -50 -60 -70 -80 ANY CHANNEL -90 -100 10 FREQUENCY (MHz) -70 -80 SHUTDOWN CROSSTALK -90 -100 DISABLE CROSSTALK -110 10 FREQUENCY (MHz) -110 1 100 10 FREQUENCY (MHz) 100 1204 G13 100 1204 G12 Amplifier Output Impedance vs Frequency 1000 VS = 15V -in 10 en 100 10 RFB = RG = 2k 1 RFB = RG = 750 1 10 FREQUENCY (MHz) -100 +in -120 1 RS = 75 RS = 37.5 RS = 10 RS = 0 -90 OUTPUT IMPEDANCE () -60 -80 100 SPOT NOISE (nV/Hz OR pA/Hz) -50 -70 Spot Noise Voltage and Current vs Frequency VS = 15V RL = 100 RF = RG = 1k RS = 50 DEMO PCB #028 ALL CHANNELS DRIVEN -40 -60 1204 G11 Disable and Shutdown Crosstalk vs Frequency -30 -50 -130 1 100 1204 G10 -20 VS = 15V RL = 100 RF = RG = 1k DEMO PCB #028 -120 -120 1 100k 1204 G09 -40 -110 -120 10k 1k FREQUENCY (Hz) All Hostile Crosstalk vs Frequency, Various Source Resistance VS = 5V RL = 100 RF = RG = 1k RS = 0 DEMO PCB #028 -30 -60 100 -30 -20 ALL HOSTILE CROSSTALK (dB) -30 VO = 1VRMS 5V All Hostile Crosstalk vs Frequency 15V All Hostile Crosstalk vs Frequency VS = 15V RL = 100 RF = RG = 1k RS = 0 DEMO PCB #028 VO = 6VRMS 0.01 1204 G08 1204 G07 -20 3 ALL HOSTILE CROSSTALK (dB) 1 VS = 15V RL = 400 RF = RG = 1k 0.001 10 10 0 ALL HOSTILE CROSSTALK (dB) TOTAL HARMONIC DISTORTION (%) CAPACITIVE LOAD (pF) VS = 15V RL = 1k RFB = 1k 20 OUTPUT VOLTAGE (VP-P) 0.1 10000 25 ALL HOSTILE CROSSTALK (dB) Total Harmonic Distortion vs Frequency 10 100 1k 10k FREQUENCY (Hz) 100k 1204 G14 0.1 10k 100k 10M 1M FREQUENCY (Hz) 100M 1204 G15 7 LT1204 U W TYPICAL PERFORMANCE CHARACTERISTICS 100 OUTPUT CURRENT (A) 150 100 50 0 -50 SLOPE = 1/18k -100 -150 -200 -5 -4 -3 -2 -1 0 1 2 3 OUTPUT VOLTAGE (V) 4 0 VS = 15V RF = RG = 1k 10 1 -2 -3 -4 -5 -6 -7 -8 1.0 0 5 VIN = 1VDC RL = 100 RFB = RG = 1k -1 VOLTAGE ON PIN 8 (V) DISABLED OUTPUT IMPEDANCE (k) VS = 15V RF = RG = 1k 200 Maximum Channel Switching Rate vs Pin 8 Voltage Disabled Output Impedance vs Frequency Output Disable V-I Characteristic 10k 1k 100k 1M FREQUENCY (Hz) 10M 100M 1.5 2.0 3.0 3.5 2.5 CHANNEL SWITCHING RATE (MHz) 1204 G17 1204 G16 1204 G18 Input Voltage Range vs Supply Voltage Input Voltage Range vs Pin 8 Voltage 4.0 Power Supply Rejection vs Frequency 70 INPUT VOLTAGE RANGE (V) INPUT VOLTAGE RANGE (V) 4 2 0 -55C, 25C, 125C -2 -4 -6 4 25C -55C 2 125C 0 125C -2 -55C 25C -4 -1 -2 -3 -4 -5 -6 -7 VOLTAGE ON PIN 8 (V) 2 -8 -9 4 12 10 6 8 SUPPLY VOLTAGE (V) Output Saturation Voltage vs Temperature POSITIVE 40 NEGATIVE 30 20 10 0 -1.0 1.0 0.5 50 25 75 0 TEMPERATURE (C) 100 125 1204 G22 1M 10M FREQUENCY (Hz) 100M Settling Time to 10mV vs Output Step 10 VS = 15V RF = RG = 1k 8 6 70 OUTPUT STEP (V) -0.5 100k 1204 G21 80 RL = V- -50 -25 -10 10k 16 14 Output Short-Circuit Current vs Temperature OUTPUT SHORT-CIRCUIT CURRENT (mA) OUTPUT SATURATION VOLTAGE (V) 50 1204 G20 1204 G19 8 60 -6 0 V+ VS = 15V RFB = RG = 1k PIN 8 = 0V 6 POWER SUPPLY REJECTION (dB) VS = 15V AV = 1 6 60 50 4 2 0 -2 -4 -6 40 -8 30 -50 -25 -10 50 25 0 75 TEMPERATURE (C) 100 125 1204 G23 30 40 60 50 SETTLING TIME (ns) 70 80 1204 G24 LT1204 U W TYPICAL PERFOR A CE CHARACTERISTICS Settling Time to 1mV vs Output Step Enabled Supply Current vs Supply Voltage 10 VS = 15V RF = RG = 1k 8 22 21 21 4 2 0 -2 -4 20 -55C 19 18 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) OUTPUT STEP (V) 22 20 6 25C 17 16 15 -6 14 -8 13 -10 Disabled and Shutdown Supply Current vs Supply Voltage 125C 2 4 2 4 6 8 10 12 14 SUPPLY VOLTAGE (V) -55C 16 15 -55C, 25C, 125C 16 ISHDN 0 18 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE (V) 1204 G26 1205 G25 16 18 1204 G27 U W U UO APPLICATI 25C 17 1 0 6 8 10 12 14 16 18 20 SETTLING TIME (s) 18 2 12 0 125C 19 S I FOR ATIO Logic Inputs The logic inputs of the LT1204 are compatible with all 5V logic. All pins have ESD protection (> 2kV), and shorting them to 12V or 15V will cause excessive currents to flow. Limit the current to less than 50mA when driving the logic above 6V. Power Supplies The LT1204 will operate from 5V (10V total) to 15V (30V total) and is specified over this range. It is not necessary to use equal value supplies, however, the offset voltage and inverting input bias current will change. The offset voltage changes about 600V per volt of supply mismatch. The inverting bias current changes about 2.5A per volt of supply mismatch. The power supplies should be bypassed with quality tantalum capacitors. specified over a very wide range of conditions. An advantage of the current feedback topology used in the LT1204 is well-controlled frequency response. In all cases of the performance table, the peaking is 0.1dB or less. If more peaking can be tolerated, larger bandwidths can be obtained by lowering the feedback resistor. For gains of 2 or less, the 0.1dB bandwidth is greater than 30MHz for all loads and supply voltages. At high gains (low values of RG) the disabled output resistance drops slightly due to loading of the internal buffer amplifier as discussed in Multiplexer Expansion. Small-Signal Rise Time, AV = 2 Feedback Resistor Selection The small-signal bandwidth of the LT1204 is set by the external feedback resistors and internal junction capacitors. As a result the bandwidth is a function of the supply voltage, the value of the feedback resistor, the closedloop gain and the load resistor. These effects are outlined in the resistor selection guide of the Typical AC Performance table. Bandwidths range as high as 95MHz and are VS = 15V RL = 150 RF = 1k RG = 1k 1204 AI01 9 LT1204 U W U UO APPLICATI S I FOR ATIO Capacitance on the Inverting Input Large-Signal Transient Response Current feedback amplifiers require resistive feedback from the output to the inverting input for stable operation. Take care to minimize the stray capacitance between the output and the inverting input. Capacitance on the inverting input to ground will cause peaking in the frequency response and overshoot in the transient response. Capacitive Loads The LT1204 can drive capacitive loads directly when the proper value of feedback resistor is used. The graph of Maximum Capacitive Load vs Feedback Resistor should be used to select the appropriate value. The value shown is for 5dB peaking when driving a 1k load at a gain of 2. This is a worst-case condition. The amplifier is more stable at higher gains and driving heavier loads. Alternatively, a small resistor (10 to 20) can be put in series with the output to isolate the capacitive load from the amplifier output. This has the advantage that the amplifier bandwidth is only reduced when the capacitive load is present. The disadvantage is that the gain is a function of load resistance. VS = 15V AV = 2 RF = 1k RG = 1k RL = 400 1204 AI02 Large-Signal Transient Response Slew Rate The slew rate of the current feedback amplifier on the LT1204 is not independent of the amplifier gain the way slew rate is in a traditional op amp. This is because both the input and the output stage have slew rate limitations. In high gain settings the signal amplitude between the negative input and any driven positive input is small and the overall slew rate is that of the output stage. For gains less than 10, the overall slew rate is limited by the input stage. The input slew rate of the LT1204 is approximately 135V/s and is set by internal currents and capacitances. The output slew rate is set by the value of the feedback resistors and the internal capacitances. At a gain of 10 with a 1k feedback resistor and 15 supplies, the output slew rate is typically 1000V/s. Larger feedback resistors will reduce the slew rate as will lower supply voltages, similar to the way the bandwidth is reduced. The graph, Maximum Undistorted Output vs Frequency, relates the slew rate limitations to sinusoidal inputs for various gain configurations. 10 VS = 15V AV = 10 RF = 910 RG = 100 RL = 400 1204 AI03 Switching Characteristics and Pin 8 Switching between channels is a "make-before-break" condition where both inputs are on momentarily. The buffers isolate the inputs when the "make-before-break" switching occurs. The input with the largest positive voltage determines the output level. If both inputs are equal, there is only a 40mV error at the input of the CFA during the transition. The reference adjust (Pin 8) allows the user to trade off positive input voltage range for switching time. For example, on 15V supplies, setting the voltage on Pin 8 to - 6.8V reduces the switching transient to a 50ns duration, and reduces the positive input range from 6V to 2.35V. The negative input range remains unchanged at - 6V. When switching video "in picture," this short transient is imperceptible even on high quality LT1204 U W U UO APPLICATI S I FOR ATIO monitors. The reference pin has no effect when the LT1204 is operating on 5V, and should be grounded. On supply voltages above 8V, the range of voltages for Pin 8 should be between - 6.5V and - 7.5V. Reducing Pin 8 voltage below - 7.5V turns "on" the "off" tee switch, and the isolation between channels is lost. Competitive MUXs CMOS MUX Channel-to-Channel Switching BIPOLAR MUX A0 PIN 9 1204 AI06 VIN0 AND VIN1 CONNECTED TO 2MHz SINEWAVE Crosstalk VOUT PIN 15 VIN0 AND VIN1 CONNECTED TO 2MHz SINEWAVE PIN 8 VOLTAGE = -6.8V, VS = 15V 1204 AI04 Transient at Input Buffer A0 PIN 9 The crosstalk, or more accurately all hostile crosstalk, is measured by driving a signal into any three of the four inputs and selecting the 4th input with the logic control. This 4th input is either shorted to ground or terminated in an impedance. All hostile crosstalk is defined as the ratio in decibel of the signal at the output of the CFA to the signal on the three driven inputs, and is input-referred. Disable crosstalk is measured with all four inputs driven and the part disabled. Crosstalk is critical in many applications where video multiplexers are used. In professional video systems, a crosstalk figure of - 72dB is a desirable specification. The key to the outstanding crosstalk performance of the LT1204 is the use of tee switches (see Figure 1). When the tee switch is on (Q2 off) Q1 and Q3 are a pair of emitter followers with excellent AC response for driving the CFA. VIN0 PIN 1 SWITCHING BETWEEN VIN0 AND VIN1 RS = 50, VREF = - 6.8V, VS 15V V+ 1204AI05 I1 Competitive video multiplexers built in CMOS are bidirectional and suffer from poor output-to-input isolation and cause transients to feed to the inputs. CMOS MUXs have been built with "break-before-make" switches to eliminate the talking between channels, but these suffer from output glitches large enough to interfere with sync circuitry. Multiplexers built on older bipolar processes that switch lateral PNP transistors take several microseconds to settle and blur the transition between pictures. Q3 VIN0 Q1 + TO LOGIC Q2 VOUT CFA - V- RF FB I2 RG -V 1204 F01 Figure 1. Tee Switch 11 LT1204 W U U UO APPLICATI S I FOR ATIO When the decoder turns off the tee switch (Q2 on) the emitter base junctions of Q1 and Q3 become reversebiased while Q2 emitter absorbs current from I1. Not only do the reverse-biased emitter base junctions provide good isolation, but any signal at VIN0 coupling to Q1 emitter is further attenuated by the shunt impedance of Q2 emitter. Current from I2 is routed to any on switch. Crosstalk performance is a strong function of the IC package, the PC board layout as well as the IC design. The die layout utilizes grounds between each input to isolate adjacent channels, while the output and feedback pins are on opposite sides of the die from the input. The layout of a PC board that is capable of providing - 90dB all hostile crosstalk at 10MHz is not trivial. That level corresponds to a 30V output below a 1V input at 10MHz. A demonstration board has been fabricated to show the component and ground placement required to attain these crosstalk num- bers. A graph of all hostile crosstalk for both the PDIP and SO packages is shown. It has been found empirically from these PC boards that capacitive coupling across the package of greater than 3fF (0.003pF) will diminish the rejection, and it is recommended that this proven layout be copied into designs. The key to the success of the SO PC board #028 is the use of a ground plane guard around Pin 13, the feedback pin. PDIP PC Board #029, Component Side GND VIN0 C1 ENABLE RO C2 + + C3 U1 R1 VIN1 -20 ALL HOSTILE CROSSTALK (dB) V+ VOUT All Hostile Crosstalk RF VS = 15V VIN0 = GND VIN1,2,3 = 0dBm RL = 100 -40 C4 -60 R3 R6 PDIP DEMO PCB #029 R0 VIN2 R2 -80 S/D SO DEMO PCB #028 R1 -100 VIN3 -120 1 10 FREQUENCY (MHz) 100 (408) 432-1900 LT1204 VIDEO MUX DEMONSTRATION BOARD REF 1204 AI09 1204 AI07 12 V- LT1204 U W U UO APPLICATI S I FOR ATIO SOL PC Board #028, Component Side GND V- V+ VOUT VIN0 ENABLE C4 VIN1 C2 C1 RO U1 RF A1 R3 C3 R1 RG R2 A0 VIN2 S/D (408) 432-1900 LT1204 VIDEO MUX DEMONSTRATION BOARD VIN3 REF 1204 AI08 13 LT1204 W U U UO APPLICATI S I FOR ATIO Demonstration PC Board Schematic GND V - 1 VIN0 2 3 VIN1 4 5 VIN2 6 7 VIN3 8 V+ VIN0 GND VO VIN1 V- V+ + 16 C1 4.7F C2 0.1F C3 4.7F C4 0.1F RO 75 15 14 + RF 750 13 GND FB LT1204 12 VIN2 SHDN ENABLE GND VIN3 A1 REF A0 SHUTDOWN R3 10k 11 RG 750 ENABLE 10 RESISTORS R1, R2 AND R3 ARE PULL-DOWN AND PULL-UP RESISTORS FOR THE LOGIC AND ENABLE PINS. THEY MAY BE OMITTED IF THE LT1204 IS DRIVEN FROM TTL LEVELS OR FROM 5V CMOS. A1 9 A0 R1 10k R2 10k REF L1204 AI10 All Hostile Crosstalk Test Setup* Alternate All Hostile Crosstalk Setup* HP4195A NETWORK ANALYZER HP4195A NETWORK ANALYZER OSC 50 REF 50 OSC 50 VIN 50 1 2 3 4 5 6 7 8 50 VIN0 GND V+ VO VIN1 V- GND FB 16 14 LT1204 12 SHDN GND ENABLE A1 REF A0 10 50 1k -15V 3 1k 50 10k 50 10 6 7 *SEE PC BOARD LAYOUT 1204 AI11 4 5 11 9 1 2 13 VIN2 VIN3 15V 15 50 14 VIN 50 50 SPLITTER 50 SPLITTER 10 REF 50 8 VIN0 V+ GND VO VIN1 V- GND VIN2 FB 16 14 ENABLE VIN3 A1 REF A0 50 1k -15V 1k 13 LT1204 12 SHDN GND 15V 15 10k 11 10 9 *SEE PC BOARD LAYOUT 1204 AI12 LT1204 W U U UO APPLICATI S I FOR ATIO Multiplexer Expansion Pin 11 and Pin 12 To expand the number of MUX inputs, LT1204s can be paralleled by shorting their outputs together. The multiplexer disable logic has been designed to prevent shootthrough current when two or more amplifiers have their outputs shorted together. (Shoot-through current is a spike of power supply current caused by both amplifiers being on at once.) Monitoring Supply Current Spikes V+ TEK CT-1 1 3 5 7 13 The multiplexer uses a circuit to ensure the disabled amplifiers do not load or alter the cable termination. When the LT1204 is disabled (Pin 11 low) the output stage is turned off and an active buffer senses the output and drives the feedback pin to the CFA (Figure 2). This bootstraps the feedback resistors and raises the true output impedance of the circuit. For the condition where RF = RG = 1k, the Disable Output Resistance is typically raised to 25k and drops to 20k for AV = 10, RF = 2k and RG = 222 due to loading of the feedback buffer. Operating the Disable feature with RG < 100 is not recommended. TO SCOPE + + + + - 16 LT1204 EN 11 14 V 15 VIN0 TEE SWITCH VIN1 TEE SWITCH AV = +1 75 + VIN2 - - 1k VIN3 1k TEE SWITCH FB 75 O V 1 3 5 7 13 + + + + - 75 RF 74HC04 5V OSCILLATOR VOUT CFA "OFF" TEE SWITCH RG 75 + 16 11 EN LT1204 CABLE V- 75 15 LT1204 "ON" 75 1204 F02 14 V - 1k Figure 2. Active Buffer Drives FB Pin 13 1204 AI13 1k A shutdown feature (Pin 12 low) reduces the supply current to 1.5mA and lowers the power dissipation when the LT1204 is not in use. If the part is shut down, the bootstrapping is inoperative and the feedback resistors will load the output. If the CFA is operated at a gain of +1, however, the feedback resistor will not load the output even in shutdown because there is no resistive path to ground, but there will be a - 6dB loss through the cable system. Timing and Supply Current Waveforms 74HC04 OUTPUT 5V/DIV OSCILLATOR 5V/DIV VOUT 1V/DIV A frequency response plot shows the effect of using the disable feature versus using the shutdown feature. In this example four LT1204s were connected together at their outputs forming a 16-to-1 MUX. The plot shows the effect of the bootstrapping circuit that eliminates the IS 10mA/DIV 1204 AI14 15 LT1204 W U U UO APPLICATI S I FOR ATIO improper cable termination due to feedback resistors loading the cable. The limit to the number of expanded inputs is set by the acceptable error budget of the system. For a 64-to-1 MUX we need sixteen LT1204s. The equivalent load resistance due to the feedback resistor REQ in Disable is 25k/15 = 1.67k. See Figure 3. VO = 16-to-1 MUX Response Using Disable vs Shutdown 4 GAIN (dB) This voltage represents a 2.1% loading error. If the shutdown feature is used instead of the disable feature, then the LT1204 could expand to only an 8-to-1 MUX for the same error. VS = 15V RL = 100 RF = RG = 1k 2 DISABLE 0 SHUTDOWN -2 -4 -6 1 75REQ , V = 0.489V 75(75) + 150REQ O 10 FREQUENCY (MHz) 100 1204 AI15 As a practical matter the gain error at frequency is also set by capacitive loading. The disabled output capacitance of the LT1204 is about 8pF, and in the case of sixteen LT1204s, it would represent a 128pF load. The combination of 1.67k and 128pF correspond to about a 0.3dB roll-off at 5MHz. OFF 75 16-to-1 Multiplexer All Hostile Crosstalk CABLE -20 ALL HOSTILE CROSSTALK (dB) LT1204 VS = 15V RL = 100 RF = RG = 1k RS = 0 -40 VOUT ON 75 1V LT1204 75 -60 SHUTDOWN CROSSTALK -80 VOUT 75 DISABLE CROSSTALK -100 1V REQ 75 -120 1 10 FREQUENCY (MHz) 100 1204 AI16 16 1204 F03 Figure 3. Equivalent Loading Schematic LT1204 UO TYPICAL APPLICATI S Programable Gain Amplifier (PGA) Two LT1204s and seven resistors make a Programable Gain Amplifier with a 128-to-1 gain range. The gain is proportional to 2N where N is the 3-bit binary value of the select logic. An input attenuator alters the input signal Programable Gain Amplifier Accepts Inputs from 62.5mVP-P to 8VP-P VIN = 62.5mVP-P TO 8VP-P 1 3 5 7 13 499 249 124 4-Input Differential Receiver + + LT1204 + #1 + - 1.5k 100 124 VOUT = 1VP-P 1 3 5 7 13 by 1, 0.5, 0.25 and 0.125 to form an amplifier with a gain of 16, 8, 4, 2, when LT1204 #1 is selected. LT1204 #2 is connected to the same attenuator. When enabled (LT1204 #1 disabled), it results in gain of 1, 0.5, 0.25 and 0.125. The wide input common mode range of the LT1204 is needed to accept inputs of 8VP-P. + + + LT1204 + #2 - 1.5k 1204 TA03 LT1204s can be connected inverting and noninverting as shown to make a 4-input differential receiver. The receiver can be used to convert differential signals sent over a low cost twisted pair to a single-ended output or used in video loop-thru connections. The logic inputs A0 and A1 are tied together because the same channels are selected on each LT1204. By using the Disable feature, the number of differential inputs can be increased by adding pairs of LT1204s and tying the outputs of the noninverting LT1204s (#1) together. Switching transients are reduced in this receiver because the transient from LT1204 #2 subtracted from the transient of LT1204 #1. 4-Input Differential Receiver A0 A1 SHDN EN TWISTED PAIR + A0 + A1 SHDN + LT1204 + #1 - IN 1 IN 2 IN 3 IN 4 68 68 75 EN VOUT 75 1k CABLE 1k* 1k 1k* *OPTIONAL 1k* 1k* + A0 + A1 SHDN + LT1204 + #2 - -IN 1 -IN 2 -IN 3 -IN 4 EN 1k 1204 TA04 1k 17 LT1204 UO TYPICAL APPLICATI S Differential Receiver Response DIFFERENTIAL RECEIVER RESPONSE (dB) Differential Receiver Switching Waveforms CABLE OUTPUT LT1204 #2 OUTPUT A0 PIN 9 20 0 DIFFERENTIAL MODE RESPONSE -20 -40 COMMON MODE RESPONSE -60 10k 1204 TA05 VS = 15V RL = 100 100k 1M 10M FREQUENCY (Hz) 100M 1204 TA06 4-Input Twisted-Pair Driver It is possible to send and receive color composite video signals appreciable distances on a low cost twisted pair. The cost advantage of this technique is significant. Standard 75 RG-59/U coaxial cable cost between 25 and 50 per foot. PVC twisted pair is only pennies per foot. Differential signal transmission resists noise because the interference is present as a common mode signal. The LT1204 can select one of four video cameras for instance, Multiburst Pattern Passed Through 1000 Feet of Twisted Pair, No Cable Compensation INPUT OUTPUT 1204 TA08 18 and drive the video signal on to the twisted pair. The circuit uses an LT1227 current feedback amplifier connected with a gain of - 2, and an LT1204 with a gain of 2. The 47 resistors back-terminate the low cost cable in its characteristic impedance to prevent reflections. The receiver for the differential signal is an LT1193 connected for a gain of 2. Resistors R1, R2 and capacitors C1, C2 are used for cable compensation for loss through the twisted pair. Alternately, a pair of LT1204s can be used to perform the differential to single-ended conversion. Multiburst Pattern Passed Through 1000 Feet of Twisted Pair, with Cable Compensation OUTPUT INPUT 1204 TA09 LT1204 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. N Package 16-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.770* (19.558) MAX 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 0.255 0.015* (6.477 0.381) 0.130 0.005 (3.302 0.127) 0.300 - 0.325 (7.620 - 8.255) 0.020 (0.508) MIN 0.009 - 0.015 (0.229 - 0.381) ( +0.035 0.325 -0.015 8.255 +0.889 -0.381 0.045 - 0.065 (1.143 - 1.651) ) 0.065 (1.651) TYP 0.125 (3.175) MIN 0.018 0.003 (0.457 0.076) 0.100 0.010 (2.540 0.254) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) N16 1197 SW Package 16-Lead Plastic Small Outline (Wide 0.300) (LTC DWG # 05-08-1620) 0.398 - 0.413* (10.109 - 10.490) 16 15 14 13 12 11 10 9 0.394 - 0.419 (10.007 - 10.643) NOTE 1 1 0.291 - 0.299** (7.391 - 7.595) 2 3 4 5 6 7 0.093 - 0.104 (2.362 - 2.642) 0.010 - 0.029 x 45 (0.254 - 0.737) 8 0.037 - 0.045 (0.940 - 1.143) 0 - 8 TYP 0.009 - 0.013 (0.229 - 0.330) NOTE 1 0.050 (1.270) TYP 0.004 - 0.012 (0.102 - 0.305) 0.014 - 0.019 (0.356 - 0.482) TYP 0.016 - 0.050 (0.406 - 1.270) NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS S16 (WIDE) 0396 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT1204 U TYPICAL APPLICATION 4-Input Twisted-Pair Driver/Receiver VIN0 VIN1 75 VIN2 VIN3 + + + + - LT1204 1k 1k 2k 47 1000 FT OF TWISTED PAIR + 91 47 - + 75 - + - LT1193 300 LT1227 1204 TA07 18 680pF 390 300pF 300 200 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1203/LT1205 150MHz Video Multiplexer High Speed, but No Cable Driving LT1259/LT1260 Dual and Triple Current Feedback Amplifiers Low Cost, with Shutdown LT1675 RGB Multiplexer with Current Feedback Amplifiers Very High Speed, Pixel Switching 20 Linear Technology Corporation 1204fas, sn1204 LT/TP 0898 2K REV A * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 FAX: (408) 434-0507 www.linear-tech.com LINEAR TECHNOLOGY CORPORATION 1993