MIC28510
75V/4A Hyper Speed Control
Synchronous DC/DC Buck Regulator
SuperSwitcher II
Hyper Speed Control, SuperSwitcher II and Any Capacitor are trademarks of Micrel, Inc.
MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
March 2012 M9999-030912-A
General Description
The Micrel MIC28510 is an adjustable–frequency,
synchronous buck regulator featuring unique adaptive on–
time control architecture. The MIC28510 operates over an
input supply range of 4.5V to 75V and provides a regulated
output of up to 4A of output current. The output voltage is
adjustable down to 0.8V with a guaranteed accuracy of ±1%.
Micrel’s Hyper Speed Control architecture allows for ultra–
fast transient response while reducing the output capacitance
and also makes (High VIN) / (Low VOUT) operation possible.
This adaptive tON ripple control architecture combines the
advantages of fixed–frequency operation and fast transient
response in a single device.
The MIC28510 offers a full suite of protection features to
ensure protection of the IC during fault conditions. These
include undervoltage lockout to ensure proper operation
under power–sag conditions, internal soft–start to reduce
inrush current, foldback current limit, “hiccup” mode short-
circuit protection, and thermal shutdown.
All support documentation can be found on Micrel’s web
site at: www.micrel.com.
Features
Hyper Speed Control architecture enables:
High Delta V operation (VIN = 75V and VOUT = 0.8V)
Small output capacitance
4.5V to 75V voltage input
4A output current capability, up to 95% efficiency
Adjustable output voltage form 0.8V to 24V
±1% FB accuracy
Any Capacitor stable:
Zero-ESR to high–ESR output capacitors
100kHz to 500kHz switching frequency
Internal compensation
Foldback current–limit and “hiccup” mode short-circuit
protection
Thermal shutdown
Supports safe startup into a pre–biased load
–40C to +125C junction temperature range
28-pin 5mm 6mm MLF® package
Applications
Distributed power systems
Communications/networking infrastructure
Industrial power
Solar energy
___________________________________________________________________________________________________________
Typical Application
Efficiency (V
IN
= 48V)
vs. Output Current
10
20
30
40
50
60
70
80
90
100
0123456
O UT PUT CURRENT ( A)
EFFICI ENCY (%)
5.0V
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.8V
f
SW
= 250kHz
Micrel, Inc. MIC28510
March 2012 2 M9999-030912-A
Ordering Information
Part Number Junction Temperature Range Package Lead Finish
MIC28510YJL 40C to 125C 28-pin 5mm 6mm MLF® Pb-Free
Pin Configur ation
28-Pin 5mm 6mm MLF® (JL)
Pin Description
Pin Number Pin Name Pin Function
1, 3 NC No Connect.
2, 5, 6,
7, 8, 21 PGND
Power Ground. PGND is the ground path for the MIC28510 buck converter power stage. The
PGND pin connects to the sources of low-side N-Channel internal MOSFETs, the negative
terminals of input capacitors, and the negative terminals of output capacitors. The loop for the
power ground should be as small as possible and separate from the signal ground (SGND) loop.
4, 9, 10,
11, 12 SW Switch Node (Output). Internal connection for the high-side MOSFET source and low-side
MOSFET drain.
13, 14, 15, 16,
17, 18, 19 PVIN
High-Side Internal N-Channel MOSFET Drain Connection (Input).The PVIN operating voltage
range is from 4.5V to 75V. Input capacitors between the PVIN pins and the power ground (PGND)
are required and keep the connection short.
20 BST
Boost (Output). Bootstrapped voltage to the high-side N-channel internal MOSFET driver. A
Schottky diode is connected between the VDD pin and the BST pin. A boost capacitor of 0.1F is
connected between the BST pin and the SW pin.
22 CS
Current Sense (Input). High current output driver return. The CS pin connects directly to the switch
node. Due to the high-speed switching on this pin, the CS pin should be routed away from
sensitive nodes. CS pin also senses the current by monitoring the voltage across the low-side
internal MOSFET during OFF-time.
Micrel, Inc. MIC28510
March 2012 3 M9999-030912-A
Pin Description (Continued)
Pin Number Pin Name Pin Function
23 FS Frequency Setting Pin.
24 EN
Enable (Input). A logic level control of the output. The EN pin is CMOS-compatible. Logic high =
enable, logic low = shutdown. In the off state, the VDD supply current of the device is reduced
(typically 0.7mA). Do not pull the EN pin above the VDD supply. This pin has 100k pull-up resistor to
VDD.
25 FB
Feedback (Input). Input to the transconductance amplifier of the control loop. The FB pin is
regulated to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the
desired output voltage.
26 SGND
Signal Ground. SGND must be connected directly to the ground planes. Do not route the SGND pin
to the PGND Pad on the top layer; see PCB layout guidelines for details.
27 VDD
VDD Bias (Input). Power to the internal reference and control sections of the MIC28510. The VDD
operating voltage range is from 4.5V to 5.5V. A 2.2µF ceramic capacitor from the VDD pin to the
PGND pin must be placed next to the IC. VDD must be powered up at the same time or after PVIN
to make the soft-start function correctly.
28 PVDD Power Supply for Gate Driver of Bottom MOSFET.
Micrel, Inc. MIC28510
March 2012 4 M9999-030912-A
Absolute Maximum Ratings(1)
PVIN to PGND................................................ 0.3V to +76V
FS to PGND ....................................................0.3V to PVIN
PVDD, VDD to PGND......................................... 0.3V to +6V
VSW, VCS to PGND ..............................0.3V to (PVIN +0.3V)
VBST to VSW ........................................................ 0.3V to 6V
VBST to PGND .................................................. 0.3V to 82V
VEN to PGND ...................................... 0.3V to (VDD + 0.3V)
VFB to PGND....................................... 0.3V to (VDD + 0.3V)
PGND to SGND ........................................... 0.3V to +0.3V
Junction Temperature (TJ) ....................................... +150°C
Storage Temperature (TS).........................65C to +150C
Lead Temperature (soldering, 10s)............................ 260°C
ESD Rating(2)..............................................................1000V
Operating Ratings(3)
Supply Voltage (PVIN) ....................................... 4.5V to 75V
Bias Voltage (PVDD, VDD).................................. 4.5V to 5.5V
Enable Input (VEN)................................................. 0V to VDD
Junction Temperature (TJ) ........................ 40C to +125C
Maximum Power Dissipation......................................Note 4
Package Thermal Resistance(4)
5mm x 6mm MLF® (JA) ....................................36C/W
Electrical Characteristics(5)
PVIN = VFS = 48V, VDD = 5V; VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate 40°C TJ +125°C.
Parameter Condition Min. Typ. Max. Units
Power Supply Input
Input Voltage Range ( PVIN) 4.5 75 V
FS Voltage Range 2 75 V
VDD Bias Voltage
Operating Bias Voltage (VDD) 4.5 5 5.5 V
Undervoltage Lockout Trip Level VDD Rising 3.2 3.85 4.45 V
UVLO Hysteresis 380 mV
Quiescent Supply Current (IVDD) VFB = 1.5V 1.4 3 mA
Shutdown Supply Current (IVDD) VDD = VBST = 5.5V, VIN = 48V
SW = unconnected, VEN = 0V 0.7 2 mA
Reference
0°C TJ 85°C (±1.0%) 0.792 0.8 0.808
Feedback Reference Voltage 40°C TJ 125°C (±1.5%) 0.788 0.8 0.812 V
Load Regulation IOUT = 0A to 4A 0.04 %
Line Regulation PVIN = 4.5 to 75V 0.1 %
FB Bias Current VFB = 0.8V -0.5 0.005 0.5 µA
Enable Control
EN Logic Level High 4.5V < VDD < 5.5V 1.2 V
EN Logic Level Low 4.5V < VDD < 5.5V 0.4 V
EN Bias Current VEN = 0V 50 100 µA
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
3. The device is not guaranteed to function outside operating range.
4. PD(MAX) = (TJ(MAX) – TA)/ JA, where JA depends upon the printed circuit layout. See “Applications Information.”
5. Specification for packaged product only.
Micrel, Inc. MIC28510
March 2012 5 M9999-030912-A
Electrical Characteristics(5) (Continued)
PVIN = VFS = 48V, VDD = 5V; VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate 40°C TJ +125°C.
Parameter Condition Min. Typ. Max. Units
Oscillator
Switching Frequency VFS = PVIN 375 500 625 kHz
Maximum Duty Cycle (6) V
FB = 0V, VFS=PVIN 80 %
Minimum Duty Cycle VFB > 0.8V 0 %
Minimum Off-time 360 ns
Soft-Start
Soft-Start time 6 ms
Short-Circuit Protection
VFB = 0.8V, TJ = 25°C 4.8 7 10
Current–Limit Threshold VFB = 0.8V, TJ = 125°C 4 10 A
Short–Circuit Current VFB = 0V 2 4.3 5.7 A
Internal FETs
Top–MOSFET RDS (ON) I
SW = 1A 31 m
Bottom–MOSFET RDS (ON) I
SW = 1A 31 m
SW Leakage Current PVIN = 36V, VSW = 36V, VEN = 0V, VBST = 41V 55 µA
PVIN Leakage Current PVIN = 36V, VSW = 0V, VEN = 0V, VBST = 41V 55 µA
Thermal Protection
Over–Temperature Shutdown TJ Rising 160 °C
Over–Temperature Shutdown
Hysteresis 2 °C
Note:
6. The maximum duty–cycle is limited by the fixed mandatory off-time (tOFF ) of typically 360ns.
Micrel, Inc. MIC28510
March 2012 6 M9999-030912-A
Typical Characteristics
V
IN
Operating Supply Current
vs. Input Voltage
0
4
8
12
16
20
5 15253545556575
I NPUT VOLT A GE (V)
SUPPL Y CUR RENT (mA)
V
OUT
= 3.3V
I
OUT
= 0A
V
DD
= 5V
f
SW
= 250kHz
V
IN
Shutdown Current
vs. I np ut Voltage
0
100
200
300
400
5 15253545556575
I NPUT VOLTAGE (V)
SHUTDOW N CURRENT ( uA )
V
DD
= 5V
V
EN
= 0V
V
DD
Operat ing Supply Current
vs. Input Voltage
0
2
4
6
8
10
5 1525354555 6575
I NPUT VOLTAGE (V)
V
DD
SUPPLY CURRENT ( mA)
V
OUT
= 3.3V
V
DD
= 5V
f
SW
= 250kHz
Feedback V o ltag e
vs. Input V oltag e
0.792
0.796
0.800
0.804
0.808
5 15253545556575
I NPUT VOLT A GE (V)
FEEDBACK VOLTAG E (V)
V
OUT
= 3.3V
V
DD
= 5V
I
OUT
= 0A
f
SW
= 250kHz
Total Regulation
vs. Input Voltage
-1.0%
-0.8%
-0.6%
-0.4%
-0.2%
0.0%
0.2%
0.4%
0.6%
0.8%
1.0%
5 15253545556575
I NPUT VOLTA GE (V)
TOTAL REG ULATION (% )
V
OUT
= 3.3V
V
DD
= 5V
I
OUT
= 0A to 4A
f
SW
= 250kHz
Output Peak Current Limit
vs. Input Voltage
0
3
6
9
12
15
5 1525 3545556575
I NPUT VO LTAGE (V)
CURRENT LIM IT ( A)
VOUT = 3.3V
VDD = 5V
fSW = 250kHz
Switchi ng Frequency
vs. Input Vol tage
100
150
200
250
300
5 15253545556575
I NPUT VO LTAGE (V)
SW ITCHI NG FREQUENCY ( k Hz )
V
OUT
= 3.3V
V
DD
= 5V
I
OUT
= 1A
R18 =100k
R19 =100k
V
DD
Operat ing Suppl y Current
vs. Temperat ure
0
2
4
6
8
10
12
-50 -25 0 25 50 75 100 125
TEM PERATURE (° C)
SUPP LY CURRENT (mA)
V
IN
= 48V
V
OUT
= 3.3V
V
DD
= 5V
I
OUT
= 0A
f
SW
= 250kHz
V
DD
Shut down Current
vs. Temperature
0.0
0.2
0.4
0.6
0.8
1.0
-50 -25 0 25 50 75 100 125
TEMPERATURE (°C)
SHUTDOWN CURRENT (mA)
V
IN
= 48V
I
OUT
= 0A
V
DD
= 5V
V
EN
= 0V
Micrel, Inc. MIC28510
March 2012 7 M9999-030912-A
Typical Characteristics (Continued)
V
DD
UVLO Threshold
vs. Temperature
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.1
4.2
-50 -25 0 25 50 75 100 125
TEMPERA TURE ( °C)
VDD TH RES HOLD ( V)
RISING
FALLING
V
IN
= 48V
I
OUT
= 0A
V
IN
Operating Supply Current
vs. Temperat ure
0
4
8
12
16
20
-50 -25 0 25 50 75 100 125
TEM P ERATURE ( °C)
SUPPLY CUR RENT (mA)
V
IN
= 48V
V
OUT
= 3.3V
V
DD
= 5V
I
OUT
= 0A
f
SW
= 250kHz
V
IN
Shutdown Current
vs. Temperature
0
80
160
240
320
400
-50 -25 0 25 50 75 100 125
TEMPERATURE (° C)
SHUT DOWN CURRE NT (uA)
V
IN
= 48V
V
DD
= 5V
V
EN
= 0V
I
OUT
= 0A
Output Peak C u rrent Limi t
vs. Temperat u re
0
3
6
9
12
15
-50 -25 0 25 50 75 100 125
TEM PERATURE (° C)
CURRENT LIMIT ( A)
VIN = 48V
VOUT = 3.3V
VDD = 5V
fSW = 250kHz
Feedback Volt age
vs. Temperature
0.792
0.796
0.800
0.804
0.808
-50 -25 0 25 50 75 100 125
TEMPERATURE (°C)
FEEBACK VO L TAGE (V)
V
IN
= 48V
V
OUT
= 3.3V
V
DD
= 5V
I
OUT
= 0A
Load Regula tion
vs. Temperature
-0.3%
-0.2%
-0.1%
0.0%
0.1%
0.2%
0.3%
0.4%
-50 -25 0 25 50 75 100 125
TEM PERA T URE ( ° C)
LO AD REGULATION (%)
V
IN
= 48V
V
OUT
= 3.3V
V
DD
= 5V
I
OUT
= 0A to 4A
f
SW
= 250kHz
Li ne Regulation
vs. Temperature
-0.3%
-0.2%
-0.1%
0.0%
0.1%
0.2%
0.3%
0.4%
-50 -25 0 25 50 75 100 125
TEM PERATURE (° C)
LINE REG UL ATIO N (%)
V
IN
= 5V to 75V
V
OUT
= 3.3V
V
DD
= 5V
I
OUT
= 0A
Swi tching Frequency
vs. Output Current
100
150
200
250
300
01234
O UT PUT CURRE NT (A )
SW ITCHI NG FREQ UE NCY
(kHz)
V
IN
= 48V
V
OUT
= 3.3V
V
DD
= 5V
R18 = 100k
R19 =100k
-40°C
25°C
125°C
EN Bias Current
vs. Temperature
0
20
40
60
80
100
-50 -25 0 25 50 75 100 125
TEMPERA T URE (°C)
EN BI A S CURRE NT (µA )
V
IN
= 48V
V
DD
= 5V
V
EN
= 0V
Micrel, Inc. MIC28510
March 2012 8 M9999-030912-A
Typical Characteristics (Continued)
Enabl e Threshold
vs. Temperature
0.5
0.6
0.7
0.8
0.9
1.0
-50 -25 0 25 50 75 100 125
TEM PERA TURE ( °C)
ENABLE T HRE SHOLD ( V)
FALLING
RISING
V
IN
= 48V
V
DD
= 5V
Efficiency
vs. Output Current
50
55
60
65
70
75
80
85
90
95
100
01234
O UTP UT CURRENT (A )
EFFICIE NCY ( %)
6V
IN
V
OUT
= 3.3V
V
DD
= 5V
f
SW
= 250kHz
48V
IN
75V
IN
4.5V
IN
Feedback Volt age
vs. Output Current
0.792
0.796
0.800
0.804
0.808
01234
O UTPUT CURRENT (A )
FEEDBACK VOLTAGE (V)
V
IN
= 48V
V
OUT
= 3.3V
V
DD
= 5V
f
SW
= 250kHz
Li ne Regulat i on
vs. Output Current
-0.3%
-0.2%
-0.1%
0.0%
0.1%
0.2%
0.3%
01234
O UTP UT CURRENT (A )
LINE REG ULAT ION (%)
V
IN
= 5V to 75V
V
OUT
= 3.3V
V
DD
= 5V
f
SW
= 250kHz
Ef ficiency (V
IN
= 5V)
vs. O ut put Current
30
40
50
60
70
80
90
100
0123456
O UT PUT CURRE NT (A )
EFFI CI ENCY ( % )
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
f
sw
= 250kHz
Efficiency (VIN = 48V)
vs. Output Current
10
20
30
40
50
60
70
80
90
100
0123456
O UTPUT CURRENT ( A)
EFFICI ENCY (%)
5.0V
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
fSW = 250kHz
Ef ficiency (V
IN
= 75V)
vs. O u tput C urrent
10
20
30
40
50
60
70
80
90
100
0123456
O UT P UT CU RRENT (A )
EFF ICIE NCY (%)
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
f
SW
= 250kHz 0.8V
5.0V
3.3V
Die Temperature* (V
IN
= 5.0V)
vs. Output Current
0
20
40
60
80
01234
O UTP UT CURRENT (A)
DI E T EM P ERATURE ( °C)
V
IN
= 5.0V
V
OUT
= 3.3V
V
DD
= 5V
f
SW
= 250kHz
Di e Temperature* ( V
IN
= 48V)
vs. O utput Current
0
20
40
60
80
01234
O UT PU T CURRE NT (A )
DIE T EM PERATURE ( ° C)
V
IN
= 48V
V
OUT
= 3.3V
V
DD
= 5V
f
SW
= 250kHz
`
Micrel, Inc. MIC28510
March 2012 9 M9999-030912-A
Typical Characteristics (Continued)
Die Temperature* (V
IN
= 75V )
vs. Output C urrent
0
20
40
60
80
100
01234
O UT P UT CURRE NT (A)
DI E TEMPERATURE (° C)
V
IN
= 75V
V
OUT
= 3.3V
V
DD
= 5V
f
SW
= 250kHz
Ef ficiency ( V
IN
=12V)
vs. Output C urrent
30
40
50
60
70
80
90
100
0123456
O UTP UT CURRENT ( A)
EFFI CI ENCY (% )
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
f
SW
= 250kHz
Efficiency (V
IN
= 18V)
vs. Outp ut Current
30
40
50
60
70
80
90
100
0123456
O UT PU T CU RREN T (A )
EFFICIENCY (%)
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
f
SW
= 250kHz
Ef ficiency ( V
IN
= 24V)
vs. Output Current
30
40
50
60
70
80
90
100
0123456
O UTPUT CURRENT (A)
EFF ICI EN CY (%)
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
f
SW
= 250kHz
Thermal De ra ting
0
1
2
3
4
25 40 55 70 85 100
MAXI M UM A MBIENT TEM PERA TURE
(°C)
LOAD CURRENT ( A)
V
IN
= 48V
f
SW
= 250kHz
L = 10µH
T
j_MAX
=125°C
V
OUT
=2.5V
V
OUT
= 3.3V
V
OUT
= 5V
Therma l Derating
0
1
2
3
4
25 40 55 70 85 100
M AXIMUM AMBI ENT T EM PERATURE
(°C)
LO AD CURRENT (A)
V
IN
= 48V
f
SW
= 250kHz
L = 10µH
T
j_MAX
=125°C
V
OUT
= 1.2V
V
OUT
= 0.8V
Thermal D erating
0
1
2
3
4
25 40 55 70 85 100
M AXIM UM AMBIENT TEMPERA TURE
(°C)
LO AD CURRENT (A)
V
IN
= 12V
f
SW
= 250kHz
L = 10µH
T
j_MAX
= 125°C
V
OUT
=3.3V
V
OUT
= 2.5V
V
OUT
= 5V
Th erma l D er atin g
0
1
2
3
4
25 40 55 70 85 100
MAXIMUM AMBIENT TEMPERATURE
(°C)
LOAD CURRENT ( A)
V
IN
= 18V
f
SW
= 250kHz
L = 10µH
T
j_MAX
= 125°C
V
OUT
=3.3V
V
OUT
= 2.5V
V
OUT
= 5V
The rmal De ratin g
0
1
2
3
4
25 40 55 70 85 100
MAXIMUM AMBIENT TEMPERATURE
(°C)
LOAD CURRENT ( A)
V
IN
= 24V
f
SW
= 250kHz
L = 10µH
T
j_MAX
=125°C
V
OUT
=3.3V
V
OUT
= 2.5V
V
OUT
= 5V
Micrel, Inc. MIC28510
March 2012 10 M9999-030912-A
Typical Characteristics (Continued)
Th ermal D erati ng
0
1
2
3
4
25 40 55 70 85 100
MAXI M UM AMBI ENT TEMPERATURE
(°C)
LOAD CURRENT (A)
V
IN
= 12V
f
SW
= 250kHz
L = 10µH
T
j_MAX
= 125°C
V
OUT
= 1.8V
V
OUT
= 0.8V
V
OUT
= 1.2V
Th er mal D er atin g
0
1
2
3
4
25 40 55 70 85 100
MAXIMUM AMBIENT TEMPERATURE
(°C)
LO AD CURRENT (A)
V
IN
= 18V
f
SW
= 250kHz
L = 10µH
T
j_MAX
= 125°C
V
OUT
=1.8V
V
OUT
= 0.8V
V
OUT
= 1.2V
Th ermal D erati ng
0
1
2
3
4
25 40 55 70 85 100
M AXIM UM AMBIENT TEM PERATURE
(°C)
LOAD CURRENT (A)
V
IN
= 24V
f
SW
= 250kHz
L = 10µH
T
j_MAX
= 125°C
V
OUT
= 1.8V
V
OUT
= 0.8V
V
OUT
= 1.2V
Therm al Derating
0
1
2
3
4
25 40 55 70 85 100
MAXIM UM AMBI ENT TEMPERA TURE
(°C)
LO AD CURRENT ( A)
V
OUT
= 12V
f
SW
= 250kHz
L = 27µH
T
j_MAX
= 125°C
24V
IN
48V
IN
Die Temperature*: The temperature measurement was taken at the hottest point on the MIC28510 case mounted on a five–square inch, four–layer,
0.62”, FR–4 PCB with 2 oz. finish copper weight–pre–layer (see Thermal Measurement section). Actual results will depend upon the size of the PCB,
ambient temperature and proximity to other heat–emitting components.
Micrel, Inc. MIC28510
March 2012 11 M9999-030912-A
Functional Characteristics
Micrel, Inc. MIC28510
March 2012 12 M9999-030912-A
Functional Characteristics (Continued)
Micrel, Inc. MIC28510
March 2012 13 M9999-030912-A
Functional Characteristics (Continued)
Micrel, Inc. MIC28510
March 2012 14 M9999-030912-A
Functional Diagram
Figure 1. MIC28510 Block Diag ram
Micrel, Inc. MIC28510
March 2012 15 M9999-030912-A
Functional Description
The MIC28510 is an adaptive ON-time synchronous
step-down DC/DC regulator. It is designed to operate
over a wide input voltage range from, 4.5V to 75V, and
provides a regulated output voltage at up to 4A of output
current. A digitally-modified adaptive ON-time control
scheme is employed in order to obtain a constant-
switching frequency and to simplify the control
compensation. Over current protection is implemented
without the use of an external sense resistor. The device
includes an internal soft-start function which reduces the
power supply input surge current at start-up by
controlling the output voltage rise time.
Theory of Operation
Figure 1 illustrates the block diagram for the control loop
of the MIC28510. The output voltage is sensed by the
MIC28510 feedback pin FB via the voltage divider R1
and R2, and compared to a 0.8V reference voltage VREF
at the error comparator through a low–gain
transconductance (gm) amplifier. If the feedback voltage
decreases and the output of the gm amplifier is below
0.8V, then the error comparator will trigger the control
logic and generate an ON–time period. The ON–time
period length is predetermined by the “FIXED tON
ESTIMATION” circuitry:
SWIN
OUT
ed)ON(estimat fV
V
t
Eq. 1
where VOUT is the output voltage and VIN is the power
stage input voltage and fSW is the switching frequency.
At the end of the ON–time period, the internal high–side
driver turns off the high–side MOSFET and the low–side
driver turns on the low–side MOSFET. The OFF–time
period length depends upon the feedback voltage in
most cases. When the feedback voltage decreases and
the output of the gm amplifier is below 0.8V, the ON-time
period is triggered and the OFF–time period ends. If the
OFF–time period determined by the feedback voltage is
less than the minimum OFF–time tOFF(MIN), which is about
360ns, then the MIC28510 control logic will apply the
tOFF(MIN) instead. The minimum tOFF(MIN) period is required
to maintain enough energy in the boost capacitor (CBST)
to drive the high–side MOSFET.
The maximum duty cycle is obtained from the 360ns
tOFF(MIN):
SS
OFF(MIN)S
t
360ns
1
t
tt
DMAX
Eq. 2
where tS = 1/fSW. It is not recommended to use
MIC28510 with a OFF-time close to tOFF(MIN) during
steady-state operation.
The actual ON–time and resulting switching frequency
will vary with the part–to–part variation in the rise and fall
times of the internal MOSFETs, the output load current,
and variations in the VDD voltage. Also, the minimum tON
results in a lower switching frequency in high VIN to VOUT
applications, such as 75V to 1.0V.
Figure 2 shows the MIC28510 control loop timing during
steady-state operation. During steady-state, the gm
amplifier senses the feedback voltage ripple, which is
proportional to the output voltage ripple and the inductor
current ripple, to trigger the ON–time period. The ON–
time is predetermined by the tON estimator. The
termination of the OFF–time is controlled by the
feedback voltage. At the valley of the feedback voltage
ripple, which occurs when VFB falls below VREF, the OFF
period ends and the next ON–time period is triggered
through the control logic circuitry.
Figure 2. MIC28510 Control Loop Timing
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March 2012 16 M9999-030912-A
Figure 3 shows the operation of the MIC28510 during
load transient. The output voltage drops due to the
sudden load increase, which causes the VFB to be less
than VREF. This will cause the error comparator to trigger
an ON–time period. At the end of the ON–time period, a
minimum OFF–time tOFF(min) is generated to charge CBST
since the feedback voltage is still below VREF. Then, the
next ON–time period is triggered due to the low
feedback voltage. Therefore, the switching frequency
changes during the load transient, but returns to the
nominal fixed frequency once the output has stabilized at
the new load current level. With the varying duty cycle
and switching frequency, the output recovery time is fast
and the output voltage deviation is small in MIC28510
converter.
Figure 3. MIC28510 Load Tran sient Response
Unlike true current–mode control, the MIC28510 uses
the output voltage ripple to trigger an ON–time period.
The output voltage ripple is proportional to the inductor
current ripple if the ESR of the output capacitor is large
enough.
In order to meet the stability requirements, the
MIC28510 feedback voltage ripple should be in phase
with the inductor current ripple and large enough to be
sensed by the gm amplifier and the error comparator.
The recommended feedback voltage ripple is
20mV~100mV. If a low–ESR output capacitor is
selected, then the feedback voltage ripple may be too
small to be sensed by the gm amplifier and the error
comparator. Also, the output voltage ripple and the
feedback voltage ripple are not necessarily in phase with
the inductor current ripple if the ESR of the output
capacitor is very low. In these cases, ripple injection is
required to ensure proper operation. Please refer to
“Ripple Injection” subsection in Application Information of
this datatsheet for more details regarding the ripple
injection technique.
Soft–Start
Soft–start reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC28510 implements an internal digital soft–start
by making the 0.8V reference voltage VREF ramp from 0
to 100% in approximately 6ms with 9.7mV steps.
Therefore, the output voltage is controlled to increase
slowly with a stair–case VFB ramp. Once the soft–start
cycle ends, the related circuitry is disabled to reduce
current consumption. VDD must be powered up at the
same time or after VIN to allow the soft–start function
correctly.
Current Limit
The MIC28510 uses the RDS(ON) of the internal low–side
power MOSFET to sense over–current conditions. This
method will avoid adding cost, use of additional board
space and power losses taken by a discrete current
sense resistor.
In each switching cycle of the MIC28510 converter, the
inductor current is sensed by monitoring the low–side
MOSFET in the OFF period. If the peak inductor current
is greater than 7A, then the MIC28510 turns off the
high–side MOSFET and a soft–start sequence is
triggered. This mode of operation is called “hiccup
mode” and its purpose is to protect the downstream load
in case of a hard short. The current–limit threshold has a
foldback characteristic related to the feedback voltage,
as shown in Figure 4.
Curre n t- L imit Thresho ld
vs. Feedback Vo ltage
0
2
4
6
8
10
12
0.0 0.2 0.4 0.6 0.8 1.0
FEEDBACK VO L TAGE (V)
CURRENT L IMIT THRESHOLD ( A)
VIN = 48V
Figure 4. MIC28510 Current–Limit Foldback Characteristic
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March 2012 17 M9999-030912-A
Internal MOSFET Gate Drive
Figure 1 (the block diagram) shows a bootstrap circuit,
consisting of D1 (a Schottky diode is recommended) and
a capacitor connected from the SW pin to the BST pin
(CBST). This circuit supplies energy to the high–side drive
circuit. Capacitor CBST is charged, while the low–side
MOSFET is on, and the voltage on the SW pin is
approximately 0V. When the high–side MOSFET driver
is turned on, energy from CBST is used to turn the
MOSFET on. As the high–side MOSFET turns on, the
voltage on the SW pin increases to approximately VIN.
Diode D1 is reverse biased and CBST floats high while
continuing to keep the high–side MOSFET on. The bias
current of the high–side driver is less than 10mA so a
0.1F to 1F is sufficient to hold the gate voltage with
minimal droop for the power stroke (high–side switching)
cycle, i.e. BST = 10mA x 4s/0.1F = 400mV. When
the low–side MOSFET is turned back on, CBST is
recharged through D1. A small resistor in series with
CBST, can be used to slow down the turn–on time of the
high–side N–channel MOSFET.
The drive voltage is derived from the PVDD supply
voltage. The nominal low–side gate drive voltage is PVDD
and the nominal high–side gate drive voltage is
approximately PVDD – VDIODE, where VDIODE is the voltage
drop across D1. An approximate 30ns delay between the
high–side and low–side driver transitions is used to
prevent current from simultaneously flowing unimpeded
through both MOSFETs.
Micrel, Inc. MIC28510
March 2012 18 M9999-030912-A
Application Information
Setting the Switching Frequency
The MIC28510 is an adjustable–frequency, synchronous
buck regulator featuring a unique digitally-modified,
adaptive on–time control architecture. The switching
frequency can be adjusted between 100kHz and 500kHz
by changing the resistor divider network consisting of
R18 and R19.
Figure 5. Switching Frequency Adjustment
The following formula gives the estimated switching
frequency:
1918
19
OADJ_SW RR
R
ff
Eq. 3
where fO = switching frequency when R18 is 100k and
R19 being open, fO is typically 450kHz. For more precise
setting, it is recommended to use the graph illustrated
in Figure 6:
Figure 6. Switching Frequency vs. R19
Inductor Selection
Values for inductance, peak, and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine the
peak–to–peak inductor ripple current. Generally, higher
inductance values are used with higher input voltages.
Larger peak–to–peak ripple currents will increase the
power dissipation in the inductor and MOSFETs. Larger
output ripple currents will also require more output
capacitance to smooth out the larger ripple current.
Smaller peak–to–peak ripple currents require a larger
inductance value and therefore a larger and more
expensive inductor. A good compromise between size,
loss and cost is to set the inductor ripple current to be
equal to 20% of the maximum output current. The
inductance value is calculated by Equation 4:
OUT(max)swIN(max)
OUTIN(max)OUT
I20% f V
)V(VV
L
Eq. 4
where:
fSW = Switching frequency
20% = Ratio of AC ripple current to DC output current
VIN(MAX) = Maximum power stage input voltage
The peak–to–peak inductor current ripple is:
L f V
)V(VV
I
swIN(max)
OUTIN(max)OUT
L(pp)
Eq. 5
The peak inductor current is equal to the average output
current plus one half of the peak–to–peak inductor
current ripple.
IL(pk) =IOUT(max) + 0.5 IL(pp) Eq. 6
The RMS inductor current is used to calculate the I2R
losses in the inductor:
12
I
II
2
L(PP)
2
OUT(max)L(RMS) Eq. 7
Micrel, Inc. MIC28510
March 2012 19 M9999-030912-A
Maximizing efficiency requires the proper selection of
core material while minimizing the winding resistance.
The high frequency operation of the MIC28510 requires
the use of ferrite materials for all but the most cost
sensitive applications. Lower cost iron powder cores
may be used but the increase in core loss will reduce the
efficiency of the power supply. This is especially
noticeable at low output power. The winding resistance
decreases efficiency at the higher output current levels.
The winding resistance must be minimized although this
usually comes at the expense of a larger inductor. The
power dissipated in the inductor is equal to the sum of
the core and copper losses. At higher output loads, the
core losses are usually insignificant and can be ignored.
At lower output currents, the core losses can be a
significant contributor. Core loss information is usually
available from the magnetics vendor. Copper loss in the
inductor is calculated by Equation 8:
PINDUCTOR(Cu) = IL(RMS)
2 × RWINDING Eq. 8
The resistance of the copper wire, RWINDING, increases
with the temperature. The value of the winding
resistance used should be at the operating temperature:
PWINDING(Ht) = RWINDING(20°C) × (1 + 0.0042 × (TH – T20°C))
Eq. 9
where:
TH = Temperature of wire under full load
T20°C = Ambient temperature
RWINDING(20°C) = Room temperature winding resistance
(usually specified by the manufacturer)
Output Capacitor Selection
The type of the output capacitor is usually determined by
its equivalent series resistance (ESR). Voltage and RMS
current capability are two other important factors for
selecting the output capacitor. Recommended capacitor
types are ceramic, low–ESR aluminum electrolytic, OS–
CON and POSCAP. The output capacitor’s ESR is
usually the main cause of the output ripple. The output
capacitor ESR also affects the control loop from a
stability point of view.
The maximum value of ESR is calculated:
L(PP)
OUT(pp)
CI
V
ESR OUT Eq. 10
where:
ΔVOUT(pp) = peak–to–peak output voltage ripple
IL(PP) = peak–to–peak inductor current ripple
The total output ripple is a combination of the ESR and
output capacitance. The total ripple is calculated in
Equation 10:
2
CL(PP)
2
SWOUT
L(PP)
OUT(pp) OUT
ESRI
8fC
I
V
Eq. 11
where:
COUT = Output capacitance value
fSW = Switching frequency
As described in the “Theory of Operation” subsection in
Functional Description, the MIC28510 requires at least
20mV peak–to–peak ripple at the FB pin to make the gm
amplifier and the error comparator behave properly. Also,
the output voltage ripple should be in phase with the
inductor current. Therefore, the output voltage ripple
caused by the output capacitors value should be much
smaller than the ripple caused by the output capacitor
ESR. If low–ESR capacitors, such as ceramic capacitors,
are selected as the output capacitors, a ripple injection
method should be applied to provide the enough
feedback voltage ripple. Please refer to the “Ripple
Injection” subsection for more details.
The voltage rating of the capacitor should be 20%
greater for aluminum electrolytic or OS–CON. The
output capacitor RMS current is calculated in Equation
12:
12
I
IL(PP)
(RMS)COUT Eq. 12
The power dissipated in the output capacitor is:
OUTOUTOUT C
2
(RMS)C)DISS(C ESRIP Eq. 13
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March 2012 20 M9999-030912-A
Input Capacitor Selection
The input capacitor for the power stage input VIN should
be selected for ripple current rating and voltage rating.
Tantalum input capacitors may fail when subjected to
high inrush currents, caused by turning the input supply
on. A tantalum input capacitor’s voltage rating should be
at least two times the maximum input voltage to
maximize reliability. Aluminum electrolytic, OS–CON,
and multilayer polymer film capacitors can handle the
higher inrush currents without voltage de–rating. The
input voltage ripple will primarily depend on the input
capacitor’s ESR. The peak input current is equal to the
peak inductor current, so:
VIN = IL(pk) × CESR Eq. 14
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming
the peak–to–peak inductor current ripple is low:
D)(1D)II OUT(MAXCIN(RMS) Eq. 15
The power dissipated in the input capacitor is:
PDISS(CIN) = ICIN(RMS)
2 × CESR Eq. 16
Ripple Injection
The VFB ripple required for proper operation of the
MIC28510 gm amplifier and error comparator is 20mV to
100mV. However, the output voltage ripple is generally
designed as 1% to 2% of the output voltage. For a low
output voltage, such as a 1V, the output voltage ripple is
only 10mV to 20mV, and the feedback voltage ripple is
less than 20mV. If the feedback voltage ripple is so small
that the gm amplifier and error comparator can’t sense it,
then the MIC28510 will lose control and the output
voltage is not regulated. In order to have some amount
of VFB ripple, a ripple injection method is applied for low
output voltage ripple applications.
The applications are divided into three situations
according to the amount of the feedback voltage ripple:
1) Enough ripple at the feedback voltage due to the large
ESR of the output capacitors.
As shown in Figure 7a, the converter is stable without
any ripple injection. The feedback voltage ripple is:
(pp)
LC
21
2
FB(pp) IESR
RR
R
VOUT
Eq. 17
where IL(pp) is the peak–to–peak value of the inductor
current ripple.
2) Inadequate ripple at the feedback voltage due to the
small ESR of the output capacitors.
The output voltage ripple is fed into the FB pin through a
feedforward capacitor CFF in this situation, as shown in
Figure 7b. The typical CFF value is between 1nF and
22nF.
With the feedforward capacitor, the feedback voltage
ripple is very close to the output voltage ripple:
(pp)
LFB(pp) IESRV Eq. 18
3) Virtually no ripple at the FB pin voltage due to the very
low ESR of the output capacitors.
Figure 7a. Enough Ripple at FB
Figure 7b. Inadequate Ripple at FB
Micrel, Inc. MIC28510
March 2012 21 M9999-030912-A
Figure 7c. Invisible Ripp le at FB
In this situation, the output voltage ripple is less than
20mV. Therefore, additional ripple is injected into the FB
pin from the switching node SW via a resistor RINJ and a
capacitor CINJ, as shown in Figure 7c.
The injected ripple is:
f
1
D)-(1DKVV
SW
DIVINFB(PP)
Eq. 19
R1//R2R
R1//R2
K
INJ
DIV
Eq. 20
where:
VIN = Power stage input voltage
D = Duty cycle
fSW = Switching frequency
τ = (R1//R2//RINJ) × CFF
In Equations 19 and 20, it is assumed that the time
constant associated with CFF must be much greater than
the switching period:
1
T
f
1
SW
Eq. 21
If the voltage divider resistors R1 and R2 are in the k
range, a CFF of 1nF to 22nF can easily satisfy the large
time constant requirements. Also, a 100nF injection
capacitor CINJ is used in order to be considered as short
for a wide range of the frequencies.
The process of sizing the ripple injection resistor and
capacitors is:
Step 1. Select CFF to feed all output ripples into the
feedback pin and make sure the large time constant
assumption is satisfied. Typical choice of CFF is 1nF to
22nF if R1 and R2 are in k range.
Step 2. Select RINJ according to the expected feedback
voltage ripple using Equation 22:
D)(1D
f
V
V
KSW
IN
FB(PP)
DIV
Eq. 22
Then the value of Rinj is obtained as:
1)
K
1
((R1//R2)R
DIV
INJ Eq. 23
Step 3. Select CINJ as 100nF, which could be considered
as short for a wide range of the frequencies.
Setting Output Voltage
The MIC28510 requires two resistors to set the output
voltage as shown in Figure 8.
Figure 8. Voltage–Divider Configuration
Micrel, Inc. MIC28510
March 2012 22 M9999-030912-A
The output voltage is determined by Equation 24:
R2
R1
1VV FBO Eq. 24
where, VFB = 0.8V. A typical value of R1 can be between
3k and 10k. If R1 is too large, it may allow noise to be
introduced into the voltage feedback loop. If R1 is too
small, it will decrease the efficiency of the power supply,
especially at light loads. Once R1 is selected, R2 can be
calculated using:
FBOUT
FB
VV
R1V
R2
Eq. 25
The Figure 9 shows the typical input output relationship.
The typical operating point should fall under the non-
grey part of the graph shown in Figure 9. This should be
used in conjunction with the recommended component
values indicated in Table 1 and Bill of Matrials Table.
Figure 9. Output Voltage vs Input Voltage
VOUT (V) VIN (V) L COUT R3
(RINJ) C3
(CINJ)
0.8V to
3.3V
5V to
75V
10H 100F 16.5k 0.1F
5V 5.88V to
75V
10H 100F 10k 0.1F
12V 15V to
75V
27H 2x47F 45.3k 0.1F
24V 30V to
75V
47H 10F+220F 133k 0.1F
Table 1. Recommended Component values
`
The inverting input voltage VINJ is clamped to 1.2V. As
the injected ripple increases, the swing of VINJ will be
clamped. The clamped VINJ reduces the line regulation
because it is reflected back as a DC error on the FB
terminal.
Thermal Measurements
Measuring the IC’s case temperature is recommended to
ensure it is within its operating limits. Although this might
seem like a very elementary task, it is easy to get
erroneous results. The most common mistake is to use
the standard thermal couple that comes with a thermal
meter. This thermal couple wire gauge is large, typically
22 gauge, and behaves like a heatsink, resulting in a
lower case measurement.
Two methods of temperature measurement are using a
smaller thermal couple wire or an infrared thermometer.
If a thermal couple wire is used, it must be constructed
of 36 gauge wire or higher (smaller wire size) to
minimize the wire heat–sinking effect. In addition, the
thermal couple tip must be covered in either thermal
grease or thermal glue to make sure that the thermal
couple junction is making good contact with the case of
the IC. Omega brand thermal couple (5SC–TT–K–36–
36) is adequate for most applications.
Wherever possible, an infrared thermometer is
recommended. The measurement spot size of most
infrared thermometers is too large for an accurate
reading on a small form factor ICs. However, an IR
thermometer from Optris has a 1mm spot size, which
makes it a good choice for measuring the hottest point
on the case. An optional stand makes it easy to hold the
beam on the IC for long periods of time.
Micrel, Inc. MIC28510
March 2012 23 M9999-030912-A
PCB Layout Guidelines
Warning!!! To minimize EMI and output noise, follow
these layout recommendations.
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths. Thickness of the copper planes
is also important in terms of dissipating heat. The 2 oz
copper thickness is adequate from thermal point of view
and also thick copper plain helps in terms of noise
immunity. Keep in mind thinner planes can be easily
penetrated by noise
The following guidelines should be followed to insure
proper operation of the MIC28510 converter.
IC
The 2.2µF ceramic capacitor, which is connected to
the VDD pin, must be located right at the IC. The
VDD pin is very noise sensitive and placement of the
capacitor is very critical. Use wide traces to connect
to the VDD and PGND pins.
The signal ground pin (SGND) must be connected
directly to the ground planes. The SGND and PGND
connection should be done at a single point near the
IC. Do not route the SGND pin to the PGND Pad on
the top layer.
Place the IC close to the point–of–load (POL).
Use fat traces to route the input and output power
lines.
Signal and power grounds should be kept separate
and connected at only one location.
Input Capacitor
Place the input capacitor next to the power pins.
Place the input capacitors on the same side of the
board and as close to the IC as possible.
Keep both the PVIN pin and PGND connections
short.
Place several vias to the ground plane close to the
input capacitor ground terminal.
Use either X7R or X5R dielectric input capacitors.
Do not use Y5V or Z5U type capacitors.
Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the input capacitor.
If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage must be derated by 50%.
In “Hot–Plug” applications, a Tantalum or Electrolytic
bypass capacitor must be used to limit the over–
voltage spike seen on the input supply with power is
suddenly applied.
Inductor
Keep the inductor connection to the switch node
(SW) short.
Do not route any digital lines underneath or close to
the inductor.
Keep the switch node (SW) away from the feedback
(FB) pin.
The CS pin should be connected directly to the SW
pin to accurate sense the voltage across the low–
side MOSFET.
To minimize noise, place a ground plane underneath
the inductor.
The inductor can be placed on the opposite side of
the PCB with respect to the IC. It does not matter
whether the IC or inductor is on the top or bottom as
long as there is enough air flow to keep the power
components within their temperature limits. The
input and output capacitors must be placed on the
same side of the board as the IC.
Output Capacitor
Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
The feedback trace should be separate from the
power trace and connected as close as possible to
the output capacitor. Sensing a long high current
load trace can degrade the DC load regulation.
RC Snubber
Place the RC snubber on either side of the board
and as close to the SW pin as possible.
Micrel, Inc. MIC28510
March 2012 24 M9999-030912-A
Evaluation Board Schematic
Figure 10. Schematic of MIC28510 Evaluation Board
(J9, J10, J11, R13, R15 are for testing purposes)
Micrel, Inc. MIC28510
March 2012 25 M9999-030912-A
Bill of Materials
Item Part Number Manufacturer Description Qty.
C1 EEU–FC2A101B Panasonic(1) 100µF Aluminum Capacitor, SMD, 100V 1
GRM32ER72A225KA35L Murata(2)
C2, C3
C3225X7R2A225KT5 TDK(3)
2.2µF Ceramic Capacitor, X7R, Size 1210, 100V 2
GRM32ER60J107ME20L Murata(2)
C13
12106D107MAT2A AVX(4) 100µF Ceramic Capacitor, X5R, Size 1210, 6.3V 1
06035C104KAT2A AVX(4)
GRM188R71H104KA93D Murata(2)
C6
C1608X7R1H104K TDK(3)
0.1µF Ceramic Capacitor, X7R, Size 0603, 50V 1
GRM188R72A104KA35D Murata(2)
C10
C1608X7S2A104K TDK(3)
0.1µF Ceramic Capacitor, X7R, Size 0603, 100V 1
0805ZC225MAT2A AVX(4)
GRM21BR71A225KA01L Murata(2)
C8, C9
C2012X7R1A225K TDK(3)
2.2µF Ceramic Capacitor, X7R, Size 0805, 10V 2
GRM188R72A102KA01D Murata(2)
C1608X7R2A102K TDK(3)
C11
06031C102KAT2A AVX(4)
1nF Ceramic Capacitor, X7R, Size 0603, 100V 1
GRM188R71H472KA01D Murata(2)
C1608X7R2A472K TDK(3)
C12
06035C472KAT2A AVX(4)
4.7nF Ceramic Capacitor, X7R, Size 0603, 50V 1
GRM21BR71A105KA01L Murata(2)
C16
C2012X7R1A105K TDK(3)
1µF Ceramic Capacitor, X7R, Size 0805, 10V 1
C4, C5, C7,
C14, C15 Open
BAT46W–TP MCC(5)
D1
BAT46W–7–F Diodes Inc.(6)
Small Signal Schottky Diode 1
MMXZ5232B–TP MCC(5)
D2
CMDZ5L6 Central Semi(7)
5.6V Zener Diode 1
L1 DR125–100–R Cooper Bussmann(8) 10µH Inductor, 5.35A RMS, 7A Saturation Current 1
Q1 FCX493 Diodes Inc/ZETEX(6) 100V NPN Transistor 1
R1 CRCW06034R75FKEA
Vishay Dale(9) 4.75 Resistor, Size 0603, 1% 1
R2, R16 CRCW08051R21FKEA Vishay Dale(9) 1.21 Resistor, Size 0805, 1% 2
R3 CRCW060316K5FKEA
Vishay Dale(9) 16.5k Resistor, Size 0603, 1% 1
R4 CRCW060310K0FKEA
Vishay Dale(9) 10k Resistor, Size 0603, 1% 1
R5 CRCW060380K6FKEA
Vishay Dale(9) 80.6k Resistor, Size 0603, 1% 1
R6 CRCW060340K2FKEA
Vishay Dale(9) 40.2k Resistor, Size 0603, 1% 1
Micrel, Inc. MIC28510
March 2012 26 M9999-030912-A
Bill of Materials (Continued)
Item Part Number Manufacturer Description Qty.
R7 CRCW060320K0FKEA Vishay Dale(9) 20k Resistor, Size 0603, 1% 1
R8 CRCW060311K5FKEA Vishay Dale(9) 11.5k Resistor, Size 0603, 1% 1
R9 CRCW06038K06FKEA Vishay Dale(9) 8.06k Resistor, Size 0603, 1% 1
R10 CRCW06034K75FKEA Vishay Dale(9) 4.75k Resistor, Size 0603, 1% 1
R11 CRCW06033K24FKEA Vishay Dale(9) 3.24k Resistor, Size 0603, 1% 1
R12 CRCW06031K91FKEA Vishay Dale(9) 1.91k Resistor, Size 0603, 1% 1
R13 CRCW06030000Z0EAHP Vishay Dale(9) 0 Resistor, Size 0603 1
R14 CRCW080510K0JNEA Vishay Dale(9) 10k Resistor, Size 0805, 1% 1
R15 CRCW060349R9FKEA Vishay Dale(9) 49.9 Resistor, Size 0603, 1% 1
R17 (OPEN) CRCW0603715RFKEA Vishay Dale(9) 715 Resistor, Size 0603, 1%
R18, R19 CRCW0603100KFKEAHP Vishay Dale(9) 100k Resistor, Size 0603, 1% 2
R20 CRCW06032R00FKEA Vishay Dale(9) 2 Resistor, Size 0603, 1% 1
R21 (OPEN) CRCW0603348RFKEA Vishay Dale(9) 348 Resistor, Size 0603, 1%
U1 MIC28510YJL Micrel. Inc.(10) 75V/4A Synchronous Buck DC/DC Regulator 1
Notes:
1. Panasonic: www.panasonic.com.
2. Murata: www.murata.com.
3. TDK: www.tdk.com.
4. AVX: www.avx.com.
5. MCC: www.mccsemi.com.
6. Diodes Inc.: www.diodes.com.
7. Central Semi: www.centralsemi.com.
8. Cooper: www.cooperbussman.com.
9. Vishay Dale : www.vishay.com.
10. Micrel, Inc.: www.micrel.com.
Micrel, Inc. MIC28510
March 2012 27 M9999-030912-A
PCB Layout Recommendations
Figure 11. MIC28510 Evaluation Board Top L ayer
Figure 12. MIC28510 Evaluation Board Mid–Layer 1 (Ground Plane)
Micrel, Inc. MIC28510
March 2012 28 M9999-030912-A
PCB Layout Recommendations (Continued)
Figure 13. MIC28510 Evaluation Board Mid–Layer 2
Figure 14. MIC28510 Evaluation Board Bottom Layer
Micrel, Inc. MIC28510
March 2012 29 M9999-030912-A
Recommended Land Pattern
Red circle indicates Thermal Via. Size and must be connected to GND plane for maximum thermal performance.
Green rectangle (with shaded area) indicates Solder Stencil Opening on exposed pad area.
Blue and Magenta colored pads indicate different potential. DO NOT connect to GND plane.
Thermal Via Via Size/Pitch Solder Stencil Opening/Pitch
Red Circle/Black Pad X 0.300 0.35mm/0.80mm 1.551.20mm/1.75mm
Blue Circle/Black Pad X 0.300 0.35mm/0.80mm 0.801.11mm/1.31mm
Magenta Circle/Black Pad X 0.300 0.35mm/0.80mm 0.501.11mm/1.31mm
Micrel, Inc. MIC28510
March 2012 30 M9999-030912-A
Package Information
28–Pin 5mm 6mm MLF® (JL)
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