SCLS086F - DECEMBER 1982 - REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-A Max ICC SN54HC20 . . . FK PACKAGE (TOP VIEW) 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 2D 2C NC 2B 2A 2Y NC NC 1C NC 1D 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2C NC NC NC 2B 1Y GND NC 2Y 2A 1 1B 1A NC VCC 2D SN54HC20 . . . J OR W PACKAGE SN74HC20 . . . D, DB, N, NS, OR PW PACKAGE (TOP VIEW) 1A 1B NC 1C 1D 1Y GND D Typical tpd = 11 ns D 4-mA Output Drive at 5 V D Low Input Current of 1 A Max NC - No internal connection description/ordering information The 'HC20 devices contain two independent 4-input NAND gates. They perform the Boolean function Y = A * B * C * D or Y = A + B + C + D in positive logic. ORDERING INFORMATION PACKAGE TA PDIP - N SN74HC20N Tube of 50 SN74HC20D Reel of 2500 SN74HC20DR Reel of 250 SN74HC20DT SOP - NS Reel of 2000 SN74HC20NSR HC20 SSOP - DB Reel of 2000 SN74HC20DBR HC20 Tube of 90 SN74HC20PW Reel of 2000 SN74HC20PWR TSSOP - PW -55C -55 C to 125 125C C TOP-SIDE MARKING Tube of 25 SOIC - D -40C -40 C to 85 85C C ORDERABLE PART NUMBER SN74HC20N HC20 HC20 Reel of 250 SN74HC20PWT CDIP - J Tube of 25 SNJ54HC20J SNJ54HC20J CFP - W Tube of 150 SNJ54HC20W SNJ54HC20W LCCC - FK Tube of 55 SNJ54HC20FK SNJ54HC20FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated ! "#$ ! %#&'" ($) (#"! " !%$""! %$ *$ $! $+! !#$! !(( ,-) (#" %"$!!. ($! $"$!!'- "'#($ $!. '' %$$!) %(#"! "%' /0121 '' %$$! $ $!$( #'$!! *$,!$ $() '' *$ %(#"! %(#" %"$!!. ($! $"$!!'- "'#($ $!. '' %$$!) POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SCLS086F - DECEMBER 1982 - REVISED AUGUST 2003 FUNCTION TABLE (each gate) INPUTS A B C D OUTPUT Y H H H H L L X X X H X L X X H X X L X H X X X L H logic diagram (positive logic) 1A 1B 1C 1D 1 2 4 5 6 2A 2B 2C 2D 1Y 9 10 12 13 8 2Y Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCLS086F - DECEMBER 1982 - REVISED AUGUST 2003 recommended operating conditions (see Note 3) SN54HC20 VCC Supply voltage VIH VCC = 2 V VCC = 4.5 V High-level input voltage VCC = 6 V VCC = 2 V VIL VI VO Input voltage NOM MAX 2 5 6 NOM MAX 2 5 6 1.5 3.15 3.15 4.2 4.2 0 VCC = 6 V UNIT V V 0.5 0.5 1.35 1.35 1.8 1.8 VCC VCC VCC = 2 V VCC = 4.5 V Input transition rise/fall time MIN 1.5 0 Output voltage t/v MIN VCC = 4.5 V VCC = 6 V Low-level input voltage SN74HC20 0 VCC VCC 0 1000 1000 500 500 400 400 V V V ns TA Operating free-air temperature -55 125 -40 85 C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL TEST CONDITIONS Ci SN54HC20 SN74HC20 MIN MIN MAX MAX UNIT 2V 1.9 1.998 1.9 1.9 IOH = -20 A 4.4 4.499 4.4 4.4 6V 5.9 5.999 5.9 5.9 IOH = -4 mA IOH = -5.2 mA 4.5 V 3.98 4.3 3.7 3.84 6V 5.48 5.8 5.2 5.34 2V 0.002 0.1 0.1 0.1 IOL = 20 A 4.5 V 0.001 0.1 0.1 0.1 6V 0.001 0.1 0.1 0.1 4.5 V 0.17 0.26 0.4 0.33 6V 0.15 0.26 0.4 0.33 6V 0.1 100 1000 1000 nA 2 40 20 A 10 10 10 pF VI = VIH or VIL VI = VIH or VIL VI = VCC or 0 VI = VCC or 0, TA = 25C MIN TYP MAX 4.5 V IOL = 4 mA IOL = 5.2 mA II ICC VCC IO = 0 6V 2 V to 6 V POST OFFICE BOX 655303 3 * DALLAS, TEXAS 75265 V V 3 SCLS086F - DECEMBER 1982 - REVISED AUGUST 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) TA = 25C TYP MAX SN54HC20 SN74HC20 MIN MIN PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 45 110 165 140 tpd A, B, C, or D Y 4.5 V 14 22 33 28 6V 11 19 28 24 tt Y MIN MAX MAX 2V 27 75 110 95 4.5 V 9 15 22 19 6V 7 13 19 16 UNIT ns ns operating characteristics, TA = 25C PARAMETER Cpd 4 TEST CONDITIONS Power dissipation capacitance No load POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TYP 25 UNIT pF SCLS086F - DECEMBER 1982 - REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point Input VCC 50% 50% 0V CL = 50 pF (see Note A) tPLH In-Phase Output LOAD CIRCUIT 50% 10% tPHL 90% 90% tr Input 50% 10% 90% 90% tr VCC 50% 10% 0 V tPHL Out-of-Phase Output 90% tf VOH 50% 10% VOL tf tPLH 50% 10% tf 50% 10% 90% VOH VOL tr VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. D. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 29-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type 5962-8403901VDA ACTIVE CFP W 14 25 TBD A42 N / A for Pkg Type 84039012A ACTIVE LCCC FK 20 1 TBD Call TI Call TI 8403901CA ACTIVE CDIP J 14 1 TBD Call TI Call TI 8403901DA ACTIVE CFP W 14 1 TBD Call TI Call TI JM38510/65003BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type M38510/65003BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type A42 N / A for Pkg Type SN54HC20J ACTIVE CDIP J 14 1 TBD SN74HC20D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20DT ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20DTE4 ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20DTG4 ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 25 Pb-Free (RoHS) SN74HC20N ACTIVE PDIP N 14 OBSOLETE PDIP N 14 SN74HC20NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) SN74HC20NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) TBD Addendum-Page 1 CU NIPDAU N / A for Pkg Type Call TI Samples (Requires Login) 5962-8403901VCA SN74HC20N3 (3) Call TI CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-260C-UNLIM PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 29-Aug-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) SN74HC20NSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20NSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20PW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20PWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20PWT ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20PWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC20PWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54HC20FK ACTIVE LCCC FK 20 1 TBD SNJ54HC20J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type SNJ54HC20W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type POST-PLATE N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 29-Aug-2012 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54HC20, SN54HC20-SP, SN74HC20 : * Catalog: SN74HC20, SN54HC20 * Military: SN54HC20 * Space: SN54HC20-SP NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Military - QML certified for Military and Defense Applications * Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SN74HC20DR SOIC D 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 6.5 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 9.0 2.1 8.0 16.0 Q1 SN74HC20DT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC20NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN74HC20PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74HC20PWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC20DR SOIC D 14 2500 367.0 367.0 38.0 SN74HC20DT SOIC D 14 250 367.0 367.0 38.0 SN74HC20NSR SO NS 14 2000 367.0 367.0 38.0 SN74HC20PWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74HC20PWT TSSOP PW 14 250 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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