MC1495
OPERATION AND APPLICATIONS INFORMATION
Theory of Operation
o
The MCI 495 is amonolithic, four-quadrant multiplier
which operates on the principle of variable
transconductance. Adetailed theory of operation is covered
in Application Note AN489, Analysis and Basic Operation of
the MC1595, The result of this analysis is that the differential
output current of the multiplier is given by:
1~-lB=Al=R3
where, 1A and IB are the currents into Pins 14 and 2,
respectively, and VX and Vy are the Xand Yinput voltages at
the multiplier input terminals.
DESIGN CONSIDERATIONS
General
The MC1 495 permits the designer to tailor the multiplier to
aspecific application by proper selection of external
components. External components may be selected to
optimize agiven parameter (e.g. bandwidth) which may in
turn restrict another parameter (e.g. maximum output voltage
swing). Each impoflant parameter is discussed in detail in the
following paragraphs.
Linearity, Output Error, ERX or ERY
3dB Bandwidth and Phase Shift
Bandwidth is primarily determined by the load resistors
and the stray multiplier output capacitance and/or the
operational amplifier used to level shift the output. If
wideband operation is desired, low value load resistors
and/or awideband operational amplifier should be used.
Stray output capacitance will depend to alarge extent on
circuit layout. ,*!.
‘*{,1,
>.,:;,,<*,>,.\~q.\\
Phase shift in the multiplier circuit result~~f,m” Iwo
sources: phase shift common to both Xand Y:~am~@ls (due
to the load resistor-output capacitance,:$~~Wentioned
above) and relative phase shift betweep ?M:&’MY channels
(due to differences in transadmitta~~$? i~!he Xand Y
channels). If the input to output p~~w~ is only 0.6°, the
output product of two sine wavqs %,,$hibit avector error of
1YO.A3° relative phase shift ~~eefi~x and Vy results in a
vector error of 50/.. ,,.a<~$j;~ix
.’~.v:),j
Maximum Input vO[t~#~~~.,+V
VX(max), vY(m#~&~@,df voltages must be such that:
‘‘~.t..,
N],v ~~(max) c113 RY
‘~~~-’’’”” Vy(max) <13 Ry
..w~$$,,::,>
ExceedJ8~~i$jaiue will drive one side of the input amplifier
to “cuti&’hnd cause nonlinear operation.
,,$&urre* 13 and II 3are chosen at aconvenient value
,@~~b~~ing power dissipation limitation) between 0.5 mA and
tinearity error is defined as the maximum deviation of $+,2.%mA, approximately 10 mA. Then RX and RY can be
output voltage from astraight line transfer function. It i~ .~J{’:*terMined bY considering the inPut si9nal handling
..~$:.:4.<<$$W
expressed as error in percent of full scale (see figure below). ‘-?h requirements.
Iil: ‘:.”$.
For example, if the m@wdeviation, VE(max), is
+100 mV and the full ..s?~~<$%utput is 10 V, then the
percentage error is: $J~s~ -
~nearit~~~f maybe measured by either of the following
methq.~$$~<,‘“~
,~.... ,‘{’3
,,Y~,:~i@ an X-Y plotter with the circuit shown in Figure 5,
~~~f.~~@tainplots for Xand Ysimilar to the one shown above.
,,,~,.>\\,,>.*>,
~i$?%j2.Use the circuit of Figure 4. This method nulls the level
,!,i~,,
:,’ shifted output of the multiplier with the original input. The
peak output of the null operational amplifier will be equal
to the error voltage, VE (Max).
One source of linearity error can arise from large signal
nonlinearity in the Xand Yinput differential amplifiers. To
avoid introducing error from this source, the emitter
degeneration resistors RX and Ry must be chosen large
●enough so that nonlinear base-emitter voltage variation can
be ignored. Figures 17 and 18 show the error expected from
this source as afunction of the values of RX and Ry with an
operating current of 1,0 mA in each side of the differential
amplifiers fi.e., 13= 113= 1.0 mA).
For VX(max) =Vy(max) =10 ~
RX= Ry>l;;;A -—-l OkQ.
2VX Vy
The equation 1A–IB =—
Rx Ry 13 2VX Vy
is derived from 1A–IB =(Rx +%3 )(Ry +~) IS
2kT
2kT and Ry >> —
with the assumption RX >> —
ql13 q13 “
At TA=+25°C and 113= 13= 1.0 mA,
3T=*T=52Q.
ql13 q13
Therefore, with RX= Ry =10 kQ the above assumption is
valid. Reference to Figure 19 will indicate limitations of
VX(max) or VY(max) due toVI and V7. Exceeding these limits
will cause saturation or “cutoti of the input transistors. See
Step 4of General Design Procedure for further details.
Maximum Output Voltage Swing
The maximum output voltage swing is dependent upon the
factors mentioned below and upon the particular circuit being
considered.
For Figure 20 the maximum output swing is dependent
upon V+ for positive swing and upon the voltage at Pin 1for
negative swing. The potential at Pin 1determines the
quiescent level for transistors Q5, Q6, Q7 and Q8. This
potential should be related so that negative swing at Pins 2or
14 does not saturate those transistors. See General Design
Procedure for further information regarding selection of
these potentials,
MoToRoti ANALOG ICDEVICE DATA 7