PCA9515ADP-T - NXP Semiconductors / Philips Semiconductors

1. General description

The PCA9515A is a CMOS integrated circuit intended for application in I2C-bus and

SMBus systems.

While retaining all the operating modes and features of the I2C-bus system, it permits

extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus

enabling two buses of 400 pF.

The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length.

Using the PCA9515A enables the system designer to isolate two halves of a bus, thus

more devices or longer length can be accommodated. It can also be used to run two

buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the

100 kHz bus is isolated when 400 kHz operation of the other is required.

Two or more PCA9515As cannot be put in series. The PCA9515A design does not

allow this conﬁguration. Since there is no direction pin, slightly different ‘legal’ low voltage

levels are used to avoid lock-up conditions between the input and the output. A ‘regular

LOW’ applied at the input of a PCA9515A will be propagated as a ‘buffered LOW’ with a

slightly higher value. When this ‘buffered LOW’ is applied to another PCA9515A,

PCA9516A or PCA9518/A in series, the second PCA9515A, PCA9516A or PCA9518/A

will not recognize it as a ‘regular LOW’ and will not propagate it as a ‘buffered LOW’ again.

The PCA9510/A, PCA9511/A, PCA9512/A, PCA9513/A, PCA9514/A cannot be used in

series with the PCA9515A, PCA9516A or PCA9518/A, but can be used in series with

themselves since they use shifting instead of static offsets to avoid lock-up conditions.

The output pull-down of each internal buffer is set for approximately 0.5 V, while the input

threshold of each internal buffer is set about 0.07 V lower, when the output is internally

driven LOW. This prevents a lock-up condition from occurring.

2. Features

n2-channel, bidirectional buffer

nI2C-bus and SMBus compatible

nActive HIGH repeater enable input

nOpen-drain input/outputs

nLock-up free operation

nSupports arbitration and clock stretching across the repeater

nAccommodates Standard-mode and Fast-mode I2C-bus devices and multiple masters

nPowered-off high-impedance I2C-bus pins

nOperating supply voltage range of 2.3 V to 3.6 V

n5.5 V tolerant I2C-bus and enable pins

PCA9515A

I2C-bus repeater

Rev. 04 — 11 April 2008 Product data sheet

Product data sheet Rev. 04 — 11 April 2008 2 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

n0 Hz to 400 kHz clock frequency (the maximum system operating frequency may be

less than 400 kHz because of the delays added by the repeater)

nESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per

JESD22-A115, and 1000 V CDM per JESD22-C101

nLatch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

nPackages offered: SO8 and TSSOP8 (MSOP8)

3. Ordering information

[1] Also known as MSOP8.

4. Functional diagram

Table 1. Ordering information

amb

−

C to +85

Type number Topside

mark Package

Name Description Version

PCA9515AD PA9515A SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1

PCA9515ADP 9515A TSSOP8[1] plastic thin shrink small outline package; 8 leads;

body width 3 mm SOT505-1

Fig 1. Functional diagram of PCA9515A

002aad738

PCA9515A

SDA0

SCL0

SDA1

SCL1

VCC

GND

pull-up

resistor

Product data sheet Rev. 04 — 11 April 2008 3 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

5. Pinning information

5.1 Pinning

5.2 Pin description

Fig 2. Pin conﬁguration for SO8 Fig 3. Pin conﬁguration for TSSOP8

(MSOP8)

n.c. VCC

SCL0 SCL1

SDA0 SDA1

GND EN

002aad736

PCA9515AD PCA9515ADP

n.c. VCC

SCL0 SCL1

SDA0 SDA1

GND EN

002aad737

Table 2. Pin description

Symbol Pin Description

n.c. 1 not connected

SCL0 2 serial clock bus 0; open-drain 5 V tolerant I/O

SDA0 3 serial data bus 0; open-drain 5 V tolerant I/O

GND 4 supply ground (0 V)

EN 5 active HIGH repeater enable input (internal pull-up with 100 kΩ)

SDA1 6 serial data bus 1; open-drain 5 V tolerant I/O

SCL1 7 serial clock bus 1; open-drain 5 V tolerant I/O

VCC 8 supply voltage

Product data sheet Rev. 04 — 11 April 2008 4 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

6. Functional description

Refer to Figure 1 “Functional diagram of PCA9515A”.

The PCA9515A integrated circuit contains two identical buffer circuits which enable

I2C-bus and similar bus systems to be extended without degradation of system

performance.

The PCA9515A contains two bidirectional, open-drain buffers speciﬁcally designed to

support the standard LOW-level contention arbitration of the I2C-bus. Except during

arbitration or clock stretching, the PCA9515A acts like a pair of non-inverting, open-drain

buffers, one for SDA and one for SCL.

6.1 Enable

The EN pin is active HIGH with an internal pull-up and allows the user to select when the

repeater is active. This can be used to isolate a badly behaved slave on power-up until

after the system power-up reset. It should never change state during an I2C-bus operation

because disabling during a bus operation will hang the bus and enabling part way through

a bus cycle could confuse the I2C-bus parts being enabled.

The enable pin should only change state when the global bus and the repeater port are in

an idle state to prevent system failures.

6.2 I2C-bus systems

As with the standard I2C-bus system, pull-up resistors are required to provide the logic

HIGH levels on the buffered bus (standard open-collector conﬁguration of the I2C-bus).

The size of these pull-up resistors depends on the system, but each side of the repeater

must have a pull-up resistor. This part designed to work with Standard-mode and

Fast-mode I2C-bus devices in addition to SMBus devices. Standard-mode I2C-bus devices

only specify 3 mA output drive; this limits the termination current to 3 mA in a generic

I2C-bus system where Standard-mode devices and multiple masters are possible. Under

certain conditions higher termination currents can be used.

Please see Application Note

AN255, I

C/SMBus Repeaters, Hubs and Expanders

for

additional information on sizing resistors and precautions when using more than one

PCA9515A/PCA9516A in a system or using the PCA9515A/PCA9516A in conjunction

with the P82B96.

Product data sheet Rev. 04 — 11 April 2008 5 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

7. Application design-in information

A typical application is shown in Figure 4. In this example, the system master is running

on a 3.3 V I2C-bus while the slave is connected to a 5 V bus. Both buses run at 100 kHz

unless the slave bus is isolated and then the master bus can run at 400 kHz. Master

devices can be placed on either bus.

The PCA9515A is 5 V tolerant, so it does not require any additional circuitry to translate

between the different bus voltages.

When one side of the PCA9515A is pulled LOW by a device on the I2C-bus, a CMOS

hysteresis type input detects the falling edge and causes the internal driver on the other

side to turn on, thus causing the other side to also go LOW. The side driven LOW by the

PCA9515A will typically be at VOL = 0.5 V.

In order to illustrate what would be seen in a typical application, refer to Figure 5 and

Figure 6. If the bus master in Figure 4 were to write to the slave through the PCA9515A,

we would see the waveform shown in Figure 5 on bus 0. This looks like a normal I2C-bus

transmission until the falling edge of the 8th clock pulse. At that point, the master releases

the data line (SDA) while the slave pulls it LOW through the PCA9515A. Because the VOL

of the PCA9515A is typically round 0.5 V, a step in the SDA will be seen. After the master

has transmitted the 9th clock pulse, the slave releases the data line.

On the bus 1 side of the PCA9515A, the clock and data lines would have a positive offset

from ground equal to the VOL of the PCA9515A. After the 8th clock pulse the data line will

be pulled to the VOL of the slave device, which is very close to ground in this example. It is

important to note that any arbitration or clock stretching events on bus 1 require that the

VOL of the PCA9515A (see VOL−VILc in Section 9 “Static characteristics”) to be recognized

by the PCA9515A and then transmitted to bus 0.

Fig 4. Typical application

002aad739

VCC

PCA9515A

SDA0 SDA1

SCL0 SCL1

10 kΩ10 kΩ

SDA

SCL

BUS

MASTER

400 kHz SLAVE

100 kHz

SDA

SCL

bus 0 bus 1

5 V

3.3 V

10 kΩ10 kΩ

Product data sheet Rev. 04 — 11 April 2008 6 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

8. Limiting values

Fig 5. Bus 0 waveform

9th clock pulse

VOL of master

VOL of PCA9515A

002aad740

SCL

SDA

Fig 6. Bus 1 waveform

9th clock pulse

VOL of slave

VOL of PCA9515A

002aad741

SCL

SDA

Table 3. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Voltages with respect to pin GND.

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.5 +7 V

Vbus voltage on I2C-bus, SCL or SDA −0.5 +7 V

I DC current any pin - 50 mA

Ptot total power dissipation - 100 mW

Tstg storage temperature −55 +125 °C

Tamb ambient temperature operating in free air −40 +85 °C

Product data sheet Rev. 04 — 11 April 2008 7 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

9. Static characteristics

[1] For operation between published voltage ranges, refer to worst-case parameter in both ranges.

[2] Typical value taken at VCC = 3.3 V and Tamb =25°C.

[3] VIL speciﬁcation is for the ﬁrst LOW level seen by the SDAn/SCLn lines. VILc is for the second and subsequent LOW levels seen by the

SDAn/SCLn lines.

Table 4. Static characteristics (VCC = 3.0 V to 3.6 V)

= 3.0 V to 3.6 V

[1]

; GND = 0 V; T

amb

−

C to +85

C; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ[2] Max Unit

Supplies

VCC supply voltage 3.0 - 3.6 V

ICCH HIGH-level supply current both channels HIGH;

VCC = 3.6 V;

SDAn = SCLn = VCC

- 0.8 5 mA

ICCL LOW-level supply current both channels LOW;

VCC = 3.6 V;

one SDA and one SCL = GND;

other SDA and SCL open

- 1.7 5 mA

ICCLc contention LOW-level supply current VCC = 3.6 V;

SDAn = SCLn = GND - 1.6 5 mA

Input SCLn; input/output SDAn

VIH HIGH-level input voltage 0.7VCC - 5.5 V

VIL LOW-level input voltage [3] −0.5 - +0.3VCC V

VILc contention LOW-level input voltage [3] −0.5 - +0.4 V

VIK input clamping voltage II=−18 mA - - −1.2 V

ILI input leakage current VI= 3.6 V −1-+1µA

IIL LOW-level input current SDAn, SCLn; VI= 0.2 V - - 5 µA

VOL LOW-level output voltage IOL =20µA or 6 mA 0.47 0.52 0.6 V

VOL−VILc difference between LOW-level output

and LOW-level input voltage

contention

guaranteed by design - - 70 mV

Ciinput capacitance VI= 3 V or 0 V - 6 7 pF

Enable

VIL LOW-level input voltage −0.5 - +0.8 V

VIH HIGH-level input voltage 2.0 - 5.5 V

IIL(EN) LOW-level input current on pin EN VI= 0.2 V - −10 −30 µA

ILI input leakage current −1-+1µA

Ciinput capacitance VI= 3.0 V or 0 V - 6 7 pF

Product data sheet Rev. 04 — 11 April 2008 8 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

[1] For operation between published voltage ranges, refer to worst-case parameter in both ranges.

[2] Typical value taken at VCC = 2.5 V and Tamb =25°C.

[3] VIL speciﬁcation is for the ﬁrst LOW level seen by the SDAn/SCLn lines. VILc is for the second and subsequent LOW levels seen by the

SDAn/SCLn lines.

Table 5. Static characteristics (VCC = 2.3 V to 2.7 V)

= 2.3 V to 2.7 V

[1]

; GND = 0 V; T

amb

−

C to +85

C; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ[2] Max Unit

Supplies

VCC supply voltage 2.3 - 2.7 V

ICCH HIGH-level supply current both channels HIGH;

VCC = 2.7 V;

SDAn = SCLn = VCC

- 0.8 5 mA

ICCL LOW-level supply current both channels LOW;

VCC = 2.7 V;

one SDA and one SCL = GND;

other SDA and SCL open

- 1.6 5 mA

ICCLc contention LOW-level supply current VCC = 2.7 V;

SDAn = SCLn = GND - 1.6 5 mA

Input SCLn; input/output SDAn

VIH HIGH-level input voltage 0.7VCC - 5.5 V

VIL LOW-level input voltage [3] −0.5 - +0.3VCC V

VILc contention LOW-level input voltage [3] −0.5 - +0.4 V

VIK input clamping voltage II=−18 mA - - −1.2 V

ILI input leakage current VI= 2.7 V −1-+1µA

IIL LOW-level input current SDAn, SCLn; VI= 0.2 V - - 10 µA

VOL LOW-level output voltage IOL =20µA or 6 mA 0.47 0.52 0.6 V

VOL−VILc difference between LOW-level output

and LOW-level input voltage

contention

guaranteed by design - - 70 mV

Ciinput capacitance VI= 3 V or 0 V - 6 7 pF

Enable

VIL LOW-level input voltage −0.5 - +0.8 V

VIH HIGH-level input voltage 2.0 - 5.5 V

IIL(EN) LOW-level input current on pin EN VI= 0.2 V - −10 −30 µA

ILI input leakage current −1-+1µA

Ciinput capacitance VI= 3.0 V or 0 V - 6 7 pF

Product data sheet Rev. 04 — 11 April 2008 9 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

10. Dynamic characteristics

[1] Typical values taken at VCC = 2.5 V and Tamb =25°C.

[2] Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times.

[1] Typical values taken at VCC = 3.3 V and Tamb =25°C.

[2] Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times.

10.1 AC waveforms

Table 6. Dynamic characteristics (VCC = 2.3 V to 2.7 V)

=2.3V to 2.7V; GND=0V; T

amb

−

Cto+85

C; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ[1] Max Unit

tPHL HIGH-to-LOW propagation delay Figure 7 45 82 130 ns

tPLH LOW-to-HIGH propagation delay Figure 7 [2] 33 113 190 ns

tTHL HIGH to LOW output transition time Figure 7 -57-ns

tTLH LOW to HIGH output transition time Figure 7 [2] - 148 - ns

tsu set-up time EN HIGH before START condition 100 - - ns

thhold time EN HIGH after STOP condition 130 - - ns

Table 7. Dynamic characteristics (VCC = 3.0 V to 3.6 V)

=3.0V to 3.6V; GND=0V; T

amb

−

Cto+85

C; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ[1] Max Unit

tPHL HIGH-to-LOW propagation delay Figure 7 45 68 120 ns

tPLH LOW-to-HIGH propagation delay Figure 7 [2] 33 102 180 ns

tTHL HIGH to LOW output transition time Figure 7 -58-ns

tTLH LOW to HIGH output transition time Figure 7 [2] - 147 - ns

tsu set-up time EN HIGH before START condition 100 - - ns

thhold time EN HIGH after STOP condition 100 - - ns

Fig 7. Propagation delay and transition times

002aad478

3.3 V

tPLH

tTHL

1.5 V 1.5 Vinput

output 20 %

1.5 V 1.5 V 80 %

20 %

80 %

tPHL

tTLH VOL

0.1 V

Product data sheet Rev. 04 — 11 April 2008 10 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

11. Test information

RL= load resistor; 1.35 kΩ

CL= load capacitance includes jig and probe capacitance; 50 pF

RT= termination resistance should be equal to Zo of pulse generators

Fig 8. Test circuit for open-drain outputs

PULSE

GENERATOR

002aad479

VCC

DUT

Product data sheet Rev. 04 — 11 April 2008 11 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

12. Package outline

Fig 9. Package outline SOT96-1 (SO8)

UNIT A

max. A1A2A3bpcD

(1) E(2) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 5.0

4.8 4.0

3.8 1.27 6.2

5.8 1.05 0.7

0.6 0.7

0.3 8

0.25 0.10.25

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

1.0

0.4

SOT96-1

detail X

vMA

(A )

pin 1 index

076E03 MS-012

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.20

0.19 0.16

0.15 0.05 0.244

0.228 0.028

0.024 0.028

0.012

0.010.010.041 0.004

0.039

0.016

0 2.5 5 mm

scale

SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1

99-12-27

03-02-18

Product data sheet Rev. 04 — 11 April 2008 12 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

Fig 10. Package outline SOT505-1 (TSSOP8)

UNIT A1

max. A2A3bpLHELpwyv

ceD(1) E(2) Z(1) θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05 0.95

0.80 0.45

0.25 0.28

0.15 3.1

2.9 3.1

2.9 0.65 5.1

4.7 0.70

0.35 6°

0°

0.1 0.10.10.94

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

0.7

0.4

SOT505-1 99-04-09

03-02-18

0.25

A2A1

(A3)

detail X

vMA

2.5 5 mm0

scale

TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1

1.1

pin 1 index

Product data sheet Rev. 04 — 11 April 2008 13 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

13. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note

AN10365 “Surface mount reﬂow

soldering description”

13.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not

suitable for ﬁne pitch SMDs. Reﬂow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

13.2 Wave and reﬂow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

•Through-hole components

•Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reﬂow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature proﬁle. Leaded packages,

packages with solder balls, and leadless packages are all reﬂow solderable.

Key characteristics in both wave and reﬂow soldering are:

•Board speciﬁcations, including the board ﬁnish, solder masks and vias

•Package footprints, including solder thieves and orientation

•The moisture sensitivity level of the packages

•Package placement

•Inspection and repair

•Lead-free soldering versus SnPb soldering

13.3 Wave soldering

Key characteristics in wave soldering are:

•Process issues, such as application of adhesive and ﬂux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

•Solder bath speciﬁcations, including temperature and impurities

Product data sheet Rev. 04 — 11 April 2008 14 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

13.4 Reﬂow soldering

Key characteristics in reﬂow soldering are:

•Lead-free versus SnPb soldering; note that a lead-free reﬂow process usually leads to

higher minimum peak temperatures (see Figure 11) than a SnPb process, thus

reducing the process window

•Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

•Reﬂow temperature proﬁle; this proﬁle includes preheat, reﬂow (in which the board is

heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder paste

characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classiﬁed in accordance with

Table 8 and 9

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reﬂow

soldering, see Figure 11.

Table 8. SnPb eutectic process (from J-STD-020C)

Package thickness (mm) Package reﬂow temperature (°C)

Volume (mm3)

< 350 ≥ 350

< 2.5 235 220

≥ 2.5 220 220

Table 9. Lead-free process (from J-STD-020C)

Package thickness (mm) Package reﬂow temperature (°C)

Volume (mm3)

< 350 350 to 2000 > 2000

< 1.6 260 260 260

1.6 to 2.5 260 250 245

> 2.5 250 245 245

Product data sheet Rev. 04 — 11 April 2008 15 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

For further information on temperature proﬁles, refer to Application Note

AN10365

“Surface mount reﬂow soldering description”

14. Abbreviations

MSL: Moisture Sensitivity Level

Fig 11. Temperature proﬁles for large and small components

001aac844

temperature

time

minimum peak temperature

= minimum soldering temperature

maximum peak temperature

= MSL limit, damage level

peak

temperature

Table 10. Abbreviations

Acronym Description

CDM Charged-Device Model

CMOS Complementary Metal-Oxide Semiconductor

ESD ElectroStatic Discharge

HBM Human Body Model

I2C-bus Inter-Integrated Circuit bus

MM Machine Model

SMBus System Management Bus

Product data sheet Rev. 04 — 11 April 2008 16 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

15. Revision history

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PCA9515A_4 20080411 Product data sheet - PCA9515A_3

Modiﬁcations: •The format of this data sheet has been redesigned to comply with the new identity guidelines of

NXP Semiconductors.

•Legal texts have been adapted to the new company name where appropriate.

•Section 1 “General description”, 4th paragraph: 5th and 6th sentences re-written

•Table 2 “Pin description”:

–appended “open-drain 5 V tolerant I/O” to the descriptions of SCL0 (pin 2), SDA0 (pin 3),

SDA1 (pin 6), and SCL1 (pin 7)

–appended “(internal pull-up with 100 kΩ)” to the description of EN (pin 5)

•Table 4 “Static characteristics (VCC = 3.0 V to 3.6 V)” and Table 5 “Static characteristics

(VCC = 2.3 V to 2.7 V)”:

–changed parameter description for ICCH from “quiescent supply current, both channels HIGH”

to “HIGH-level supply current” (moved “both channels HIGH” to Conditions column)

–changed parameter description for ICCL from “quiescent supply current, both channels LOW” to

“LOW-level supply current” (moved “both channels LOW” to Conditions column)

–sub-section “Enable”: changed symbol/parameter from “IIL, input current LOW, EN” to “IIL(EN),

LOW-level input current on pin EN”

•Table 6 “Dynamic characteristics (VCC = 2.3 V to 2.7 V)” and Table 7 “Dynamic characteristics

(VCC = 3.0 V to 3.6 V)”:

–changed symbol/parameter from “tSET, Enable to Start condition” to “tsu, set-up time”;

added “EN HIGH before START condition” to Conditions column

–changed symbol/parameter from “tHOLD, Enable after Stop condition” to “th, hold time”;

added “EN HIGH after STOP condition” to Conditions column

•Added SMD package soldering information

•Added Section 14 “Abbreviations”

PCA9515A_3

(9397 750 14098) 20040929 Product data sheet - PCA9515A_2

PCA9515A_2

(9397 750 13709) 20040709 Product data sheet - PCA9515A_1

PCA9515A_1

(9397 98 13237) 20040617 Objective data sheet - -

Product data sheet Rev. 04 — 11 April 2008 17 of 18

NXP Semiconductors PCA9515A

I2C-bus repeater

16. Legal information

16.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Deﬁnitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

16.2 Deﬁnitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the

full data sheet shall prevail.

16.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or

warranties, expressed or implied, as to the accuracy or completeness of such

information and shall have no liability for the consequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/proﬁle/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conﬂict between information in this document and such

terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

16.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

I2C-bus — logo is a trademark of NXP B.V.

17. Contact information

For more information, please visit: http://www.nxp.com

For sales ofﬁce addresses, please send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Deﬁnition

Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development.

Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation.

Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors PCA9515A

I2C-bus repeater

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 11 April 2008

Document identifier: PCA9515A_4

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

18. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Functional description . . . . . . . . . . . . . . . . . . . 4

6.1 Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

6.2 I2C-bus systems . . . . . . . . . . . . . . . . . . . . . . . . 4

7 Application design-in information . . . . . . . . . . 5

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6

9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7

10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9

10.1 AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . 9

11 Test information. . . . . . . . . . . . . . . . . . . . . . . . 10

12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11

13 Soldering of SMD packages . . . . . . . . . . . . . . 13

13.1 Introduction to soldering . . . . . . . . . . . . . . . . . 13

13.2 Wave and reﬂow soldering . . . . . . . . . . . . . . . 13

13.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 13

13.4 Reﬂow soldering. . . . . . . . . . . . . . . . . . . . . . . 14

14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 15

15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16

16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17

16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17

16.2 Deﬁnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17

16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17

17 Contact information. . . . . . . . . . . . . . . . . . . . . 17

18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18