SN74LVC2G14DCKR - TEXAS INSTRUMENTS

October, 2014 − Rev. 14 1Publication Order Number:

MC74HCT14A/D

MC74HCT14A

Hex Schmitt-Trigger

Inverter with LSTTL

Compatible Inputs

High−Performance Silicon−Gate CMOS

The MC74HCT14A may be used as a level converter for interfacing

TTL or NMOS outputs to high−speed CMOS inputs.

The HCT14A is useful to “square up” slow input rise and fall times.

Due to the hysteresis voltage of the Schmitt trigger, the HCT14A finds

applications in noisy environments.

Features

•Output Drive Capability: 10 LSTTL Loads

•TTL/NMOS−Compatible Input Levels

•Outputs Directly Interface to CMOS, NMOS, and TTL

•Operating Voltage Range: 4.5 to 5.5 V

•Low Input Current: 1.0 mA

•In Compliance With the JEDEC Standard No. 7.0 A Requirements

•Chip Complexity: 72 FETs or 18 Equivalent Gates

•NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

•These Devices are Pb−Free, Halogen Free and are RoHS Compliant

PIN 14 = VCC

PIN 7 = GND

Y = A

A1 12Y1

A2 34Y2

A3 56Y3

A4 98Y4

A5 11 10 Y5

A6 13 12 Y6

LOGIC DIAGRAM

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See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

ORDERING INFORMATION

MARKING DIAGRAMS

A = Assembly Location

L, WL = Wafer Lot

Y, YY = Year

W, WW = Work Week

G or G= Pb−Free Package

HCT14AG

AWLYWW

14 HCT

14A

ALYWG

(Note: Microdot may be in either location)

TSSOP−14SOIC−14 NB

TSSOP−14

DT SUFFIX

CASE 948G

SOIC−14 NB

D SUFFIX

CASE 751A

105

VCC

GND

PIN ASSIGNMENT

FUNCTION TABLE

Input

AOutput

MC74HCT14A

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MAXIMUM RATINGS

Symbol Parameter Value Unit

VCC DC Supply Voltage (Referenced to GND) −0.5 to +7.0 V

VIDC Input Voltage (Referenced to GND) −0.5 to VCC + 0.5 V

VODC Output Voltage (Referenced to GND) −0.5 to VCC + 0.5 V

IIK DC Input Diode Current ±20 mA

IOK DC Output Diode Current ±25 mA

IODC Output Sink Current ±25 mA

ICC DC Supply Current per Supply Pin ±50 mA

IGND DC Ground Current per Ground Pin ±50 mA

TSTG Storage Temperature Range −65 to +150 _C

TLLead Temperature, 1 mm from Case for 10 Seconds 260 _C

TJJunction Temperature under Bias +150 _C

qJA Thermal Resistance SOIC

TSSOP 125

170

_C/W

PDPower Dissipation in Still Air at 85_C SOIC

TSSOP 500

450 mW

MSL Moisture Sensitivity Level 1

FRFlammability Rating Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in

VESD ESD Withstand Voltage Human Body Model (Note 1)

Machine Model (Note 2)

Charged Device Model (Note 3)

> 4000

> 300

> 1000

ILatchup Latchup Performance Above VCC and Below GND at 85_C (Note 4) ±300 mA

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be af fected.

1. Tested to EIA/JESD22−A114−A.

2. Tested to EIA/JESD22−A115−A.

3. Tested to JESD22−C101−A.

4. Tested to EIA/JESD78.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

VCC DC Supply Voltage (Referenced to GND) 4.5 5.5 V

VI, VODC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V

TAOperating Temperature, All Package Types −55 +125 _C

tr, tfInput Rise and Fall Time (Figure 1) −(Note 5) ns

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

5. No Limit when VI [ 50% VCC, ICC > 1 mA.

6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.

MC74HCT14A

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DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Temperature Limit

VCC *55_C to 25_Cv85_Cv125_C

Symbol Parameter Test Conditions Volts Min Max Min Max Min Max Unit

VT)max Maximum Positive−Going

Input Threshold Voltage VO = 0.1 V or VCC – 0.1 V

|Iout| ≤ 20 mA4.5

5.5 1.9

2.1 1.9

2.1 V

VT)min Minimum Positive−Going

Input Threshold Voltage VO = 0.1 V or VCC – 0.1 V

|Iout| ≤ 20 mA4.5

5.5 1.2

1.4 1.2

1.4 V

VT*max Maximum Negative−Going

Input Threshold Voltage VO = 0.1 V or VCC – 0.1 V

|Iout| ≤ 20 mA4.5

5.5 1.2

1.4 1.2

1.4

VT*min Minimum Negative−Going

Input Threshold Voltage VO = 0.1 V or VCC – 0.1 V

|Iout| ≤ 20 mA4.5

5.5 0.5

0.6 0.5

0.6

VH max Maximum Hysteresis

Voltage VO = 0.1 V or VCC – 0.1 V

|Iout| ≤ 20 mA4.5

5.5 1.4

1.5 1.4

1.5

VH min Minimum Hysteresis

Voltage VO = 0.1 V or VCC – 0.1 V

|Iout| ≤ 20 mA4.5

5.5 0.4

0.4 0.4

0 4

VOH Minimum High−Level

Output Voltage VI < VT*min

|Iout| ≤ 20 mA4.5

5.5 4.4

5.4 4.4

5.4 V

VI < VT*min

|Iout| ≤ 4.0 mA 4.5 3.98 3.84 3.7

VOL Maximum Low−Level

Output Voltage VI ≥ VT)max

|Iout| ≤ 20 mA4.5

5.5 0.1

0.1 0.1

0.1 V

VI ≥ VT)max

|Iout| ≤ 4.0 mA 4.5 0.26 0.33 0.4

IIK Maximum Input

Leakage Current VI = VCC or GND 5.5 ±0.1 ±1.0 ±1.0 mA

ICC Maximum Quiescent

Supply Current

(per package)

VI = VCC or GND

Iout = 0 mA5.5 1.0 10 40 mA

w*55_C 25_C to 125_C

DICC Additional Quiescent

Supply Current VI = 2.4 V, Any One Input

VI = VCC or GND, Other Inputs

lout = 0 mA

5.5 2.9 2.4 mA

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

AC CHARACTERISTICS (CL = 50 pF; Input tr = tf = 6.0 ns)

Guaranteed Limit

*55_C to 25_Cv85_Cv125_C

Symbol Parameter Test Conditions Figures Min Max Min Max Min Max Unit

tPLH,

tPHL Maximum Propagation

Delay, Input A to Output

Y (L to H)

VCC = 5.0 V ±10%

CL = 50 pF, Input tr = tf = 6.0 ns 1 & 2 32 40 48 ns

tTLH,

tTHL Maximum Output

Transition Time, Any

Output

VCC = 5.0 V ±10%

CL = 50 pF, Input tr = tf = 6.0 ns 1 & 2 15 19 22 ns

Typical @ 25°C, VCC = 5.0 V

CPD Power Dissipation Capacitance, per Inverter (Note 7) 32 pF

7. Used to determine the no−load dynamic power consumption: PD = C PD VCC2f + ICC VCC.

MC74HCT14A

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*Includes all probe and jig capacitance.

CL*

TEST POINT

DEVICE

UNDER

TEST

OUTPUT

Figure 1. Switching Waveforms

Figure 2. Test Circuit

INPUT A

OUTPUT Y

tftr3 V

GND

tPHL

tPLH

tTLH tTHL

2.7 V

1.3 V

0.3 V

90%

1.3 V

10%

ORDERING INFORMATION

Device Package Shipping†

MC74HCT14ADG SOIC−14 NB

(Pb−Free) 55 Units / Rail

NLV74HCT14ADG*

MC74HCT14ADR2G SOIC−14 NB

(Pb−Free) 2500 / Tape & Reel

NLV74HCT14ADR2G*

MC74HCT14ADTR2G TSSOP−14

(Pb−Free) 2500 / Tape & Reel

NLV74HCT14ADTR2G*

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP

Capable.

MC74HCT14A

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PACKAGE DIMENSIONS

TSSOP−14

CASE 948G

ISSUE B

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A4.90 5.10 0.193 0.200

B4.30 4.50 0.169 0.177

C−−− 1.20 −−− 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.50 0.60 0.020 0.024

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH OR GATE BURRS SHALL NOT

EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION SHALL

NOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08

(0.003) TOTAL IN EXCESS OF THE K

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE

DETERMINED AT DATUM PLANE −W−.

____

U0.15 (0.006) T

2X L/2

0.10 (0.004) V S

L−U−

SEATING

PLANE

0.10 (0.004)

−T−

ÇÇÇ

SECTION N−N

DETAIL E

JJ1

ÉÉÉ

DETAIL E

−W−

0.25 (0.010)

PIN 1

IDENT.

U0.15 (0.006) T

−V−

14X REFK

7.06

14X

0.36 14X

1.26

0.65

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

MC74HCT14A

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PACKAGE DIMENSIONS

SOIC−14 NB

CASE 751A−03

ISSUE K

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE PROTRUSION

SHALL BE 0.13 TOTAL IN EXCESS OF AT

MAXIMUM MATERIAL CONDITION.

4. DIMENSIONS D AND E DO NOT INCLUDE

MOLD PROTRUSIONS.

5. MAXIMUM MOLD PROTRUSION 0.15 PER

SIDE.

14 8

0.25 B M

X 45

SEATING

PLANE

0.25 B S

13X

DET AIL A

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

D8.55 8.75 0.337 0.344

E3.80 4.00 0.150 0.157

A1.35 1.75 0.054 0.068

b0.35 0.49 0.014 0.019

L0.40 1.25 0.016 0.049

e1.27 BSC 0.050 BSC

A3 0.19 0.25 0.008 0.010

A1 0.10 0.25 0.004 0.010

M0 7 0 7

H5.80 6.20 0.228 0.244

h0.25 0.50 0.010 0.019

__ __

6.50

14X

0.58

14X

1.18

1.27

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

UBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5817−1050

MC74HCT14A/D

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your loc

Sales Representative

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