CM1205-08CP - ON Semiconductor L.L.C.

January, 2011 − Rev. 4

1Publication Order Number:

CM1205/D

CM1205

8-Channel ESD Protection

Array in Chip Scale Package

Description

The CM1205 transient voltage suppressor array provides a very

high level of protection for sensitive electronic components that may

be subjected to ESD.

The CM1205 will safely dissipate ESD strikes at levels well beyond

the maximum requirements set forth in the IEC 61000−4−2

international standard (Level 4, ±8 kV contact discharge). All I/Os are

rated at ±25 kV using the IEC 61000−4−2 contact discharge method.

Using the MIL−STD−883D (Method 3015) specification for Human

Body Model (HBM) ESD, all pins are protected for contact discharges

to greater than ±30 kV.

The Chip Scale Package format of this device enables extremely

small footprints that are necessary in portable electronics such as

cellular phones, PDAs, internet appliances and PCs. The large solder

bumps allow for standard attachment to laminate boards without the

use of underfill.

The CM1205 features OptiGuardt coating for improved reliability

at assembly and is available with RoHS compliant lead−free finishing.

Features

•Functionally and Pin Compatible with ON Semiconductor’s

PACDN1408 ESD Protection Device

•8 Transient Voltage Suppressors in a Single Package

•OptiguardTM Coated for Improved Reliability at Assembly

•In−system Electrostatic Discharge (ESD) Protection to ±25 kV

Contact Discharge per IEC 61000−4−2 International Standard

•Compact Chip Scale Package (0.65 mm pitch) Format Saves Board

Space and Eases Layout in Space Critical Applications Compared to

Discrete Solutions and Traditional Wire Bonded Packages

•10−bump CSP

•These Devices are Pb−Free and are RoHS Compliant

Applications

•ESD Protection for Sensitive Electronic Equipment

•I/O Port, Keypad and Button Circuitry Protection for Portable Devices

•Wireless Handsets

•Handheld PCs / PDAs

•MP3 Players

•Digital Cameras and Camcorders

•Notebooks

•Desktop PCs

MARKING DIAGRAM

Device Package Shipping†

ORDERING INFORMATION

BLOCK DIAGRAM

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CM1205−08CP CSP

(Pb−Free)

3500/Tape & Reel

120508 = Specific Device Code

WLCSP10

CP SUFFIX

CASE 567BM

120508

A1 A2 A3 A4 A5

B1 B2 B3 B4 B5

CM1205−08CP

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

CM1205

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PACKAGE / PINOUT DIAGRAMS

BOTTOM VIEW

(Bumps Up View)

CM1205−08

10−bump CSP Package

A1 A2 A3 A4 A5

B1 B2 B3 B4 B5

TOP VIEW

(Bumps Down View)

120508

Orientation

Marking +

SPECIFICATIONS

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Rating Units

Storage Temperature Range −65 to +150 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

Table 2. STANDARD OPERATING CONDITIONS

Parameter Rating Units

Operating Temperature Range −40 to +85 °C

Table 3. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)

Sym-

bol

Parameter Conditions Min Typ Max Units

VREV Reverse Standoff Voltage IDIODE= 10 mA6.0 V

ILEAK Leakage Current VIN= 3.3 V DC 100 nA

VSIG Signal Clamp Voltage

Positive Clamp

Negative Clamp

ILOAD= 10mA

5.6

−1.2

6.8

−0.8

8.0

−0.4

VESD In−system ESD Withstand Voltage

a) Human Body Model, MIL−STD−883, Method

3015

b) Contact Discharge per IEC 61000−4−2 Level 4

Note 2

±30

±25

VCL Clamping Voltage during ESD Discharge

MIL−STD−883 (Method 3015), 8 kV

Positive Transients

Negative Transients

Note 2

+12

−8

CChannel Capacitance At 2.5 V DC, f = 1 MHz 39 47 pF

1. TA = 25 °C unless otherwise specified. GND in this document refers to the lower supply voltage.

2. ESD applied to channel pins with respect to GND, one at a time. All other channels are open. All GND pins tied to ground.

CM1205

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APPLICATION INFORMATION

Refer to Application Note ”The Chip Scale Package”, for a detailed description of Chip Scale Packages offered by

ON Semiconductor.

Table 4. PRINTED CIRCUIT BOARD RECOMMENDATIONS

Parameter Value

Pad Size on PCB 0.275 mm

Pad Shape Round

Pad Definition Non−Solder Mask defined pads

Solder Mask Opening 0.350 mm Round

Solder Stencil Thickness 0.125 − 0.150 mm

Solder Stencil Aperture Opening (laser cut, 5% tapered walls) 0.330 mm Round

Solder Flux Ratio 50/50 by volume

Solder Paste Type No Clean

Pad Protective Finish OSP (Entek Cu Plus 106A)

Tolerance − Edge To Corner Ball ±50 mm

Solder Ball Side Coplanarity ±20 mm

Maximum Dwell Time Above Liquidous 60 seconds

Maximum Soldering Temperature 260°C

ÎÎÎÎÎ

Non−Solder Mask Defined Pad

0.275 mm DIA.

Solder Stencil Opening

0.330 mm DIA.

Solder Mask Opening

0.325 mm DIA.

Figure 1. Recommended Non−Solder Mask Defined Pad Illustration

Figure 2. Lead−free (SnAgCu) Solder Ball Reflow Profile

CM1205

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MECHANICAL SPECIFICATIONS

The CM1205−08CP is offered in a 10−bump custom Chip Scale Package (CSP). Dimensions are presented below.

Table 5. CSP TAPE AND REEL SPECIFICATIONS

Part Number Chip Size (mm)

Pocket Size (mm)

B0 X A0 X K0

Tape Width

WReel Diameter

Qty per

Reel P0P1

CM1205−08CP 3.104 X 1.154 X 0.682 3.28 X 1.32 X 0.81 8 mm 178 mm (7″) 3500 4 mm 4 mm

+++

Top

Cover

Tape

For Tape Feeder Reference

Only Including Draft,

Concerning around B.

Embossment P1

User Direction of Feed

Center Lines

of Cavity

10 Pitches Cumulative

Tolerance On Tape

±0.2 mm

CM1205

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PACKAGE DIMENSIONS

WLCSP10, 3.10x1.15

CASE 567BM−01

ISSUE O

SEATING

PLANE

0.05 C

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. COPLANARITY APPLIES TO SPHERICAL

CROWNS OF SOLDER BALLS.

2X DIM

MIN MAX

0.60

MILLIMETERS

D3.10 BSC

b0.34 0.39

e0.65 BSC

0.75

ÈÈ

PIN A1

REFERENCE

A0.05 BC

0.03 C

0.05 C

10X b

12 3

0.05 C

0.23 0.29

1.15 BSC

0.05 C

2X TOP VIEW

SIDE VIEW

BOTTOM VIEW

NOTE 3

A2 0.40 REF

PITCH 0.25

10X

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

0.65

RECOMMENDED

A1 PACKAGE

OUTLINE

PITCH

ÉÉÉÉÉÉÉÉ

OptiGuard Option

OptiGuardt is a trademark of Semiconductor Components Industries, LLC.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

CM1205/D

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

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