19-1024; Rev 0; 10/07 KIT ATION EVALU E L B AVAILA DisplayPort to DVITM/HDMI Level Shifter Features The MAX9406 high-speed, low-skew, quad differential input to current-mode logic (CML) translator features high-speed signal conversion of the DisplayPortTM (DP) to High-Definition Multimedia Interface (HDMITM) technology. This device features ultra-low propagation delay of 350ps and channel-to-channel skew of less than 20ps. The MAX9406 supports typical data rates of 2Gbps. The MAX9406 provides the level shift for HDMI's Display Data Channel (DDC) and hot-plug detection (HPD), which converts the 5V single-ended logic to 3.3V single-ended logic. The MAX9406 operates from a 3V to 3.6V core supply and is specified over the -40C to +85C extended temperature range. This device is available in 48-pin, 7mm x 7mm thin QFN and 32-pin, 5mm x 5mm thin QFN packages. o 500mV Differential HDMI Output at 2Gbps Data Rate o 350ps Propagation Delay o 20ps Channel-to-Channel Skew at 2Gbps o Low Jitters: DJ = 11psP-P and RJ = 0.5psRMS o Bidirectional Level Shifter of 5V to 3.3V for DDC Pins o Level Shifter of 5V to 3.3V for I/Os o Integrated 50 Input Terminations and Biasing o -40C to +85C Operating Temperature Range Ordering Information Applications Level Conversion for DP to HDMI PART TEMP RANGE PIN-PACKAGE PKG CODE MAX9406ETJ+ -40C to +85C 32 Thin QFN-EP* (5mm x 5mm x 0.8mm) T3255-4 MAX9406ETM+ -40C to +85C 48 Thin QFN-EP* (7mm x 7mm x 0.8mm) T4877-6 Data and Clock Driver and Buffer Backplane Data and Clock Distribution Base Stations ATE DVI is a trademark of Digital Display Working Group (DDWG). DisplayPort is a trademark of Video Electronics Standards Association (VESA). HDMI is a trademark of HDMI Licensing, LLC. +Denotes a lead-free package. *EP = Exposed paddle. 20 OUT_D2- 42 19 OUT_D2+ IN_D2+ 28 GND 43 18 GND IN_D3- 29 IN_D3- 44 17 OUT_D3- IN_D3+ 45 16 OUT_D3+ 15 VCC 14 OUT_D4- 13 OUT_D4+ 8 9 10 11 12 N.C. 48 TQFN-EP 7mm x 7mm GND 7 VCC 6 SCL_SRC N.C. 5 SDA_SRC 4 HPD_SRC 3 N.C. 2 GND 1 N.C. 48 EP* VCC IN_D4+ + GND 47 OE 17 14 OUT_D2- 41 46 18 15 OUT_D1+ IN_D2- VCC 19 16 OUT_D1- IN_D2+ IN_D4- 20 IN_D1+ 26 IN_D2- 27 MAX9406 GND VCC 21 13 OUT_D2+ MAX9406 12 OUT_D3- IN_D3+ 30 11 OUT_D3+ IN_D4- 31 EP* + 10 OUT_D4- IN_D4+ 32 9 1 2 3 4 5 6 7 8 GND 21 SCL_SNK 40 22 VCC VCC SDA_SNK OUT_D1+ 23 SCL_SRC 22 HPD_SNK 39 24 IN_D1- 25 SDA_SRC IN_D1+ GND OUT_D1- HPD_SRC GND 23 DDC_EN 24 38 GND 37 VCC GND IN_D1- VCC TOP VIEW 36 35 34 33 32 31 30 29 28 27 26 25 GND OE VCC GND SCL_SNK SDA_SNK HPD_SNK GND DDC_EN VCC N.C. GND TOP VIEW N.C. Pin Configurations OUT_D4+ 32 TQFN-EP 5mm x 5mm *EP EXPOSED PADDLE. CONNECT EP TO GND. *EP EXPOSED PADDLE. CONNECT EP TO GND. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX9406 General Description MAX9406 DisplayPort to DVITM/HDMI Level Shifter ABSOLUTE MAXIMUM RATINGS VCC to GND ..............................................................-0.3V to +4V All Pins to GND...........................................-0.3V to (VCC + 0.3V) Short-Circuit Duration (all outputs).............................Continuous Continuous Power Dissipation (TA = +70C) 32-Pin Thin QFN (derate 21.3mW/C above +70C) .1702mW 48-Pin Thin QFN (derate 27.8mW/C above +70C) .2222mW Junction-to-Case Thermal Resistance (JC) (Note 1) 32-Pin Thin QFN........................................................+1.7C/W 48-Pin Thin QFN........................................................+0.8C/W Junction-to-Ambient Thermal Resistance (JA) (Note 1) 32-Pin Thin QFN.........................................................+29C/W 48-Pin Thin QFN.........................................................+25C/W Operating Temperature Range .......................-40C to +85C Junction Temperature .............................................+150C Storage Temperature Range ........................-65C to +150C ESD Protection Human Body Model (RD = 1.5k, CS = 100pF) IN_D_ and OUT_D_ to GND..........................................1.5kV Lead Temperature (soldering, 10s)............................+300C Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer board. For detailed information on package thermal considerations, refer to Application Note 4083 at www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = 3V to 3.6V, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS OE INPUT Input High Level Input Low Level Input Current VIH1 2.4 V VIL1 IIN-EN 0.5 VIN = 0 to VCC 24 V A DDC_EN INPUT Input High Level VIH1 Input Low Level VIL1 Input Current IIN-DDC 2.4 V 0.5 VIN = 0 to VCC 100 V A HPD INPUT AND OUTPUT Input High Level VIH2 Input Low Level VIL2 Input Current HPD_SNK Pulldown Resistance IIN2 2.4 VIN = 0 to VCC RHPD 40 Output High Level VOH-HPDB 2.5 Output Low Level VOL-HPDB 0 5.3 V 0.8 V 80 A 60 k 0.18 VCC V 0.4 V 50 mV DIFFERENTIAL INPUTS (IN_) Differential Input High Threshold VIDH VID = VIN+ - VIN- Differential Input Low Threshold VIDL VID = VIN+ - VIN- Common Input Voltage Common-Mode AC Tolerance Differential Input Termination 2 VCOM VCOD = DC Avg [(VIN+ + VIN-) / 2] -50 0 mV 1.43 VCM_AC_P-P VCM_AC_P-P = (VIN+ + VIN-) / 2 - VCOD RIN 40 _______________________________________________________________________________________ 2 V 100 mV 60 DisplayPort to DVITM/HDMI Level Shifter MAX9406 DC ELECTRICAL CHARACTERISTICS (continued) (VCC = 3V to 3.6V, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIFFERENTIAL OUTPUTS (OUT_) Single-Ended Output Swing VOSW With a 50 load to VCC at both pins 450 600 mV Single-Ended Output High VOH3 With a 50 load to VCC at both pins VCC 10mV VCC + 10mV mV Single-Ended Output Low VOL3 With a 50 load to VCC at both pins VCC 600mV VCC 400mV V Single-Ended Output Current in High-Z IOFF -10 +10 A Output Short-Circuit Current IOS Output pins connected to VCC or GND -20 +20 mA ICC Includes 4 channels CML termination supply current, OE = 0 77 IPD OE = 1 5 POWER CONSUMPTION Supply Current 90 mA AC ELECTRICAL CHARACTERISTICS (VCC = 3V to 3.6V, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIFFERENTIAL SIGNAL Maximum Data Rate rD Differential Propagation Delay tPD 1.85 350 500 Gbps ps Channel-to-Channel Skew tSK 20 50 ps Output Rise/Fall Time tR/F 515 ps Added Random Jitter tRJ 1GHz clock input 0.5 1 psRMS Added Deterministic Jitter tDJ rD = 2Gbps, 223 - 1 PRBS pattern 11 30 psP-P 400 kHz 20 ns 200 ns 180 SINGLE-ENDED SIGNAL CLK Frequency fSCK HPD_SRC Rise/Fall Time tRF-HPDB HPD Propagation Delay tHPD Supports I2C fast mode 1 Note 2: AC parameters are guaranteed by design and characterization. _______________________________________________________________________________________ 3 Typical Operating Characteristics (VCC = 3.3V, outputs terminated with 50, TA = +25C, unless otherwise noted.) SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX9406 toc02 +85C 84 EYE DIAGRAM MAX9406 toc01 85 1.65Gbps PRBS +25C 83 ICC (mA) MAX9406 DisplayPort to DVITM/HDMI Level Shifter 50mV/div 82 -40C 81 80 79 3.0 3.2 3.4 3.6 200ps/div VCC (V) 4 _______________________________________________________________________________________ DisplayPort to DVITM/HDMI Level Shifter PIN NAME FUNCTION 32-PIN TQFN 48-PIN TQFN 1, 3, 8, 18, 22 1, 5, 12, 18, 24, 27, 31, 36, 37,43 GND Ground 2, 7, 24 2, 11, 15, 21, 26, 33, 40, 46 VCC Power-Supply Input. Bypass VCC to GND with 0.1F and 0.01F capacitors as close to the supply pins as possible. -- 3, 4, 6, 10, 34, 35 N.C. No Connection. Not internally connected; leave unconnected. 4 7 HPD_SRC Hot-Plug Detection at 3.3V Logic 5 8 SDA_SRC Serial Data Line. I2C data line at 3.3V logic. 6 9 SCL_SRC Serial Clock Line. I2C clock line at 3.3V logic. 9 13 OUT_D4+ Differential Output Port 4+ 10 14 OUT_D4- Differential Output Port 4- 11 16 OUT_D3+ Differential Output Port 3+ 12 17 OUT_D3- Differential Output Port 3- 13 19 OUT_D2+ Differential Output Port 2+ 14 20 OUT_D2- Differential Output Port 2- 15 22 OUT_D1+ Differential Output Port 1+ 16 23 OUT_D1- Differential Output Port 1- 17 25 OE 19 28 SCL_SNK Serial Clock Line. I2C clock line at 5V logic. 20 29 SDA_SNK Serial Data Line. I2C data line at 5V logic. 21 30 HPD_SNK Hot-Plug Detection at +5V Logic 23 32 DDC_EN 25 38 IN_D1- Differential Input Port 1- 26 39 IN_D1+ Differential Input Port 1+ 27 41 IN_D2- Differential Input Port 2- 28 42 IN_D2+ Differential Input Port 2+ 29 44 IN_D3- Differential Input Port 3- 30 45 IN_D3+ Differential Input Port 3+ 31 47 IN_D4- Differential Input Port 4- 32 48 IN_D4+ -- -- EP Output Enable. Drive OE low to enable the outputs. Drive OE high to disable the outputs. DDC Link Enable Differential Input Port 4+ Exposed Paddle. Connect EP to ground. _______________________________________________________________________________________ 5 MAX9406 Pin Description DisplayPort to DVITM/HDMI Level Shifter MAX9406 Functional Diagram VCC GND OE DDC_EN VT 50 x2 IN_D1- OUT_D1- IN_D1+ OUT_D1+ VT 50 x2 IN_D2- OUT_D2- IN_D2+ OUT_D2+ High-Speed Signal Enables OE controls the power through the entire length of the four high-speed signal paths. Setting OE low enables all of the high-speed signal paths. Setting OE high disables all high-speed links and disconnects the internal biasing supply and brings the device to the low-power state. In the low-power state, however, the DDC and HPD ports are still functioning. Display Data Channel (DDC) The MAX9406 allows the translation between 5V and 3V of the lower speed DDC lines. Whenever one side is pulled to GND, the other side follows and vice versa. DDC_EN controls the gating to the DDC link. Setting DDC_EN high enables data to pass through the DDC, while setting DDC_EN low disables the DDC link. VT Hot-Plug Detection (HPD) 50 x2 The MAX9406 translates the HPD 5V logic into 3V logic. IN_D3- OUT_D3- IN_D3+ OUT_D3+ DVI/HDMI Driver VT 50 x2 IN_D4- OUT_D4- IN_D4+ OUT_D4+ SDA_SRC SCK_SRC DDC LEVEL SHIFTER SDA_SNK SCK_SNK HPD_SRC HPD BUFFER HPD_SNK 60k MAX9406 Detailed Description The MAX9406 high-speed, low-skew, quad differential input to CML translator is designed for high-speed signal conversion of the DP to HDMI technology. This device features ultra-low propagation delay of 350ps and channel-to-channel skew of less than 20ps. The MAX9406 supports typical data rates of 2Gbps. The MAX9406 provides the level shift for HDMI's DDC and HPD, which converts the 5V single-ended logic to 3.3V single-ended logic. 6 Applications Information The MAX9406 can be used as the driver for the HDMI signal on the motherboard. The MAX9406 CML output provides a > 400mV differential HDMI output and supports 3.3V pullup at the differential outputs. The level shifter boosts the differential signal from the graphics chip to the HDMI connector, located on the edge of the motherboard. High-Speed Signal Line Enable/Disable The MAX9406 allows use of the DDC lines independent of the state of the high-speed signal lines and the OE pin. This allows communication through DDC without any high-speed signals. Output Termination Terminate CML outputs through 50 to VCC or use an equivalent Thevinin termination. Terminate both outputs and use identical terminations on each for the lowest output-to-output skew. Power-Supply Bypassing Adequate power-supply bypassing is necessary to maximize the performance and noise immunity. Bypass VCC to GND with high-frequency surface-mount 0.01F ceramic capacitors as close to the device as possible. Use multiple bypass vias for connection to minimize inductance. _______________________________________________________________________________________ DisplayPort to DVITM/HDMI Level Shifter Exposed Paddle The thin QFN packages used for the MAX9406 have exposed paddles on the bottom. Connect the exposed paddle to ground using a landing pad large enough to accommodate the entire exposed paddle. Add vias from the exposed paddle's land area to a copper polygon on the other side of the PCB to provide lower thermal impedance from the MAX9406 to the ambient air. Chip Information PROCESS: BiPolar _______________________________________________________________________________________ 7 MAX9406 Printed-Circuit Board (PCB) Traces Input and output trace characteristics affect the performance of the MAX9406. Connect each of the inputs and outputs to a 50 characteristic impedance trace. Avoid discontinuities in differential impedance and maximize common-mode noise immunity by maintaining the distance between differential traces, avoiding sharp corners. Minimize the number of vias to prevent impedance discontinuities. Reduce reflections by maintaining the 50 characteristic impedance through connectors and across cables. Minimize skew by matching the electrical length of the traces. Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 32, 44, 48L QFN.EPS MAX9406 DisplayPort to DVITM/HDMI Level Shifter 8 _______________________________________________________________________________________ DisplayPort to DVITM/HDMI Level Shifter _______________________________________________________________________________________ 9 MAX9406 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) QFN THIN.EPS MAX9406 DisplayPort to DVITM/HDMI Level Shifter 10 ______________________________________________________________________________________ DisplayPort to DVITM/HDMI Level Shifter Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11 (c) 2007 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. MAX9406 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)