UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
LOW- POWER, DUAL-OUTPUT,
CURRENT-MODE PWM CONTROLLER
1
www.ti.com
FEATURES
DBiCMOS Version of UC3846 Family
D1.4-mA Maximum Operating Current
D100-μA Maximum Startup Current
D±0.5-A Peak Output Current
D125-ns Circuit Delay
DEasier Parallelability
DImproved Benefits of Current Mode Control
DESCRIPTION
The UCC3806 family of BiCMOS PWM controllers
offers exceptionally improved performance with a
familiar architecture. With the same block diagram
and pinout of the popular UC3846 series, the
UCC3806 line features increased switching
frequency capability while greatly reducing the
bias current used within the device. With a typical
startup current of 50 μA and a well defined voltage
threshold for turn-on, these devices are favored
for applications ranging from off-line power
supplies to battery operated portable equipment.
Dual high-current, MOSFET driving outputs and a
fast current sense loop further enhance device
versatility.
All the benefits of current mode control including
simpler loop closing, voltage feed-forward,
parallelability with current sharing, pulse-by-pulse
current limiting, and push/pull symmetry
correction are readily achievable with the
UCC3806 series.
These devices are available in multiple package
options for both through-hole and surface mount
applications; and in commercial, industrial, and
military temperature ranges.
The UCC1806 is specified for operation from
-- 5 5 °C to 125°C, the UCC2806 is specified for
operation from --40°Cto85°C, and the UCC3806
is specified for operation from 0°Cto70°C.
SIMPLIFIED APPLICATION DIAGRAM
2
8
5
1
6
11
14
16
INV
AOUT
BOUT
VREF
CT
NI
CURLIM
UCC3806
10
9
SYNC
RT 4CS+
VIN
15 13
VC
7COMP
CS--
312
GND
UC39431
+VIN
+VOUT
SHUT
DOWN
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright ©1999 -- 2006, Texas Instruments Incorporated
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
2www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
UCx806 UNIT
Supply voltage, VIN VIN, low impedance 15 V
Supply current, IIN VIN, high impedance 25 mA
Output supply voltage VC 18 V
Continuous source or sink ±200
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Gate drive ±500
m
A
Output current SYNC ±30 m
A
COMP ±10 to --(self-limiting)
Analog input voltage range CS--, CS+, NI, INV, SHUTDOWN --0.3to(V
IN +0.3) V
Storage temperature, Tstg --65 to 150 °C
Operating temperature, TJ--55 to 150 °C
Lead temperature, Tsol, 1,6 mm (1/16 inch) from case for 10 seconds 300 °C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is
not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to
GND. Currents are positive into and negative out of, the specified terminal.
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
Input voltage, VIN 8.0 14.5 V
UCC1806 -- 5 5 125
Operating junction temperature, TJUCC2806 -- 4 0 85 °C
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UCC3806 070
C
PACKAGE DESCRIPTION
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CURLIM
VREF
CS--
CS+
NI
INV
COMP
CT
SHUTDOWN
VIN
BOUT
VC
GND
AOUT
SYNC
RT
D, DW, J, M, N OR PW PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
BOUT
VC
N/C
GND
AOUT
CS--
CS+
N/C
NI
INV
Q OR L PACKAGE
(TOP VIEW)
VREF
CURLIM
NC
RT
SYNC
SHUTDOWN
VIN
COMP
CT
N/C
N/C -- No connection
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
3
www.ti.com
ORDERING INFORMATION
PACKAGED DEVICES TA=T
J
DESIGNATOR TYPE OPTION QUANTITY -- 5 5 °C to 125°C-- 4 0 °Cto85°C 0°Cto70°C
D
S
O
I
C
1
6
Tube 40 – UCC2806D –
DSOIC--16 Reeled 2,500 –UCC2806DTR –
D
W
S
O
I
C
W
1
6
Tube 40 –UCC2806DW UCC3806DW
DW SOICW--16 Reeled 2,000 –UCC2806DWTR UCC3806DWTR
JCDIP--16 Tube 25 UCC1806J UCC2806J UCC3806J
LCLCC--20 Tube 55 UCC1806L – –
MSSOP--16 Reeled 2,500 –UCC2806MTR –
NPDIP--16 Tube 25 – UCC2806N UCC3806N
P
W
T
S
S
O
P
1
6
Tube 90 –UCC2806PW UCC3806PW
PW TSSOP--16 Reeled 2,000 –UCC2806PWTR UCC3806PWTR
Q
P
L
C
C
2
0
Tube 46 – UCC2806Q UCC3806Q
QPLCC--20 Reeled 1,000 –UCC2806QTR UCC3806QTR
ELECTRICAL CHARACTERISTICS
VIN =12V,R
T=33kΩ,C
T= 330 pF, CBYPASS on VREF =0.01μF, -- 55°C<T
A< 125°C for the UCC1806, --40°C<T
A<85°Cforthe
UCC2806, 0°C<T
A<70°C for the UCC3806, and TA=T
J(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
REFERENCE
V
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E
F
Su
p
p
l
y
,UVLO,turn-on
UCC1806
UCC2806 5.02 5.10 5.17
V
V
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,
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UCC3806 5.00 5.10 5.20
V
Load regulation 0.2 mA ≤IOUT ≤5mA 325
m
V
Total output variation (1)(2) Line, load, temperature --150 150 m
V
Output noise voltage (2) 10 Hz ≤fOSC ≤10 kHz, TJ=25°C70 μV
Long term stability (2) TA= 125°C, 1000 hours 525 mV
Output short circuit -- 1 0 -- 3 0 mA
OSCILLATOR
Initial accuracy TJ=25°C42 47 52 kHz
Temperature stability (2) T(min) ≤TA≤T(max) 2%
Amplitude 2.35 V
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S
Y
N
C
UCC1806
UCC2806
VCT =0V, V
RT =V
REF
0.8 V ≤VSYNC ≤2.0 V 50 125
n
s
tDELAY Delay-to-output time, S
Y
NC
UCC3806 VCT =0V, V
RT =V
REF
0.8 V ≤VSYNC ≤2.0 V 50 100
ns
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
4www.ti.com
ELECTRICAL CHARACTERISTICS
VIN =12V,R
T=33kΩ,C
T= 330 pF, CBYPASS on VREF =0.01μF, -- 55°C<T
A< 125°C for the UCC1806, --40°C<T
A<85°Cforthe
UCC2806, 0°C<T
A<70°C for the UCC3806, and TA=T
J(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OSCILLATOR (continued)
IDCHG Discharge current TJ=25°C, VCT =2.0V 2.5 mA
VOL Low-level output voltage, SYNC IOUT =1mA 0.4
VOH High-level output voltage, SYNC IOUT =--4mA 2.4
V
VIL Low-level input voltage, SYNC VCT =0V, V
RT =V
REF 0.8
V
VIH High-level input voltage, SYNC VCT =0V, V
RT =V
REF 2.0
ISYNC Input current, SYNC -- 1 1μA
ERROR AMPLIFIER
In
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f
set volta
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UCC1806
UCC2806 5m
V
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UCC3806 10
m
V
IBIAS Input bias current -- 1 μA
IOFSET Input offset current 500 nA
CMR Common mode range(1) 0 VIN-- 2 V
AVOL Open loop gain 1V≤VOUT ≤4V 80 100 dB
GBW bandwidth 1MHz
ICOMP_SINK Output sink current VID <--20mV, V
COMP =1V 1mA
ICOMP_SRC Output source current VID <20mV, V
COMP =3V -- 8 0 --120 μA
VCOMP_L Low-level output voltage VID =--50mV 0.5
V
VCOMP_H High-level output voltage VID =--50mV 4.5
V
CURRENT SENSE AMPLIFIER
AAmplifier gain(3)(4) VCS-- =0V, V
CURLIM =V
REF 2.75 3.00 3.35 V/V
Maximum differential input signal (VCS+
-- V CS--)
VCURLIM =V
NI =V
REF,
VINV =0V 1.1 V
In
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set volta
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UCC1806
UCC2806 VCURLIM =0.5V, V
COMP = OPEN 10 30 mV
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UCC3806 VCURLIM =0.5V, V
COMP = OPEN 10 50 mV
CMRR Common mode rejection ratio 0V≤VCM ≤(VIN -- 3 . 5 V ) 60 dB
PSRR Power supply rejection ratio 56 dB
IBIAS Input bias current (3) VCURLIM =0.5V, V
COMP = OPEN -- 1 μA
Input offset current (3) VCURLIM =0.5V, V
COMP = OPEN 1μA
Delay-to-output time (5)
VNI =V
REF, VINV =0V,
VCURLIM =2.75V,
(VCS+ -- V CS--)= 0Vto1.5Vstep
125 175 ns
CURRENT LIMIT ADJUST
Current limit offset VCS-- =V
CS+ =0V, V
COMP = OPEN 0.4 0.5 0.6 V
IBIAS Input bias current 1
Minimum latching current 300 200 μA
Maximum non-latching current 200 80
μ
A
(1) Line range = 10 V to 15 V, load range = 0.2 mA to 5 mA
(2) Ensured by design. Not production tested.
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
5
www.ti.com
ELECTRICAL CHARACTERISTICS
VIN =12V,R
T=33kΩ,C
T= 330 pF, CBYPASS on VREF =0.01μF, -- 55°C to 125°C for the UCC1806, --40°C<T
A<85°C for the UCC2806,
0°C<T
A<70°C for the UCC3806, and TA=T
J(unless otherwise noted)
SHUTDOWN TERMINAL
Threshold volta
g
e
UCC1806
UCC2806 0.94 1.00 1.06
V
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UCC3806 0.9 1.0 1.1 V
Input voltage range 0 VIN
tDLY Delay-to-output time 0V≤VSHUTDOWN ≤1.3 V 75 150 ns
OUTPUT
Output supply voltage 2.5 15.0
UCC1806 ISINK =20mA 100 300
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U
C
C
1
8
0
6
UCC2806 ISINK = 100 mA 0.4 1.1
Low-level output voltage
U
C
C
3
8
0
6
ISINK =20mA 100 200 V
UCC3806 ISINK = 100 mA 0.4 1.1
V
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ISRC =--20mA 11.6 11.9
High-level output voltage ISRC = --100 mA 11.0 11.6
tRISE Rise time TJ=25°C, CLOAD = 1000 pF 35 65
n
s
tFALL Fall time TJ=25°C, CLOAD = 1000 pF 35 65 ns
UNDERVOLTAGE LOCKOUT (UVLO)
VSTART Startup threshold voltage 6.5 7.5 8.0 V
Threshold hysteresis 0.75 V
ISTART Startup current VIN <V
START 50 100 μA
I Operating supply current 1.0 1.4 mA
VIN shunt voltage IVIN =10mA 15.0 17.5
(1) Line range = 10 V to 15 V, load range = 0.2 mA to 5 mA
(2) Ensured by design. Not production tested.
(3) Parameters measured at trip point of latch with VNI =VREF,V
INV =0V.
(4) Amplifier gain defined as: G = delta change at COMP /delta change forced at CS+ delta voltage at CS+ = 0 to 1V
(5) Current-sense amplifier output is slew rate limited to provide noise immunity.
THERMAL RESISTANCE TABLE
PACKAGE
DESIGNATOR PACKAGE TYPE θJC
(°C/W)
θJA
(°C/W)
DSOIC--16 35 50 to 120(1)
DW SOICW--16 27 50 to 100(1)
JCDIP--16 28 80 to 120
LCLCC--20 20 70 to 80
MSSOP--16 38 144 to 172(2)
NPDIP--16 45 90(1)
PW TSSOP--16 15 123 to 147(2)
QPLCC--20 34 43 to 75(1)
(1) Specified θJA (junction to ambient) is for devices mounted to 5 in2FR4 PC board
with one ounce copper where noted. When resistance range is given, lower values
are for 5 in2aluminum PC board. Test PWB was 0.062 in thick and typically used
0.635 mm trace widths for power packages and 1.3 mm trace widths for non-power
packages with a 100x100 mil probe land area at the end of each trace.
(2) Modeled data. If value range given for θJA, the lower value is for 3x3 inch1 oz
internal copper ground plane, and the higher value is for 1x1 inch ground plane. All
model data assumes only one trace for each non-fused lead.
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
6www.ti.com
TERMINAL FUNCTIONS
TERMINAL
PACKAGES
I
/
O
D
E
S
C
R
I
P
T
I
O
N
NAME D/DW/J/M
/N/PW L,Q
I
/
O
D
E
S
C
R
I
P
T
I
O
N
AOUT 11 14
O
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S
F
E
T
s
BOUT 14 18 OHigh-current gate drive
f
or the e
x
ternal MOSFETs
COMP 7 9 O Output of the error amplifier
CS-- 3 4 I Inverting input of the 3×, differential current sense amplifier
CS+ 4 5 I Non-inverting input of the 3×, differential current sense amplifier
CT 810 IOscillator timing capacitor connection point
CURLIM 1 2 I Programs the primary current limit threshold that determins latching or retry after an
overcurrent situation
GND 12 15 -- Reference ground and power ground for all functions of this device
INV 6 8 I Inverting input of the error amplifier.
NI 5 7 I Non-nverting input of the error amplifier.
RT 912 IConnection point for the oscillator timing resistor
SHUTDOWN 16 20 IProvided for enhanced protection. When SHUTDOWN is driven above 1 V, AOUT and
BOUT are forced low.
SYNC 10 13 I/O Allows providing external synchronization with TTL compatible thresholds.
VC 13 17 IInput supply connection for the FET drive outputs.
VIN 15 19 IInput supply connection for this device.
VREF 2 3 O Reference output.
DETAILED PIN DESCRIPTIONS
AOUT and BOUT: AOUT and BOUT provide alternating high current gate drive for the external MOSFETs. Duty
cycle can be varied from 0% to 50% where minimum dead time is a function of CT. Both outputs use MOS
transistor switches with inherent anti-parallel body diodes to clamp voltage swings to the supply rails, allowing
operation without the use of clamp diodes.
COMP: COMP is the output of the error amplifier and the input of the PWM comparator. The error amplifier is
a low output impedance, 2-MHz operational amplifier which allows sinking or sourcing of current at the COMP
pin. The error amplifier is internally current limited, so that zero duty cycle can be commanded by externally
forcingCOMPtoGND.
CS--: CS-- is the inverting input of the 3×differential current sense amplifier.
CS+: CS+ is the non-inverting input of the 3×differential current sense amplifier.
CT: CT is the oscillator timing capacitor connection point, which is charged by the current set by RT. CT is
discharged to GND through a 2.5-mA current sink. This causes a linear discharge of CT to 0 V which then
initiates the next switching cycle. Dead time occurs during the discharge of CT, forcing AOUT and BOUT low.
Switching frequency (fS) and dead time (tD) are approximated by:
fS=1
1.96 ×RT×CT+tD
and tD=956 ×CT(1)
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
7
www.ti.com
DETAILED PIN DESCRIPTIONS (continued)
CURLIM: CURLIM programs the primary current limit threshold and determines whether the device latches off
or retries after an overcurrent condition. When a shutdown signal is generated, a 200-μA current source to
ground pulls down on CURLIM. If the voltage on the pin remains above 350 mV the device remains latched and
the power must be cycled to restart. If the voltage on the pin falls below 350 mV, the device attempts a restart.
The voltage threshold is typically set by a resistor divider from VREF to ground. To calculate the current limit
adjust voltage threshold the following equations can be used.
Current limit adjust latching mode voltage is calculated in equation (2)
V=VREF −(R1 ×300 mA)
1+R1
R2>350 mV
Current limit adjust non-latching mode voltage is calculated in equation (3)
V=VREF −(R1 ×80 mA)
1+R1
R2<350 mV
where
DR1 is the resistance from the VREF to CURLIM
DR2 is the resistance from CURLIM to GND
GND: GND is the reference ground and power ground for all functions of this part. Bypass and timing capacitors
should be connected as close as possible to GND.
RT: RT is the connection point for the oscillator timing resistor. It has a low impedance input and is nominally
at 1.25 V. The current through RT is mirrored to the timing capacitor pin, CT. This causes a linear charging of
CT from 0 V to 2.35 V. Note that the current mirror is limited to a maximum of 100 μAsoR
Tmust be greater
than 12.5 kΩ.
SYNC: SYNC is a bi-directional pin, allowing or providing external synchronization with TTL compatible
thresholds. In a typical application RT is connected through a timing resistor to GND which allows the internal
oscillator to free run. In this mode SYNC outputs a TTL compatible pulse during the oscillator dead time (when
CT is being discharged). If RT is forced above 4.4 V, SYNC acts as an input with TTL compatible thresholds
and the internal oscillator is disabled. When SYNC is high, greater than 2 V the outputs are held active low.
When SYNC returns low, the outputs may be high until the on--time is terminated by the normal peak current
signal, a fault seen at SHUTDOWN or the next high assertion of SYNC. Multiple UCC3806s can be
synchronized by a single master UCC3806 or external clock.
VC: VC is the input supply connection for the FET drive outputs and has an input range from 2.5 V to 15 V. VC
should be capacitively bypassed for proper operation.
VIN: VIN is the input supply connection for this device. The UCC1806 has a maximum startup threshold of 8 V
and internally limited by means of a 15 V shunt regulator. The shunted supply current must be limited to 25 mA.
For proper operation, VIN must be bypassed to GND with at least a 0.01-μF ceramic capacitor
VREF:VREFisa5.1V±1% trimmed reference output with a 5 mA maximum available current. VREF must be
bypassed to GND with at least a 0.1-μF ceramic capacitor for proper operation.
(2)
(3)
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
8www.ti.com
FUNCTIONAL BLOCK DIAGRAM
UDG--99035
10
7
3
8
SYNC
9RT +
--
4.4V
+
--
1.5 V
OSC
LO
CT
+
--3X
4
+
--
5
+
--
EA
6
1
S1
QB
R
S2
13 VC
11 AOUT
14 BOUT
12 GND
T
Q
QB
Shutdown
Lockout
S1
Q
R
S2
+
--
+
--
16
1.0 V
0.35 V
Q
R
S
Current Limit
Restart
UVLO
15
+
--
+
--
15 V
5.1 V
Reference
Regulator
+
-- Reference Low
4.25 V 2
CURLIM
SHUT
VREF
0.5 V
--
+
Comparator
7.0 V
7.5 V
CS--
CS+
NI
INV
COMP
VIN
SQ
R
200kΩ
200 μA
120 μA
DOWN
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
9
www.ti.com
TYPICAL APPLICATION DIAGRAM
UDG--99036
TYPICAL CHARACTERISTICS
Design equations for oscillator are described in the following equations.
fOSC =1
tRAMP +tFALL
tRAMP =1.92 ×RT×CT
tFALL =2.4 ×CT
0.002 −1.25
RT
tDEAD =tFALL
(4)
(5)
(6)
(7)
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
10 www.ti.com
TYPICAL CHARACTERISTICS
Figure 1.
1k
40
-- 2 0
10 k
20
0
60
80
90
-- 4 5
45
0
135
180
100 k 1 M 10 M
ERROR AMPLIFIER GAIN AND PHASE
vs
FREQUENCY
fOSC -- Oscillator Frequency -- Hz
Gain -- dB
Phase -- °
Gain
Phase
Figure 2.
52
40
44
42
54
46
50
48
56
58
60
--55 --25 0 25 50 75 100 125
TJ-- Junction Temperature -- °C
OSCILLATOR FREQUENCY
vs
JUNCTION TEMPERATURE
fOSC -- Oscillator Frequency -- kHz
UCC1806
UCC2806
UCC3806
SLUS272F -- FEBRUARY 2000 -- REVISED AUGUST 2006
11
www.ti.com
10 k
0
100 k 1 M
10 k
100 k
1M
CT=47pF
CT= 100 pF
fOSC -- Oscillator Frequency -- kHz
RT-- Timing Resistance -- Ω
CT= 220 pF
CT=2.2nF
CT=1.0nF
CT= 470 pF
CT= 330 pF
Figure 3.
OSCILLATOR FREQUENCY
vs
TIMING RESISTANCE
REVISION HISTORY
DATE REVISION DESCRIPTION
3/11/05 SLUS272D (Rev. D) Updated Equation 2 and 3 to remove x3 factor.
5/3/05 SLUS272E (Rev. E) Adjusted the factors of the switching frequency, Equation 1 and modified the typical
discharge current from 2.0 mA to 2.5 mA.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
5962-9457501MEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
5962-9457501Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UCC1806J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UCC1806J883B ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UCC1806L ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UCC1806L883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UCC2806D ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DG4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DTR ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DTRG4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DW ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DWG4 ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DWTR ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UCC2806M ACTIVE SSOP/
QSOP DBQ 16 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806MG4 ACTIVE SSOP/
QSOP DBQ 16 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806MTR ACTIVE SSOP/
QSOP DBQ 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806MTRG4 ACTIVE SSOP/
QSOP DBQ 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806N ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
UCC2806NG4 ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
UCC2806PW ACTIVE TSSOP PW 16 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806PWG4 ACTIVE TSSOP PW 16 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806PWTR ACTIVE TSSOP PW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806PWTRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806Q ACTIVE PLCC FN 20 46 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
UCC2806QG3 ACTIVE PLCC FN 20 46 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
UCC3806DW ACTIVE SOIC DW 16 40 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2009
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
no Sb/Br)
UCC3806DWG4 ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806DWTR ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UCC3806N ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
UCC3806NG4 ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
UCC3806PW ACTIVE TSSOP PW 16 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806PWG4 ACTIVE TSSOP PW 16 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806Q ACTIVE PLCC FN 20 46 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
UCC3806QG3 ACTIVE PLCC FN 20 46 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
UCC3806QTR ACTIVE PLCC FN 20 1000 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
UCC3806QTRG3 ACTIVE PLCC FN 20 1000 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2009
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UCC1806, UCC2806, UCC2806M, UCC3806, UCC3806M :
•Space: UCC1806-SP
NOTE: Qualified Version Definitions:
•Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2009
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-9457501MEA ACTIVE CDIP J 16 1 TBD Call TI Call TI
5962-9457501Q2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
UCC1806J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UCC1806J883B ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UCC1806L ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UCC1806L883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UCC2806D ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DG4 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DTR ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DTRG4 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DW ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DWG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DWTR ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UCC2806M ACTIVE SSOP DBQ 16 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806MG4 ACTIVE SSOP DBQ 16 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806MTR ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806MTRG4 ACTIVE SSOP DBQ 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806N ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
UCC2806NG4 ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UCC2806PW ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806PWG4 ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806PWTR ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806PWTRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC2806Q ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UCC2806QG3 ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UCC3806DW ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806DWG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806DWTR ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UCC3806N ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UCC3806NG4 ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UCC3806PW ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806PWG4 ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UCC3806Q ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UCC3806QG3 ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 3
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
UCC3806QTR ACTIVE PLCC FN 20 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UCC3806QTRG3 ACTIVE PLCC FN 20 1000 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UCC1806, UCC2806, UCC2806M, UCC3806, UCC3806M :
•Catalog: UCC3806, UCC2806, UCC3806M, UCC3806
•Military: UCC2806M, UCC1806
•Space: UCC1806-SP
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 4
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
•Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UCC2806DTR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
UCC2806DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
UCC2806MTR SSOP DBQ 16 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
UCC2806PWTR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
UCC3806DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
UCC3806QTR PLCC FN 20 1000 330.0 16.4 10.3 10.3 4.9 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UCC2806DTR SOIC D 16 2500 367.0 367.0 38.0
UCC2806DWTR SOIC DW 16 2000 367.0 367.0 38.0
UCC2806MTR SSOP DBQ 16 2500 367.0 367.0 35.0
UCC2806PWTR TSSOP PW 16 2000 367.0 367.0 35.0
UCC3806DWTR SOIC DW 16 2000 367.0 367.0 38.0
UCC3806QTR PLCC FN 20 1000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
MECHANICAL DATA
MPLC004A – OCTOBER 1994
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FN (S-PQCC-J**) PLASTIC J-LEADED CHIP CARRIER
4040005/B 03/95
20 PIN SHOWN
0.026 (0,66)
0.032 (0,81)
D2/E2
0.020 (0,51) MIN
0.180 (4,57) MAX
0.120 (3,05)
0.090 (2,29)
D2/E2
0.013 (0,33)
0.021 (0,53)
Seating Plane
MAX
D2/E2
0.219 (5,56)
0.169 (4,29)
0.319 (8,10)
0.469 (11,91)
0.569 (14,45)
0.369 (9,37)
MAX
0.356 (9,04)
0.456 (11,58)
0.656 (16,66)
0.008 (0,20) NOM
1.158 (29,41)
0.958 (24,33)
0.756 (19,20)
0.191 (4,85)
0.141 (3,58)
MIN
0.441 (11,20)
0.541 (13,74)
0.291 (7,39)
0.341 (8,66)
18
19
14
13
D
D1
13
9
E1E
4
8
MINMAXMIN
PINS
**
20
28
44
0.385 (9,78)
0.485 (12,32)
0.685 (17,40)
52
68
84 1.185 (30,10)
0.985 (25,02)
0.785 (19,94)
D/E
0.395 (10,03)
0.495 (12,57)
1.195 (30,35)
0.995 (25,27)
0.695 (17,65)
0.795 (20,19)
NO. OF D1/E1
0.350 (8,89)
0.450 (11,43)
1.150 (29,21)
0.950 (24,13)
0.650 (16,51)
0.750 (19,05)
0.004 (0,10)
M
0.007 (0,18)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-018
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