1. General description
The 74LVC2G86 provides a dual 2-input EXCLUSIVE-OR gate.
Inputs can be driven fr om eith er 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the outpu t, preventing the damaging ba ckflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115 -A ex ce ed s 200 V
24 mA output drive (VCC =3.0V)
CMOS low-power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Rev. 12 — 15 December 2016 Product data sheet
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 2 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lo wer left corner of the device, below the marking code.
Tabl e 1. Ordering information
Type number Package
Temperatur e ra nge Name Description Version
74LVC2G86DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm SOT505-2
74LVC2G86DC 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm SOT765-1
74LVC2G86GT 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads;
8 terminals; body 1 1.95 0.5 mm SOT833-1
74LVC2G86GF 40 C to +125 C XSON8 extremely thin small outline package; no leads;
8 terminals; body 1.35 10.5 mm SOT1089
74LVC2G86GD 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads;
8 terminals; body 3 2 0.5 mm SOT996-2
74LVC2G86GM 40 C to +125 C XQFN8 plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 1.6 0.5 mm SOT902-2
74LVC2G86GN 40 C to +125 C XSON8 extremely thin small outline package; no leads;
8 terminals; body 1.2 1.0 0.35 mm SOT1116
74LVC2G86GS 40 C to +125 C XSON8 extremely thin small outline package; no leads;
8 terminals; body 1.35 1.0 0.35 mm SOT1203
Table 2. Marking codes
Type number Marking code[1]
74LVC2G86DP V86
74LVC2G86DC V86
74LVC2G86GT V86
74LVC2G86GF VH
74LVC2G86GD V86
74LVC2G86GM V86
74LVC2G86GN VH
74LVC2G86GS VH
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 3 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
5. Functional diagram
6. Pinning information
6.1 Pinning
Fig 1. Logic symbol Fig 2. IEC logic symbol
DDK
$
% <
$
% <
DDK


Fig 3. Logic diagram (one dr iv er)
PQD
<
%
$
Fig 4. Pin configuration SOT505-2 and SOT765-1 Fig 5. Pin co nfiguration SOT833-1, SOT1089,
SOT1116 and SOT 1203
/9&*
$ 9&&
% <
< %
*1' $
DDE
/9&*
%
<
9&&
$
<
%
$
*1'
DDE




7UDQVSDUHQWWRSYLHZ
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 4 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level
Fig 6. Pin configuration SOT996-2 Fig 7. Pin configuration SOT902-2
DDL
/9&*
7UDQVSDUHQWWRSYLHZ
$
%
<
*1'
9&&
<
%
$
DDI
%%
$
9&&
<
<
*1'
$
7UDQVSDUHQWWRSYLHZ
WHUPLQDO
LQGH[DUHD
/9&*
Table 3. Pin description
Symbol Pin Description
SOT505-2, SOT765-1, SOT833-1, SOT1089,
SOT996-2, SOT1116 and SOT1203 SOT902-2
1A, 2A 1, 5 7, 3 data input
1B, 2B 2, 6 6, 2 data input
GND 4 4 ground (0 V)
1Y, 2Y 7, 3 1, 5 data output
VCC 8 8 supply voltage
Table 4. Function table[1]
Input Output
nA nB nY
LLL
LHH
HLH
HHL
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 5 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP8 packages: above 55 C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 packages: above 110 C the value of Ptot derates linearly with 8.0 mW/K.
For XSON8 and XQFN8 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 V 50 - mA
VIinput voltage [1] 0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - 50 mA
VOoutput voltage Active mode [1][2] 0.5 VCC + 0.5 V
Power-down mode [1][2] 0.5 +6.5 V
IOoutput current VO = 0 to VCC -50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Ptot total power dissipation Tamb = 40 C to +125 C[3] -300mW
Tstg storage temperature 65 +150 C
Table 6. Operating conditions
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 1.65 5.5 V
VIinput voltage 0 5.5 V
VOoutput voltage Active mode 0 VCC V
VCC = 0 V; Power-down mode 0 5.5 V
Tamb ambient temperature 40 +125 C
t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V - 20 ns/V
VCC = 2.7 V to 5.5 V - 10 ns/V
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 6 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ[1] Max Unit
Tamb =40 Cto+85C
VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V 0.65 VCC --V
VCC = 2.3 V to 2.7 V 1.7 - - V
VCC = 2.7 V to 3.6 V 2.0 - - V
VCC = 4.5 V to 5.5 V 0.7 VCC --V
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V - - 0.35 VCC V
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3 VCC V
VOL LOW-level output voltage VI=V
IH or VIL
IO=100A; VCC = 1.65 V to 5.5 V - - 0.1 V
IO=4mA; V
CC = 1.65 V - 0.07 0 .4 5 V
IO=8mA; V
CC = 2.3 V - 0.12 0.3 V
IO=12mA; V
CC = 2.7 V - 0.17 0.4 V
IO=24mA; V
CC = 3.0 V - 0.33 0.55 V
IO=32mA; V
CC = 4.5 V - 0.39 0.55 V
VOH HIGH-level output voltage VI=V
IH or VIL
IO=100 A; VCC = 1.65 V to 5.5 V VCC 0.1 - - V
IO=4mA; V
CC = 1.65 V 1.2 1.54 - V
IO=8mA; V
CC = 2.3 V 1.9 2.15 - V
IO=12 mA; VCC = 2.7 V 2.2 2.50 - V
IO=24 mA; VCC = 3.0 V 2.3 2.62 - V
IO=32 mA; VCC = 4.5 V 3.8 4.11 - V
IIinput leakage current VI= 5.5 V or GND; VCC =0Vto5.5V - 0.1 1A
IOFF power-off leakage current VIor VO=5.5V; V
CC =0 V - 0.1 2A
ICC supply current VI= 5.5 V or GND;
VCC =1.65Vto5.5V; I
O=0A -0.14A
ICC additional supply current per pin; VI=V
CC 0.6 V; IO=0A;
VCC = 2.3 V to 5.5 V -5500A
CIinput capacitance - 2.5 - pF
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 7 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
[1] All typical values are measured at VCC = 3.3 V and Tamb =25C.
Tamb =40 C to +125 C
VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V 0.65 VCC --V
VCC = 2.3 V to 2.7 V 1.7 - - V
VCC = 2.7 V to 3.6 V 2.0 - - V
VCC = 4.5 V to 5.5 V 0.7 VCC --V
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V - - 0.35 VCC V
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3 VCC V
VOL LOW-level output voltage VI=V
IH or VIL
IO=100A; VCC = 1.65 V to 5.5 V - - 0.1 V
IO=4mA; V
CC = 1.65 V - - 0.70 V
IO=8mA; V
CC = 2.3 V - - 0.45 V
IO=12mA; V
CC = 2.7 V - - 0.60 V
IO=24mA; V
CC = 3.0 V - - 0.80 V
IO=32mA; V
CC = 4.5 V - - 0.80 V
VOH HIGH-level output voltage VI=V
IH or VIL
IO=100 A; VCC = 1.65 V to 5.5 V VCC 0.1 - - V
IO=4mA; V
CC = 1.65 V 0.95 - - V
IO=8mA; V
CC = 2.3 V 1.7 - - V
IO=12 mA; VCC = 2.7 V 1.9 - - V
IO=24 mA; VCC = 3.0 V 2.0 - - V
IO=32 mA; VCC = 4.5 V 3.4 - - V
IIinput leakage current VI= 5.5 V or GND; VCC =0Vto5.5V - - 1A
IOFF power-off leakage current VIor VO=5.5V; V
CC =0 V - - 2A
ICC supply current VI= 5.5 V or GND;
VCC =1.65Vto5.5V; I
O=0A --4A
ICC additional supply current per pin; VI=V
CC 0.6 V; IO=0A;
VCC = 2.3 V to 5.5 V --500A
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ[1] Max Unit
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 8 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
11. Dynamic characteristics
[1] Typical values are measured at Tamb =25C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL
[3] CPD is used to determine the dynamic power dissipation (PDin W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
12. Waveforms
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground 0 V ); for test circuit see Figure 9.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
tpd propagation delay nA, nB to nY; see Figure 8 [2]
VCC = 1.65 V to 1.95 V 1.4 3.8 9.9 1.4 12.4 ns
VCC = 2.3 V to 2.7 V 0.8 2.5 5.7 0.8 7.2 ns
VCC = 2.7 V 0.8 3.0 5.7 0.8 7.2 ns
VCC = 3.0 V to 3.6 V 0.8 2.3 4.7 0.8 5.9 ns
VCC = 4.5 V to 5.5 V 0.6 1.9 3.6 0.6 4.5 ns
CPD power dissipation
capacitance per gate; VI = GND to VCC;
VCC =3.3V [3]
output enabled - 15.8 - - - pF
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8. Propagation delay input (nA, nB) to output (nY)
PQD
Q$Q%LQSXW
Q<RXWSXW
W3/+
W3+/
*1'
9,
90
90
92+
92/
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 9 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Table 9. Measurement points
Supply voltage Input Output
VCC VMVM
1.65 V to 1.95 V 0.5 VCC 0.5 VCC
2.3 V to 2.7 V 0.5 VCC 0.5 VCC
2.7 V 1.5 V 1.5 V
3.0 V to 3.6 V 1.5 V 1.5 V
4.5 V to 5.5 V 0.5 VCC 0.5 VCC
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9. Test circuit for measuring switching times
Table 10. Test data
Supply voltage Input Load VEXT
VCC VItr, tfCLRLtPLH, tPHL
1.65 V to 1.95 V VCC 2.0 ns 30 pF 1 kopen
2.3 V to 2.7 V VCC 2.0 ns 30 pF 500 open
2.7 V 2.7 V 2.5 ns 50 pF 500 open
3.0 V to 3.6 V 2.7 V 2.5 ns 50 pF 500 open
4.5 V to 5.5 V VCC 2.5 ns 50 pF 500 open
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 10 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
13. Package outline
Fig 10. Package outline SOT505-2 (TSSOP8)
81,7 $
$
PD[ $ $ ES /+( /S Z \Y
F H' ( = ș
5()(5(1&(6
287/,1(
9(56,21
(8523($1
352-(&7,21 ,668('$7(
,(& -('(& -(,7$
PP 










  





 
',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG


627 

Z 0
ES
'
=
H

 
 
ș
$
$
/S
$
GHWDLO;
$
/
+(
(
F
Y 0 $
;
$
\
 PP
VFDOH
76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPPOHDGOHQJWKPP 627

SLQLQGH[
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 11 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Fig 11. Package outline SOT765-1 (VSSOP8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627 02
VRWBSR


8QLW
PP
PD[
QRP
PLQ
   


$
PD[
'LPHQVLRQVPPDUHWKHRULJLQDOGLPHQVLRQV
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
96623SODVWLFYHU\WKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627
$$

$ESF'
 ( H+
(/

/S4YZ
  
\=

       
   
ș
VFDOH
PP
GHWDLO;
$
\
H
;
Y$
ES
Z
'
=

ș
$
$
4
/S
$
$
/
+(
(
F
SLQLQGH[
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 12 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Fig 12. Package outline SOT833-1 (XSON8)
WHUPLQDO
LQGH[DUHD
5()(5(1&(6
287/,1(
9(56,21
(8523($1
352-(&7,21 ,668('$7(
,(& -('(& -(,7$
627 
02

627


',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
;621SODVWLFH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGVWHUPLQDOVERG\[[PP
'
(
H
H
$
E
/
/
HH
PP
VFDOH
1RWHV
,QFOXGLQJSODWLQJWKLFNQHVV
&DQEHYLVLEOHLQVRPHPDQXIDFWXULQJSURFHVVHV
81,7
PP 





$
PD[ E (


'HH
/


/

$
PD[
 
î

î

$
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 13 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Fig 13. Package outline SOT1089 (XSON8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627
02
VRWBSR


8QLW
PP
PD[
QRP
PLQ
  





 



$
'LPHQVLRQV
1RWH
,QFOXGLQJSODWLQJWKLFNQHVV
9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\
;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E/






'(HH
/
PP
VFDOH
WHUPLQDO
LQGH[DUHD
(
'
GHWDLO;
$
$
/
/
E
H
H
WHUPLQDO
LQGH[DUHD
î
î
;
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 14 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Fig 14. Package outline SOT996-2 (XSON8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627
VRWBSR


8QLW
PP
PD[
QRP
PLQ













  
$
'LPHQVLRQVPPDUHWKHRULJLQDOGLPHQVLRQV
;621SODVWLFH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E


'(HH
//
/Y

Z\

\

PP
VFDOH
&
\
&
\
;
WHUPLQDO
LQGH[DUHD
% $'
(
GHWDLO;
$$
E


H
H$& %
Y
&Z
/
/
/
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 15 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Fig 15. Package outline SOT902-2 (XQFN8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627 
02

VRWBSR


8QLW
PP
PD[
QRP
PLQ
 







 



 
$

N
'LPHQVLRQV
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
;4)1SODVWLFH[WUHPHO\WKLQTXDGIODWSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E



'(HH
/



/



/



/YZ

\\

PP
VFDOH
WHUPLQDO
LQGH[DUHD
% $'
(
;
&
\
&
\
WHUPLQDO
LQGH[DUHD
/N
/
/
E
H
H
$&%Y
&Z
PHWDODUHD
QRWIRUVROGHULQJ
N
/
/
$
$
GHWDLO;
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 16 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Fig 16. Package outline SOT1116 (XSON8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627
VRWBSR


8QLW
PP
PD[
QRP
PLQ
  





 



$
'LPHQVLRQV
1RWH
,QFOXGLQJSODWLQJWKLFNQHVV
9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\
;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E



'(HH
/



/
PP
VFDOH
WHUPLQDO
LQGH[DUHD
(
'
î
î
$$
HHH
H
/
/
E
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 17 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Fig 17. Package outline SOT1203 (XSON8)
5HIHUHQFHV
2XWOLQH
YHUVLRQ
(XURSHDQ
SURMHFWLRQ ,VVXHGDWH
,(& -('(& -(,7$
627
VRWBSR


8QLW
PP
PD[
QRP
PLQ
  





 



$
'LPHQVLRQV
1RWH
,QFOXGLQJSODWLQJWKLFNQHVV
9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\
;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627
$E



'(HH
/



/
PP
VFDOH
WHUPLQDO
LQGH[DUHD
(
'
î
î
$
$
H
/
/
E
HHH
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 18 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
14. Abbreviations
15. Revision history
Table 11. Abbr eviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC2 G86 v.12 20161215 Product data sheet - 74LVC2G86 v.11
Modifications: •Table 7: The maximum limits for leakage current and supply current have changed.
74LVC2 G86 v.11 20130408 Product data sheet - 74LVC2G86 v.10
Modifications: •For type number 74LVC2G86GD XSON8U has changed to XSON8.
74LVC2 G86 v.10 20120521 Product data sheet - 74LVC2G86 v.9
Modifications: •For type number 74LVC2G86GM the sot code has changed to SOT902-2.
74LVC2 G86 v.9 2011112 5 Product data sheet - 74LVC2G86 v.8
Modifications: •Legal pages updated.
74LVC2 G86 v.8 20101019 Product data sheet - 74LVC2G86 v.7
74LVC2 G86 v.7 20080613 Product data sheet - 74LVC2G86 v.6
74LVC2 G86 v.6 20080222 Product data sheet - 74LVC2G86 v.5
74LVC2 G86 v.5 20070907 Product data sheet - 74LVC2G86 v.4
74LVC2 G86 v.4 20061013 Product data sheet - 74LVC2G86 v.3
74LVC2 G86 v.3 20050207 Product data sheet - 74LVC2G86 v.2
74LVC2G86 v.2 20041018 Product specification - 74LVC2G86 v.1
74LVC2G86 v.1 20030825 Product specification - -
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 19 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full informatio n see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in perso nal injury, death or severe propert y or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Custo mers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party custo mer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by cust omer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
74LVC2G86 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 12 — 15 December 2016 20 of 21
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qualif ied nor test ed
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standards, custome r
(a) shall use the product without Nexperia’s warranty of the
product for such au tomotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from custome r design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
16.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
17. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia 74LVC2G86
Dual 2-input EXCLUSIVE-OR gate
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 4
8 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Recommended operating conditions. . . . . . . . 5
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 18
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
17 Contact information. . . . . . . . . . . . . . . . . . . . . 20
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
15 December 2016