BU9817FV Multimedia ICs 4-channel temperature sensor IC for PCs with I2C BUS interface BU9817FV The BU9817FV is a 4-channel, 8-bit, A / D converter / overvoltage detector that is perfect for temperature sensors with built-in I2C BUS interfaces. The host can access the BU9817FV anytime for the voltage data. !Applications Notebook computers, desktop computers, household electric appliances !Features 1) By attaching a thermistor, a maximum four-channel temperature sensor is possible. 2) Can set comparison voltages independently. 3) Built-in I2C BUS interface. 4) Detection level and operating mode settings are programmable. 5) Extremely low operating current perfect for portable equipment. 6) Operating voltage of VDD = 3V to 5.5V. !Absolute maximum ratings (Ta = 25C) Parameter Symbol Power supply voltage VDD 7.0 V Power dissipation Pd 350 mW Operating temperature Topr - 15 ~ + 75 C Storage temperature Tstg - 55 ~ +125 C Voltage applied to pins Limits Unit V GND - 0.5 ~ VDD + 0.5 VIN * Reduced by 3.5mW for each increase in Ta of 1C over 25C. !Recommended operating conditions (Ta = 25C) Parameter Symbol Min. Typ. Max. Unit VDD 3.0 -- 5.5 V Operating power supply voltage Note) I2C BUS is a registered trademark philips. BU9817FV Multimedia ICs !Block diagram SDA 1 14 VDD 13 STOPB 12 AD1 11 AD2 10 AD3 9 AD4 8 CLK I2C BUS Interface Pointer Register Vdl Register SCL Configuration Register 2 Vul Register OD1 Reset & Shutdown Reset Shutdown 3 Reset Voltage Hysteresis Comparator OD2 ADV Register 4 Reset Voltage Hysteresis Comparator ADV Register Sel OD3 5 8bit A/D Sel Reset Voltage Hysteresis Comparator OD4 ADV Register 6 Reset Voltage Hysteresis Comparator GND 7 ADV Register BU9817FV Multimedia ICs !Pin descriptions Pin No. Pin name Function 1 SDA I2C 2 SCL I2C BUS Serial Clock Input 3 OD1 Open Drain Output 1 4 OD2 Open Drain Output 2 5 OD3 Open Drain Output 3 6 OD4 Open Drain Output 4 7 GND Ground 8 CLK Clock for Logic Input 9 AD4 Analog-to-Digtal Converter Input 4 10 AD3 Analog-to-Digtal Converter Input 3 11 AD2 Analog-to-Digtal Converter Input 2 12 AD1 Analog-to-Digtal Converter Input 1 13 STOPB Reset & Power save mode set 14 VDD Supply Voltage 3.0V to 5.5V BUS Serial Data Line BU9817FV Multimedia ICs !Input / output equivalent circuits Pin. No Pin name Input / output circuits Function 1 SDA I2C BUS serial data input / output. When only input address accords slave address (BU9817FV's), register data is inputted or outputted. 2 SCL I2C BUS serial clock input. 3 4 5 6 OD1 OD2 OD3 OD4 Open-drain output corresponds to AD1 to AD4 input. Connect this pin a pull-up resister. The pull-up resister should be above VDD / 4mA (). 7 GND Ground terminal. 8 CLK Clock input for ADC block. Input clock is 32.768kHz. AD converter and voltage hysteresis comparator use this clock to operate. BU9817FV Multimedia ICs !Input / output equivalent circuits Pin. No Pin name 9 10 11 12 AD1 AD2 AD3 AD4 13 STOPB 14 VDD Input / output circuits Function AD input. Each channel is converted in order. (AD1, AD2, AD3, AD4, AD1,AD2...) Reset and power save mode setting. High: Operation mode Operation follows the setting of configuration register. Low : Reset & Power save mode Reset the all internal circuit and stop the ADC operation. Go into power save mode. Be sure to set STOPB pin low for initial reset of the internal circuit, when the BU9816FV is power up. Power supply. Supply voltage 3.0V to 5.5V. BU9817FV Multimedia ICs !Electrical characteristics (unless otherwise noted, VDD = 5.0V, Ta = 25C) Parameter Symbol ICC Circuit current (normal) Circuit current (shutdown / reset / STOPB) Min. 0.2 Typ. 0.75 Max. 2.0 Unit Conditions mA SDA, SCL = "H" CLK = 32.768kHz SDA, SCL = "H" CLK = 32.768kHz Mode setting or STOPB = Low ICC.sd -- 1.0 2.0 A Input high level voltage ViH VDD x 0.7 VDD VDD + 0.5 V -- Input low level voltage ViL - 0.5 0.0 VDD x 0.3 V -- Input high level current IiH -- 0.0 1.0 A -- Input low level current IiL - 1.0 0.0 -- A -- Input capacity Ci -- -- 10 pF -- Open drain output low level voltage VoLod 0.0 0.2 0.6 V loL = 4.0mA SDA output low level voltage VoLsda 0.0 0.2 0.6 V loL = 6.0mA tfsda -- -- 250 ns CL = 400pF loL = 6.0mA pwstopb 10 -- -- s -- -- SDA output fall time STOPB minimum pulse width STOPB minimum pulse width VDD GND 0.3VDD Minimum pulse width A / D RES -- 8 -- bits Non-linearity error Nle -2 -- 2 LSB Differential non-linearity error Ndle -1 -- 1 LSB 2 points connected fCLK = 32.768kHz AD resolution 1-channel conversion time Tc -- 305 -- s Input range Ai GND -- VDD V -- -- BU9817FV Multimedia ICs !Measurement circuit 2 13 3 12 4 11 5 10 6 9 A A 14 V 1 820 V 820 820 I2C BUS Controller A A V N 820 V N 1.2k V N 1.2k V N 1.2k 1.2k 32.768kHz 7 A 8 Fig.1 BU9817FV Multimedia ICs !Circuit operation Explanation of operating mode Configuration register settings ADC operation conversion interval Open drain operation timing Register status Current consumption (typ.) Normal mode 000000b 1.221ms 10th clock after A / D conversion Normal operation 0.75mA Interval High mode 001100b 1 second intervals 10th clock after A / D conversion Normal operation Note: average less than 3A Interval Low mode 001000b 4 second intervals 10th clock after A / D conversion Normal operation Note: average less than 2A Shutdown mode 000001b Stopped Hold status Hold data Less than 1A Reset mode 001b Stopped Reset fixed at high Data reset Less than 1A Operating mode The asterisk can be either 0 or 1. Conversion time is for fCLK = 32.768kHz. These mode setting bits (bit 0 and bits 3 to 5) are common for each channel, the last setting of bits (bit0 and bits3 to 5) is effective for all channels. Furthermore, bits 1 and 2 are independent and can be set for each channel. Note: These parameters are reference values derived through calculations and are not guaranteed characteristic values. Explanation of ADC / open drain operation (Normal mode) Tad = 1.221ms, 40 clock 10 clock ADC operation 4ch 1ch 2ch 3ch 4ch 1ch 2ch 3ch 4ch 1ch OD1 OD2 OD3 OD4 (Interval mode) Tin = 1s, 4s Tc = 1.831ms, 60 clock 10 clock 10 clock ADC operation OD1 OD2 OD3 OD4 1ch 10 clock 2ch 3ch 4ch 1ch 1ch 2ch 3ch BU9817FV Multimedia ICs !Circuit operation Explanation of I2C BUS interface * Slave address 1 0 0 1 1 MSB 1 1 R/W LSB * Conforms to I2C BUS standards Parameter SCL clock frequency Start condition hold time Symbol Min. Max. Unit f SCL 0 400 kHz t HD: STA 0.6 -- s s Start condition setup time t SU: STA 0.6 -- Data setup time t SU: DAT 100 -- ns Data hold time t HD: DAT 0 0.9 s Stop condition setup time t SU: STO 0.6 -- s (Start conditions) SCL SDA t SU: STA t HD: STA (Data conditions) SCL SDA t SU: DAT t HD: DAT (Stop conditions) SCL SDA t SU: STO BU9817FV Multimedia ICs !Circuit operation OD output voltage response diagram (Example: open-drain output is set active low) Vul AD pin voltage waveform Vdl OD Output (Comparator Mode) OD Output (Interrupt Mode) Read Read Read Time * Note: Resetting OD output under interrupt mode occurs at only shutdown mode or reset mode or STOPB or when data read generated from host. Except for these cases, OD output is kept setting. BU9817FV Multimedia ICs !Circuit operation Register structure 1ch Configuration Register 1ch Vdl Register 1ch Vul Register 1ch ADV Register 2ch Configuration Register 2ch Vdl Register 2ch Vul Register 2ch ADV Register SDA 2 I C BUS Interface SCL Pointer Register (Register select) 3ch Configuration Register 3ch Vdl Register 3ch Vul Register 3ch ADV Register 4ch Configuration Register 4ch Vdl Register 4ch Vul Register 4ch ADV Register I2C Bus data structure (1) Write Mode S Address -- W A Pointer reg. Byte A -- W A Pointer reg. Byte A Write Data Byte A P Read Data Byte -- A P (2) Read Mode 1) Pointer register set S Address Sr Address R A 2) Preset pointer register S Address R A Read Data Byte -- A P S: Start condition P: Stop condition Sr: Restart condition A: acknowledge -- A: acknowledge bar BU9817FV Multimedia ICs Mode settings table 1 / 2 (1) Pointer register (selects which registers will be read from or written to) D7 D6 D5 D4 0 0 0 0 D2 D3 D1 Channel Select D0 Register Select D4 to D7: These bits are used for test mode and must be kept zero for normal operation. Channel Select D3 D2 0 0 Channel 1 Channel 0 1 Channel 2 1 0 Channel 3 1 1 Channel 4 Register Select D1 D0 0 0 ADV Register (Read only) (Power on Reset default) Register 0 1 Configuration Register (Read / Write) 1 0 Vdl Register (Read / Write) 1 1 Vul Register (Read / Write) (2) ADV Register (Read only) D7 D6 D5 D4 D3 D2 D1 D0 1 ch Channel MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB 2 ch MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB 3 ch MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB 4 ch MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB D0 to D7: Voltage data The defaults for the power-on-reset and reset modes are 1 for all bits. (3) Configuration Register (Read / Write) Channel D7 D6 1 ch 0 0 2 ch 0 0 D5 Interval Mode D4 Interval Speed D3 Reset D2 D1 Opendrain Polarity Comp. / Int. Opendrain Polarity Comp. / Int. Comp. / Int. Comp. / Int. 3 ch 0 0 Opendrain Polarity 4 ch 0 0 Opendrain Polarity The defaults for the power-on-reset and reset modes are 0 for all bits. D0 Shutdown BU9817FV Multimedia ICs Mode settings table 2 / 2 D0 : Shutdown "0" - Operation mode. "1" - The BU9817FV stops A / D operation and goes into low power shutdown mode. D0 bit of each channel is common bit. D1 : Comparator / Interrupt mode "0" - Comparator mode. "1" - Interrupt mode. D2 : Open Drain Polarity "0" - active low. "1" - active high. D3 : Reset "0" - Operation mode. "1" - Reset any bits except D3 bit of the configuration register, any registers, the A / D converter, and the voltage hysteresis comparator. D3 bit of each channel is common bit. D4 : Interval Speed Set the conversion cycle time of the 8bit A / D and the voltage hysteresis comparator when D5 bit (Interval Mode) is "1". "0" - conversion cycle time is 4s. "1" - conversion cycle time is 1s. D4 bit of each channel is common bit. D5 : Interval Mode "0" - normal mode. "1" - Interval mode. D5 bit of each channel is common bit. (4) Vul and Vdl Register (Read / Write) D7 D6 D5 D4 D3 D2 D1 D0 1 ch Channel MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB 2 ch MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB 3 ch MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB 4 ch MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB D0 to D7: Voltage limit data of Vul and Vdl. Default after power on reset and reset mode is Vul = 80h, Vdl = 66h. BU9817FV Multimedia ICs !Application example VDD SDA 1 14 SCL 2 13 From system controller STOPB Input (From Reset IC) Power on Reset VDD RS OD1 Output 3 Thermal Zone 12 AD1 Input RTH VDD RS OD2 Output 4 Thermal Zone 11 AD2 Input RTH OD3 Output 5 10 AD3 Input RTH: NTC Thermistor OD4 Output 6 9 AD4 Input 7 8 CLK Input (fCLK = 32.768kHz) Fig.2 BU9817FV Multimedia ICs !Explanation for external components (1) AD input pin (example when used as a temperature sensor) To the AD input pin, input a voltage with divided resistance from a resistor and NTC thermistor. For the sensor to measure the temperature, the NTC thermistor is used. The thermistor is a p-type semiconductor and as the temperature increases, the resistance value becomes lower. In other words, the resistance temperature coefficient is negative, and so the AD input pin voltage temperature characteristics are also negative. Put nearby BU9817FV VCC ADx NTC thermistor BU9817FV Put nearby measured object GND is required common and stability. !External dimensions (Units : mm) 8 1 7 0.65 0.15 0.1 4.4 0.2 0.1 1.15 0.1 6.4 0.3 5.0 0.2 14 0.22 0.1 0.3Min. 0.1 SSOP-B14 Appendix Notes No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document use silicon as a basic material. Products listed in this document are no antiradiation design. The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. About Export Control Order in Japan Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control Order in Japan. In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction. Appendix1-Rev1.0