IRF5210SPbF
IRF5210LPbF
HEXFET® Power MOSFET
PD - 97049B
VDSS = -100V
RDS(on) = 60mΩ
ID = -38A
lAdvanced Process Technology
lUltra Low On-Resistance
l150°C Operating Temperature
lFast Switching
lRepetitive Avalanche Allowed up to Tjmax
lSome Parameters are Different from
IRF5210S/L
lP-Channel
lLead-Free
08/04/09
S
D
G
www.irf.com 1
D2Pak
IRF5210SPbF
TO-262
IRF5210LPbF
S
D
G
D
S
D
G
D
GDS
Gate Drain Source
Description
Features of this design are a 150°C junction
operating temperature, fast switching speed and
improved repetitive avalanche rating . These fea-
tures combine to make this design an extremely
efficient and reliable device for use in a wide
variety of other applications.
Absolute Maximum Ratings
Parameter Units
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ -10V A
I
D
@ T
C
= 100°C Continuous Drain Current, VGS @ -10V
I
DM
Pulsed Drain Current
c
P
D
@T
A
= 25°C Maximum Power Dissipation W
P
D
@T
C
= 25°C Maximum Power Dissipation
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
E
AS
Single Pulse Avalanche Energy
d
mJ
I
AR
Avalanche Current
c
A
E
AR
Repetitive Avalanche Ener
gy
c
mJ
dv/dt Peak Diode Recovery dv/dt
e
V/ns
T
J
Operating Junction and °C
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
Junction-to-Case ––– 0.75 °C/W
R
θJA
Junction-to-Ambient (PCB Mount, steady state)
g
––– 40
-7.4
Max.
-38
-24
-140
3.1
170
1.3
± 20
17
120
-23
300 (1.6mm from case )
-55 to + 150
IRF5210S/LPbF
2www.irf.com
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11)
Starting TJ = 25°C, L = 0.46mH
RG = 25Ω, IAS = -23A. (See Figure 12)
ISD ≤ -23A, di/dt ≤ -650A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
When mounted on 1" square PCB (FR-4or G-10
Material). For recommended footprint and soldering
techniques refer to application note #AN-994.
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. T
y
p. Max. Units
V(BR)DSS Drain-to-Source Breakdown Volta
g
e-100––––––V
∆ΒVDSS
/
∆TJ Breakdown Volta
g
e Temp. Coefficient ––– -0.11 ––– V/°C
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 60 mΩ
VGS(th) Gate Threshold Volta
g
e-2.0–––-4.0V
g
fs Forward Transconductance 9.5 ––– ––– S
IDSS Drain-to-Source Leaka
e Current ––– ––– -50 µA
––– ––– -250
IGSS Gate-to-Source Forward Leaka
g
e ––– ––– 100 nA
Gate-to-Source Reverse Leaka
g
e––––––-100
QgTotal Gate Char
g
e ––– 150 230 nC
Qgs Gate-to-Source Char
g
e ––– 22 33
Qgd Gate-to-Drain ("Miller") Char
g
e–––81120
td(on) Turn-On Dela
y
Time ––– 14 ––– ns
trRise Time ––– 63 –––
td(off) Turn-Off Dela
y
Time ––– 72 –––
tfFall Time ––– 55 –––
LDInternal Drain Inductance ––– 4.5 ––– nH Between lead,
6mm (0.25in.)
LSInternal Source Inductance ––– 7.5 ––– from packa
g
e
and center of die contact
Ciss Input Capacitance ––– 2780 ––– pF
Coss Output Capacitance ––– 800 –––
Crss Reverse Transfer Capacitance ––– 430 –––
Source-Drain Ratings and Characteristics
Parameter Min. T
y
p. Max. Units
ISContinuous Source Current ––– ––– -38
(Body Diode) A
ISM Pulsed Source Current ––– ––– -140
(
Bod
y
Diode
)
c
VSD Diode Forward Voltage ––– ––– -1.6 V
trr Reverse Recovery Time ––– 170 260 ns
Qrr Reverse Recover
y
Char
g
e ––– 1180 1770 nC
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
VDS = VGS, ID = -250µA
VDS = -100V, VGS = 0V
VDS = -80V, VGS = 0V, TJ = 125°C
Conditions
VGS = 0V, ID = -250µA
Reference to 25°C, ID = -1mA
VGS = 10V, ID = -38A
f
TJ = 25°C, IF = -23A, VDD = -25V
di/dt = -100A/µs
f
TJ = 25°C, IS = -23A, VGS = 0V
f
showing the
integral reverse
p-n junction diode.
VGS = -10V
f
MOSFET symbol
VGS = 0V
VDS = -25V
Conditions
ƒ = 1.0MHz, See Fig. 5
RG = 2.4Ω
ID = -23A
VDS = -50V, ID = -23A
VDD = -50V
ID = -23A
VGS = 20V
VGS = -20V
VDS = -80V
VGS = -10V
f
IRF5210S/LPbF
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Fig 4. Normalized On-Resistance
vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1 110 100
-V DS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
-ID, Drain-to-Source Current (A)
VGS
TOP -15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM -4.5V
≤60µs PULSE WIDTH
Tj = 25°C
-4.5V
0.1 110 100
-V DS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
-ID, Drain-to-Source Current (A)
-4.5V
≤60µs PULSE WIDTH
Tj = 150°C
VGS
TOP -15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM -4.5V
246810 12 14
-VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
-ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 150°C
VDS = -50V
≤60µs PULSE WIDTH
-60 -40 -20 020 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = -38A
VGS = -10V
IRF5210S/LPbF
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
-VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C, Capacitance(pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 25 50 75 100 125 150
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
-VGS, Gate-to-Source Voltage (V)
VDS= -80V
VDS= -50V
VDS= -20V
ID= -23A
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
-VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
-ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
1 10 100 1000
-VDS, Drain-to-Source Voltage (V)
1
10
100
1000
-ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
Tc = 25°C
Tj = 150°C
Single Pulse
100µsec
1msec
10msec
IRF5210S/LPbF
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Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs.
Case Temperature
VDS
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
VDD
RG
D.U.T.
+
-
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
25 50 75 100 125 150
TC , Case Temperature (°C)
0
5
10
15
20
25
30
35
40
-ID, Drain Current (A)
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
Thermal Response ( Z thJC )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W)
τι (sec)
0.128309 0.000069
0.377663 0.001772
0.244513 0.010024
τ
J
τ
J
τ
1
τ
1
τ
2
τ
2
τ
3
τ
3
R
1
R
1
R
2
R
2
R
3
R
3
τ
τ
C
Ci= τi/Ri
Ci= τi/Ri
IRF5210S/LPbF
6www.irf.com
Fig 14b. Gate Charge Test Circuit
Fig 14a. Basic Gate Charge Waveform
Fig 13. Maximum Avalanche Energy
vs. Drain Current
Q
G
Q
GS
Q
GD
V
G
Charge
-10V
D.U.T. VDS
ID
IG
-3mA
VGS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(
BR
)
DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
V
DS
V
DD
DRIVER
A
15V
-20V
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
0
50
100
150
200
250
300
350
400
450
500
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP -8.7A
-14A
BOTTOM -23A
IRF5210S/LPbF
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Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
RG
VDD
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T*Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
* Reverse Polarity of D.U.T for P-Channel
[ ]
[ ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[ ] ***
Fig 15. For P-Channel HEXFETS
VGS
IRF5210S/LPbF
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D2Pak (TO-263AB) Part Marking Information
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
'$7(&2'(
<($ 5 
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$ $66(0%/<6,7(&2'(
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$66(0%/('21::
7+,6,6$1,5)6:,7+
/27&2'( ,17(51$7,21$/
/2*2
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25
)6
/2*2
$66(0%/<
/27&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
IRF5210S/LPbF
www.irf.com 9
TO-262 Part Marking Information
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
/2*2
5(&7,),(5
,17(51$7,21$/
/27&2'(
$66(0%/<
/2*2
5(&7,),(5
,17(51$7,21$/
'$7(&2'(
:((.
<($ 5 
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25
352'8&7237,21$/
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,17+($66(0%/</,1(&
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
IRF5210S/LPbF
10 www.irf.com
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 08/09
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/