© 2002 Fairchild Semiconductor Corporation DS005662 www.fairchildsemi.com
November 1983
Revised April 2002
CD4051BC • CD4052BC • CD40 53BC Single 8-Channel Analog Mul tiplexer/Demultiplexe r • Dual 4-Channel Analog
Multiple xer/Demultipl exer • Triple 2-Channel Ana log Multiplexer/Demultiplexer
CD4051BC • CD4052BC • CD4053BC
Single 8-Channel Analog Multiplexer/Demultiplexer •
Dual 4-Channel Analog Multiplexer/Demultiplexer •
Triple 2-Channe l Ana log Multiplexer/Demultiplexer
General Description
The CD4 051BC, C D4052B C, and CD4 053BC an alog mul -
tiplexers/demultiplexers are digitally controlled analog
switches having low “ON” impedance and very low “OFF”
leakage currents. Control of analog signals up to 15Vp-p
can be ac hieved by di gital s ignal am plitud es of 3 −15V. For
example , if VDD = 5V, VSS = 0V and V EE = −5V, analog sig-
nals from −5V to +5V can b e control led by digi tal inputs of
0−5V. The multiplexer circuits dissipate extremely low qui-
escent power over the full VDD−VSS and VDD−VEE supply
voltage ranges, independent of the logic state of the control
signals. When a logical “1” is present at the inhibit input ter-
minal all channels are “OFF”.
CD4051BC is a single 8-channel multiplexer having three
binary c ontr ol i n put s. A , B, and C, and an i nh ibit i n put . T he
three binary signals select 1 of 8 channels to be turned
“ON” and connect the input to the output.
CD4052BC is a differential 4-channel multiplexer having
two binary control inputs, A and B, and an inhibit input. The
two binary input signals select 1 or 4 pairs of chan nels to
be turned on and connect the differential analog inputs to
the differential outputs.
CD4053BC is a triple 2-channel multiplexer having three
separate d igital control inputs, A, B, and C, and a n inhibit
input. Ea ch control input selects one of a pair of ch annels
which are connected in a single-pole double-throw configu-
ration.
Features
■Wide range of digital and analog signal levels:
digital 3 – 15V, analog to 15Vp-p
■Low “ON” resistance: 80Ω (typ.) over entire 15Vp-p
signal-input range f or VDD − VEE = 15V
■High “OFF” resistance:
channel leakage of ±10 pA (typ.) at VDD − VEE = 10V
■Logic level conversion for digital addressing signals of
3 – 15V (VDD − VSS = 3 – 15V) to switch analog signals
to 15 Vp-p (VDD − VEE = 15V)
■Matched switch characteristics:
∆RON = 5Ω (typ.) for VDD − VEE = 15V
■Very low quiescent power dissipation under all
digital-control input and supply conditions:
1 µ W (typ.) at VDD − VSS = VDD − VEE = 10V
■Binary address decoding on chip
Ordering Code:
Devices also available in Tape and Reel. Spe ci fy by append ing the suffix let t er “X” to the ordering code.
Order Number Package Number Package Description
CD4051BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4051BCSJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4051BCMTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
CD4051BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
CD4052BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4052BCSJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4052BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
CD4053BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4053BCSJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4053BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide