Device Addressing
The 1K, 2K, 4K, 8K and 16K E2PROM devices all require
an 8 bit device address word following a start condition to
enable the chip for a read or write operation (refer to Fig-
ure 1).
The device address word consists of a mandatory one,
zero sequence for the first four most significant bits as
shown. This is common to all the E2PROM devices.
The next 3 bits are the A2, A1 and A0 device addres s bits
for the 1K/2K E2PROM. These 3 bits must compare to
their corresponding hard-wired input pins.
The 4K E2PROM only uses the A2 and A1 device address
bits with the third bit being a memory page address bit.
The two device address bits must compare to their corre-
sponding hard-wired input pins. The A0 pin is no connect.
The 8K E2PROM only uses the A2 device address bit with
the next 2 bits being for memory page addressing. The A2
bit must compare to its corresponding hard-wired input
pin. The A1 and A0 pins are no connect.
The 16K does not use any device address bits but instead
the 3 bits are used for memory page addressing. These
page addressing bits on the 4K, 8K, and 16K devices
should be considered the most significant bits of the data
word address which follows. The A0, A1 and A2 pins are
no connect.
The eighth bit of the device address is the read/write op-
eration select bit. A read operation is initiated if this bit is
high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the E2PROM will
output a zero. If a compare is not made, the chip will retur n
to a standby state.
Write Operations
BYTE WRITE: A write operation requires an 8 bit data
word address following the device address word and ac-
knowledgement. Upon receipt of this address, the
E2PROM will again respond with a zero and then clock in
the first 8 bit data word. Following receipt of the 8 bit data
word, the E2PROM will output a zero and the addressing
device, such as a mic rocontroller, must terminate the wr ite
sequence with a stop condition. At this time the E2PROM
enters an internally-timed write cycle to the nonvolatile
memory. All inputs are disabled during this write cycle and
the E2PROM will not respond until the write is complete
(refer to Figure 2).
PAGE WRITE: The 1K/2K E2PROM is capable of an 8-
byte page write, and the 4K, 8K and 16K devices are ca-
pable of 16-byte page writes.
A page write is initiated the same as a byte write, but the
microcontroller does not send a stop condition after the
first data word is clocked in. Instead, after the E2PROM
acknowledges receipt of the first data word, the micr ocon-
troller can transmit up to seven (1K/2K) or fifteen (4K, 8K,
16K) more data words. The E2PROM will respond with a
zero after each data word received. The microcontroller
must terminate the page write sequence with a stop con-
dition (refer to Figure 3).
The data word address lower three (1K/2K) or four (4K,
8K, 16K) bits are internally incremented following the re-
ceipt of each data word. The higher data word address bits
are not incremented, retaining the memory page r ow loca-
tion. If more than eight (1K/2K) or sixteen (4K, 8K, 16K)
data words are transmitted to the E2PROM, the data wor d
address will “roll over” and previous data will be overwrit-
ten.
ACKNOWLEDGE POLLING: Once the internally-timed
write cycle has started and the E2PROM inputs are dis-
abled, acknowledge polling can be initiated. This involves
sending a start condition followed by the device address
word. The read/write bit is representative of the operation
desired. Only if the internal write cycle has completed will
the E2PROM respond with a zero allowing the read or
write sequence to continue.
Read Operations
Read operations are initiated the same way as write op-
erations with the exception that the read/write select bit in
the device address word is set to one. There are three
read operations: current address read, random address
read and sequential read.
CURRENT ADDRESS READ: The internal data word ad-
dress counter maintains the last address access ed during
the last read or write operation, incremented by one. This
address stays valid between operations as long as the
chip power is maintained. The address “roll over” during
read is from the last byte of the last memory page to the
first byte of the first page. The address “roll over” during
write is from the last byte of the current page to the first
byte of the same page.
Once the device address with the read/write select bit set
to one is clocked in and acknowledged by the E2PROM,
the current address data word is serially clocked out. The
microcontroller does not respond with an input zero but
does generate a following stop condition (refer to Figure
4).
RANDOM READ: A random read requires a “dummy”
byte write sequence to load in the data word address.
Once the device address word and data word address ar e
clocked in and acknowledged by the E2PROM, the micro-
(continued)
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