J NJM4151 V-F/F-V CONVERTOR = GENERAL DESCRIPTION = PACKAGE OUTLINE The NJM4151 provide a simple low-cost method of A/D conver- sion. They have all the inherent advantages of the voltage-to-frequency conversion technique. The Output of NJM4151 is a series of pulses of constant duration. The frequency of the pulses is proportional to the KA applied input voltage. These converters are designed for use in a wide Sekt range of data conversion and remote sensing applications. WJM 41510 WJM 4151 M a FEATURES @ Operating Voltage (8V ~22V) @ Frequency Operation from (1.0Hz to 100kHz) @ Package Outline DIP8, DMP8 @ Bipolar Technology = PIN CONFIGURATION PIN FUNCTION cr 3 1 Current Source cde 7 2 Scale Factor 3 Logic Output cys 6 4 Ground 5-1 5 One-Shot R, C h id NM4T410 6 Threshol NJM4157M 7 Input Voltage 8 vt = EQUIVALENT CIRCUIT o-. - Vv 04 Io 03 Foss toss Rs 12K - Tho vv Vio @ R3 015, R4 06 PPS RS | | @oR, @0 GMD New Japan Radio Co, Lid 7-63NJM4151 LE = ABSOLUTE MAXIMUM RATINGS (Ta=25C) PARAMETER SYMBOL] RATINGS UNIT Supply Voltage ve 8~22 Vv Output Sink Current Isink 20 mA Power Dissipation Po (DIP8) 500 mW (DMP8) 300 mW Input Voltage vi 0.2~Vvt VW) Operating Temperature Range Topr 20~+75 Cc Storage Temperature Range Tstg 40~+125 Cc mw ELECTRICAL CHARACTERISTICS (Vt=+ 15V, Ta=+25T) PARAMETER TEST CONDITION MIN. TYP. MAX. UNIT 8V<VI<I15V 2.0 3.5 6.0 mA Operating Current 15V<Vt<22V 2.0 45 75 mA Conversion Accuracy Vin=l0V 0.90 1.00 1.10 kHz/V Scale Factor Rs=14.0kQ Drift with Temperature Vin=l0V _ +100 ppM/C Drift with V* weoy ey 0.2 1.0 %IV Input Comparator Offset Voltage _ 5 10 mV Offset Current _ +50 +100 nA Input Bias Current _ 100 300 nA Common Mode Range(Note 1) 0 to V*3)0 tov+2 _ v One-Shot Threshold Voltage, Pin 5 0.63 0.66 0.70 Vt Input Bias Current, Pin 5 _ 100 500 nA Reset Vsar Pin 5, I=2.2mA _ 0.15 0.50 Vv Current Source Output Current (Rs=14.0k) Pini, V*=OV _ 138.7 _ BA Change with Voltage Pin 1, V*=0V to V*=10V 1.0 2.5 BA Off Leakage Pin1, Vt=0V _ 1 50.0 nA Reference Voltage Pin 2 1.70 1.90 2.08 Vv Logic Output Vsar Pin 3, [=3.0mA _ 0.15 0.50 Vv Veat Pin 3, 1=2.0mA 0.10 0.30 Vv Off Leakage _ 0.1 1.0 pA Note 1: Input Common Mode Range includes ground. 7-64 New Japan Radio Co. Lhd.NJM4151 a een = PRINCIPLE OF OPERATION Single Supply Mode Voltage-to-Frequency Conversion In this application the NJM4151 functions as a stand-alone voltage to frequency converter operating on a single positive power supply. Refer to Figure 1, the simplified block diagram. The NJM4151 contains a voltage comparator, a one-shot, and a precision switched current source. The voltage comparator compares a positive input voltage applied at pin 7 to the voltage at pin 6. If the input voltage is higher, the comparator will fire the one-shot. The output of the one-shot is connected to both the logic output and the precision switched current source. During the one-shot period, T, the logic output will go low and the current source will turn on with current I. At the end of the one-shot period the logic output will go high and the current source will shut off. At this time the current source has injected an amount of charge Q=IgT into the network Rg-Cy. If this charge has not increased the voltage Vp such that Vg>V), the comparator again fires the one-shot and the current source injects another lump of charge, Q, into the Rg-Cg, network. This process continues until Va>Vj. When this condition is achieved the current source remains off and the voltage Vg decays until Vg is again equal to V,. This completes one cycle. The VFC will now run in a steady state mode. The current source dumps lumps of charge into the capacitor Cy at rate fast enough to keep V,2Vj. Since the discharge rate of capacitor Cy is proportional to V_/Rp, the frequency at which the system runs will be proportional to the input voltage. SWICHED VY" GREQUENCY CURRENT OUTPU SOURCE | Uy To >| eT +VL Vi INPUT INPUT VOLTAGE COMPARATOR Figure 1. Simplified Block Diagram, Single Supply Mode 7-65 New Japan Radio Co, Lhd. )NJM4151 The 4151 VFC is easy to use and apply if you understand the operation of it through the block diagram, Figure 1. Many users, though, have expressed the desire to understand the workings of the internal circuitry. The circuit can be divided into five sections: the internal biasing network, input comparator, one-shot, voltage reference, and the output current source. The internal biasing network is composed of Q39-Q43. The N-channel FET Q43 supplies the initial current for zener diode Q39. The NPN transistor Q38 senses the zener voltage to derive the current reference for the multiple collector current source Q41. This special PNP transistor provides active pull-up for all of the other sections of the 4151. The input comparator section is composed of Q1-Q7. Lateral PNP transistors Q1-Q4 form the special ground-sensing input which is necessary for VFC operation at low input voltages. NPN transistors Q5 and Q6 convert the differential signal to drive the second gain stage Q7. If the voltage on input pin 7 is less than that on threshold pin 6, the comparator will be off and the collector of Q7 will be in the high state. As soon as the voltage on pin 7 exceeds the voltage on pin 6, the collector of Q7 will go low and trigger the one-shot. The one-shot is made from a voltage comparator and an R-S latch. Transistors Q12-Q15 and Q18-Q20 form the com- parator, while Q8-Q11 and Q16-Q17 make up the R-S latch. One latch output, open-collector reset transistor Q16, is con- nected to a comparator input and to the terminal, pin 5. Timing resistor Rg is tied externally from pin 5 to V* and timing capacitor Co is tied from pin 5 to ground. The other comparator input is tied to a voltage divider R3-R; which sets the comparator threshold voltage at 0.667 V*. One-shot operation is initiated when the collector of Q7 goes low and sets the latch. This causes Q16 to turn off, releasing the voltage at pin 5 to charge exponentially towards V* through Ro. As soon as this voltage reaches 0.667 V*, comparator output Q20 will go high causing Q10 to reset the latch. When the latch is reset, Q16 will discharge Co to ground. The one-shot has now completed its function of creating a pulse of period T=1.1 RoCo at the latch output, Q21. This pulse is buffered through Q23 to drive the open-collector logic circuit transistor Q32. During the one-shot period the logic output will be in the low state. The one-shot output is also used to switch the reference voltage by Q22 and Q24. The low T.C. reference voltage is derived from the combination of a 5.5V zener diode with resistor and diode level shift networks. A stable 1.89 volts is developed at pin 2, the emitter of Q33. Connecting the external current-setting resistor Rs=14.00 from pin 2 to ground gives 1354A from the collectors of Q33 and Q34. This current is reflected in the precision current mirror Q35-Q37 and produces the output current Ig at pin 1. When the R-S latch is reset, Q22 and Q24 will hold the reference voltage off, pin 2 will be at OV, and the current will be off. During the one-shot period T, the latch will be set, the voltage of pin 2 will go to 1.89V, and the output current will be switched on. @ TYPICAL APPLICATION 1. Single supply Voltage-to-Frequency Converter Figure 2 shows the simplest type of WFC that can be made with the 4151. Input voltage range is from 0 to +10V, and output frequency is from 0 to 10kHz. Full scale frequency can be tuned by adjusting Rs, the output current set resistor. This circuit has the advantage of being simple and low in cost, but it suffers from inaccuracy due to a number of error sources. Linearity error is typically 1%. A frequency offset will also be introduced by the input comparator offset voltage. Also, response time for this circuit is limited by the passive integration network RgCy. For the component values shown in Figure 2, response time for a step change input from 0 to +10V will be 135msec. For applications which require fast response time and high accuracy, use the circuits of Figure 3 and 4. yr O1luF 8 1 ld 5 TO PING 100kR : 7 2 TkQ Sk2 VOLTAGE Ce 4151 oe 1.04F T 6f vec [3 pur + fo FREQUENCY To 5 4 Ri OUTPUT a 5.1k2 fo Ro ., 6.8kQ + Co.01fF TO+Vi | je TOV" DESIGN EQUATIONS = Rs Hz fo=KVi WhereK = 0.486 Fn, Vv T=1.1RoCo Figure 2. Single Supply Voltage-to-Frequency Converter 7 -66 Mew Japars Radio Co, Lid.NJM4151 2. Precision VFC with Single Supply Voltage For applications which require a VFC which will operate from a single positive supply with positive input voltage, the circuit of Figure 3 will give greatly improved linearity, frequency offset, and response time. Here, an active integrator using one section of the NJM3403A quad ground-sensing op-amp has replaced the Rg-Cg network in Figure 2. Linearity error for this circuit is due only to the 4151 current source output conductance. Frequency offset is due only to the op-amp input offset and can be nulled to zero by adjusting Ry. This technique uses the op-amp bias current to develop the null voltage, so an op-amp with stable bias current, like the NJM3403A, is Tequired. Ci) 002uF Fe OFFSET ADJUST 0SViS+10V0-~Ww4 wet 1.0kQ Rs 200kQ | 34034, | 1.0kQ AN 1/4G f to0Kie a Rs-FULL SCALE TRIM sv _ 5kO 26k +15V 2 L fo 3 ! NJM4151 5.1kQ +L OUTPUT FREQUENCY OSfoS10kHz Figure 3. Precision Voltage-to-Frequency Converter Single Supply 3. Precision Voltage-to-Frequency Converter In this application (Figure 4) the 4151 VFC is used with an operational amplifier integrator to provide typical linearity of 0.05% over the range of 0 to 10V. Offset is adjustable to zero. Unlike many VFC designs which lose linearity below 10mV, this circuit retains linearity over the full range of input voltage, all the way to 0V. Trim the full scale adjust pot at V;=10V for an output frequency of 10kHz. The offset adjust pot should be set for 10Hz with an input voitage of 10mV. The 4131 operational amplifier integrator improves linearity of this circuit over that of Figure 2 by holding the output of the source, Pin 1, at a constant OV. Therefore linearity error due to the current source output conductance is eliminated. The diode connected around the op-amp prevents the voltage at 4151 pin 7 from going below 0. Use a low-leakage diode here, since any leakage will degrade the accuracy. This circuit can be operated from a single positive supply if an NJM3403A ground-sensing op-amp is used for the integrator. In this case, the diode can be left out. Note that even though the circuit itself will operate from a single supply, the input voltage is necessarily negative. For operation above 10kHz, bypass 4151 pin 6 with 0.01pF. 4 TC. 008 aF ve 10ka| oda Vv; oad 2p 7 5 {1002 3) shes R $100 1Rz kQ "410k FULL SCALE TRIM 10k 2 i 5kQ, 12k9 ADJUST TO vt Ri ey fo 2 51kO Rs 2 1 ve fe 3 8 | NJM4151 4) ovrc OZ 5 e 10k PREQUENCY ] FREQ $ O< fo< 10kHz $ 5.1kQ L WA ye Co Re OLLF 6.8kQ Figure 4. Precision Voltage-to-Frequency Converter New Japan Radio Co,Lid. 7-67 )NJM4191 4. Comparison of Voltage-to-Frequency Application Circuits Table 1 compares the VFC applications circuits for typical linearity, frequency offset, response time for a step input from 0 to 10 volts, sign of input voltage, and whether the circuit will operate from a single positive supply or split supplies. Table 1 Figure 2 Figure 3 Figure 4 Linearity 1% 0.2% 0.05% Frequency Offset +10Hz 0 0 Response Time 135msec 10msec 10msec Input Voltage + + - Single supply yes yes yes Split Supply - - yes 5. Frequency-to-Voltage Conversion The 4151 can be used as a frequency-to-voltage converter. Figure 5 shows the single-supply FVC configuration. With no signal applied, the resistor bias networks tied to pins 6 and 7 hold the input comparator in the off state. A negative going pulse applied to pin 6 (or positive pulse to pin 7) will cause the comparator to fire the one-shot. For proper operation, pulse width must be fess than the period of the one-shot, T=1.1 RoCo. For a 5Vp-p square-wave input the differentiator network formed by the input coupling capacitor and the resistor bias network will provide pulses which correctly trigger the one-shot. An external voltage comparator such as the NJM311 or NJM2901 can be used to square-up sinusoidal input signals before they are applied to the 4151. Also, the component values for the input signal differentiator and bias network can be altered to accommodate square waves with different amplitudes and frequencies. The passive integrator network RgCz filters the current pulses from the pin 1 output. For Jess output ripple, increase the value of Cx. +15V } Output Voltage 8 1 OVo 10k2 Ce R 10kQ ? Rs 1.0uf B 7 2 100kQ Frequency * $ | ats1 | ao + Input .0224f RS | eve 3 f1 O4F +O Pulse Output LS 10kQ Square Wave 5 4 5Ve-p R ~ 6.82 yp Co -Olad +15V Design Equations =f,;-K-! = Rs Hz Vo=f1-K-' where K =0. 486 ReRoGo V T =1.1RoCo Figure 5. Single Supply Frequency-to-Voltage Converter 7-68 Ro 6. 8k& to+15V We s | roca 3 10% Co Frequency. , Olef 7 5 Input O2zut 5 4 f, O44 4151 0<1< 10kHe 8! 5 ve 5k 122 | < 5 quare Wave 3 VIBV s Cy 10ke 5k *T Ry LOOKS? Full We Sg Scale} 4 5 phy Trim r A g| 1002 O 5 Vo Ra Voltage Output 100k22 -10VSVis0 ~15V Offset Trim Figure 6. Precision Frequency-to-Voltage ConverterJ NJM4151 6. Precision Frequency-to-Voltage Converter For increased accuracy and linearity, use an operational amplifier integrator as shown in Figure 6, the precision FVC configuration. Trim the offset to give ~10mV out with 10Hz in and trim the full scale adjust for 10V out with 10kHz in. Input signal conditioning for this circuit is necessary just as for the single supply mode, and scale factor can be program- med by the choice of component values. A tradeoff exists between output ripple and response time, through the choice of integration capacitor C,. If C,=0.1uF the ripple will be about 100mV. Response time constant tg=Rg-C;. For Rg=100k0. and C,=0.14F, tp=10ms = PRECAUTIONS 1. The voltage applied to comparator input pins 6 and 7 should not be allowed to go below ground by more than 0.3 volt. 2. Pins 3 and 5 are open-collector outputs. Shorts between these pins and V can cause overheating and eventual destruction. 3. Reference voltage terminal pin 2 is connected to the emitter of an NPN transistor and is held at approximately 1.9 volts. This terminal should be protected from accidental shorts to ground or supply voltages. Permanent damage may occur if current in pin 2 exceeds 5mA. 4. Avoid stray coupling between 4151 pins 5 and 7, which could cause false triggering. For the circuit of Figure 2, bypass pin 7 to ground with at least 0.01uF. If false triggering is experienced with the precision mode circuits, bypass pin 6 to ground with at least 0.014F. This is necessary for operation above 10kHz. = PROGRMMING THE 4151 The 4151 can be programmed to operate with a full scale frequency anywhere from 1.0Hz to 100kHz. In the case of the VFC configuration, nearly any full scale input voltage from 1.0V and up can be tolerated if proper scaling is employed. Here is how to determine component values for any desired full scale frequency. 1. Set Rs=14kQ or use a 12k0 resistor and 5kQ pot as shown in the figures. (The only exception to this is Figure 4.} 2 Set T=1.1RypCy=0.75[{I/fo] where fy is the desired full scale frequency. For optimum performance make 6.8k0<Rp<680k0 and 0.001pF<Cy<1.0uF 3. a) For the circuit of Figure 2 make Cg=107? [1/f)] Farads. Smaller values of Cg will give faster response time, but will also increase frequency offset and nonlinearity. b) For the active integrator circuits make C,=5x10~[I/fy] Farads. The op-amp integrator must have a slew rate of at least 135x10~[1/C,] volts per second where the value of C, is again give in Frads. 4. a) For the circuits of Figure 2 and 3 keep the values of Rg and Rg, as shown and use an input attenuator to give the desired full scale input voltage. b) For the precision mode circuit of Figure 4, set Rua=Vio/1002A where Vy is the full scale input voltage. Alter- nately the op-amp inverting input (summing node) can be used as a current input with full scale input current T= 100pA. 5. For the FVCs, pick the value of Cg or C, to give the optimum tradeoff between response time and output ripple for the particular application. DESIGN EXAMPLE Design a precision VFC (from Figure 4) with fp>=100kHz and V,)~10V. 1. Set Rs=14.0k0. 2. T=0.75 (1/10)=7.5usec Let Ry=6.8kQ. and Cy=0.0014F 3, Cy=5x 175(1/105)=S00pF Op-amp slew rate must be at lease SR=135x 10 (1/500pF)=0.27V/psec 4. Rg=10V/100nA= 100k. _ Il. Design a precision VFC with fy>=1Hz and V,y,=10V, 1. Let Rs=14.0k0. 2. T=0.75(1/1)=0.75sec Let Ry=680kQ2 and Cy=1.0uF 3. C=5x105(/1) F=S0uF 4 Ry= 100k New Japan Radio Co,Ltd. 7-69NJM4151 Ill. Design a single supply FVC to operate with a supply voltage of 8V and full scale input frequency f=83.3Hz. The output voltage must reach at least 0.63 of its final value in 200msec. Determine the output ripple. Set Rs=14.0k. T=0.75(1/83.3)=9msec Let Ro=82kQ and Cy)=0.14F Since this FVC must operate from 8.0V, we shall make the full scale output voltage at pin 6 equal to 5.0V. Rg=5SV/100~ZA=50kN. Output response time constant is tg<20msec Therefore Cg<tp/Rg=20010-7/50X10=4uF Worst case ripple voltage is: Vp=9mS x 1354A/44F=304mV WPYWNS IV. Design an opto-isolated V;< with high linearity which accepts a full scale input voltage of +10V. See Figure 7 for the final disign. This circuit uses the precision mode VFC configuration for maximum linearity. The NJM3403A quad op-amp provides the functions of inverter, integrator, regulator, and LED driver. +It v1 _ 10kQ WY 005uF oOo Why 4 15V +Vi 10k t owr--4 3403 A> 1002 aw. 12k Current or 10k2 Voltage Input 10kQ ry 1.22V ie Reference 5.110 8 7 6 OluF > > 4151 =" 3 10ko $6. sxe VFC 5k, 12k2 5 " to-Isolator op A Scare 3 4 aS FACTOR 7 F OUTPUT AAA 5 5. 1kQ -15V Figure 7. Opto-lsolated VFC 7-70 New goa Rodio Co, Lid.NJM4151 nnn m TYPICAL CHARACTERISTICS Va-fo Characteristics (VFC) 10,000, g vo a 5 1,000 cm 3 V=10V, Re=100k2, = Ro =5.1kQ 6 Ca=1.0nF, f loo Co=0.01uF s=15. 7k H : (Hz) SCALE FACTOR 1.000kH2/V 10 . ' Test Circuit: Fig.2 0.01 0.1 1 10 Input Voltage Vin (V) Scale Factor Characteristics 3,000 F Pp g a E 2,000 3 & V'=10V. Re=100k2 } a=1.0uF f, 1,000----~ Ro=5.1kQ He) Co=0.014F (Hz 500 Vin=1.0V \ Test Circuit : Fig.2 | 1 1 L 1 1 i 0 10 2 30 40 50 Rs (kQ) Ambient Temperature Characteristics o 2 10,050 .050,. he g 10 028 +100ppM/C Ka ~ 10,000, & 9\975b 9.950 i Test Circuit: Fig.2 f Vin =10.0V K =1.0kHz/V ~100ppM/C (Hz) 1 l l L i l 5 1 25 0 +25 +50 +75 +100+125 Ambient Temoerature Ta (C) Vw-fo Characteristics (VFC) 100p ~~ ~--~-- V*=10V, Re= 100k, Ro=5.1kQ Ca=5000pF, Co=500pF SCALE FACTOR 20kHz/V Test Circuit: Fig.2 1 1 4 4 6 8 10 Input Voltage Vin (V) Input Frequency vs. Output Voltage (FVC) V=15V, Re=L00kQ Ce=1.0uF Ro=5.1kQ Co=0.014F Vin= 5 Vp_p SQUARE WAVE Test Circuit: Fig.5 1 200 | S o ZS g om 2 3 } fy (Hz) 20F 0 1ofF ou on s s ~ Lof 2 Qa 3 6 Vout (vy) OTP 10 > 1,010 oO 5 a g i 1,000 2 3 990 980 fo (Hz) New Japan Radio Co, Ltd. i 100 1,000 10,000 Input Frequency fin (Hz) fo vs. Operating Voltage Vin =1.0V K=1.0kHz/V Test Circuit : Fig.2 Operating Voltage V* (V) 7-71