PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using
NextPower technology
22 August 2012 Product data sheet
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1. Product profile
1.1 General description
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
1.2 Features and benefits
•High reliability Power SO8 package, qualified to 175°C
•Low parasitic inductance
•Optimised for 4.5V Gate drive utilising NextPower Superjunction technology
•Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads
1.3 Applications
•DC-to-DC converters
•Load switching
•Server power supplies
•Synchronous buck regulator
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - - 40 V
IDdrain current Tmb = 25 °C; VGS = 10 V; Fig. 1 - - 24 A
Ptot total power dissipation Tmb = 25 °C; Fig. 2 - - 25 W
Tjjunction temperature -55 - 175 °C
Static characteristics
VGS = 4.5 V; ID = 5 A; Tj = 25 °C;
Fig. 12
- 22 26 mΩRDSon drain-source on-state
resistance
VGS = 10 V; ID = 5 A; Tj = 25 °C; Fig. 12 - 19 23 mΩ
Dynamic characteristics
QGD gate-drain charge VGS = 4.5 V; ID = 5 A; VDS = 20 V;
Fig. 14; Fig. 15
- 0.9 - nC
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 2 / 13
Symbol Parameter Conditions Min Typ Max Unit
QG(tot) total gate charge VGS = 4.5 V; ID = 5 A; VDS = 20 V;
Fig. 14; Fig. 15
- 4.3 - nC
2. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 S source
2 S source
3 S source
4 G gate
mb D mounting base; connected to
drain
mb
1 2 3 4
LFPAK; Power-
SO8 (SOT669)
S
D
G
mbb076
3. Ordering information
Table 3. Ordering information
PackageType number
Name Description Version
PSMN023-40YLC LFPAK;
Power-SO8
plastic single-ended surface-mounted package; 4 leads SOT669
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 40 V
VDGR drain-gate voltage 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ - 40 V
VGS gate-source voltage -20 20 V
VGS = 10 V; Tmb = 25 °C; Fig. 1 - 24 AIDdrain current
VGS = 10 V; Tmb = 100 °C; Fig. 1 - 17 A
IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 4 - 97 A
Ptot total power dissipation Tmb = 25 °C; Fig. 2 - 25 W
Tstg storage temperature -55 175 °C
Tjjunction temperature -55 175 °C
Tsld(M) peak soldering temperature - 260 °C
VESD electrostatic discharge voltage MM (JEDEC JESD22-A115) 100 - V
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 3 / 13
Symbol Parameter Conditions Min Max Unit
Source-drain diode
ISsource current Tmb = 25 °C - 23 A
ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 97 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 24 A;
Vsup ≤ 40 V; RGS = 50 Ω; unclamped;
Fig. 3
- 6.9 mJ
003aaj904
0 30 60 90 120 150 180
0
5
10
15
20
25
30
Tj (°C)
ID
(A)
Fig. 1. Continuous drain current as a function of
mounting base temperature
Tmb (°C)
0 20015050 100
03na19
40
80
120
Pder
(%)
0
Fig. 2. Normalized total power dissipation as a
function of mounting base temperature
003aaj905
10-3 10-2 10-1 1 10
10-1
1
10
102
tAL (ms)
IAL
(A)
(1)
(2)
Fig. 3. Single pulse avalanche rating; avalanche current as a function of avalanche time
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 4 / 13
003aaj906
10-1 1 10 102
10-1
1
10
102
VDS (V)
ID
(A)
DC
100 ms
10 ms
1 ms
100 us
tp = 10 us
Limit RDSon = VDS / ID
Fig. 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-mb) thermal resistance
from junction to
mounting base
Fig. 5 - 5.66 5.83 K/W
003aaj907
10-6 10-5 10-4 10-3 10-2 10-1 1
10-2
10-1
1
10
tp (s)
Zth(j-mb)
(K/W)
P
t
tp
T
tp
δ = T
single shot
δ = 0.5
0.2
0.1
0.05
0.02
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 5 / 13
6. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
ID = 250 µA; VGS = 0 V; Tj = 25 °C 40 - - VV(BR)DSS drain-source
breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 36 - - V
ID = 1 mA; VDS = VGS; Tj = 25 °C;
Fig. 10
1.05 1.67 1.95 V
ID = 10 mA; VDS = VGS; Tj = 150 °C;
Fig. 11
0.5 - - V
VGS(th) gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = -55 °C;
Fig. 11
- - 2.25 V
VDS = 40 V; VGS = 0 V; Tj = 25 °C - - 1 µAIDSS drain leakage current
VDS = 40 V; VGS = 0 V; Tj = 150 °C - - 100 µA
VGS = 16 V; VDS = 0 V; Tj = 25 °C - - 100 nAIGSS gate leakage current
VGS = -16 V; VDS = 0 V; Tj = 25 °C - - 100 nA
VGS = 4.5 V; ID = 5 A; Tj = 25 °C;
Fig. 12
- 22 26 mΩ
VGS = 4.5 V; ID = 5 A; Tj = 150 °C;
Fig. 12; Fig. 13
- - 44.5 mΩ
VGS = 10 V; ID = 5 A; Tj = 25 °C; Fig. 12 - 19 23 mΩ
RDSon drain-source on-state
resistance
VGS = 10 V; ID = 5 A; Tj = 150 °C;
Fig. 12; Fig. 13
- - 39.5 mΩ
RGgate resistance f = 1 MHz 0.85 1.7 3.4 Ω
Dynamic characteristics
ID = 5 A; VDS = 20 V; VGS = 10 V;
Fig. 14; Fig. 15
- 8.4 - nC
ID = 5 A; VDS = 20 V; VGS = 4.5 V;
Fig. 14; Fig. 15
- 4.3 - nC
QG(tot) total gate charge
ID = 0 A; VDS = 0 V; VGS = 10 V - 8 - nC
QGS gate-source charge - 1.3 - nC
QGS(th) pre-threshold gate-
source charge
- 0.7 - nC
QGS(th-pl) post-threshold gate-
source charge
- 0.6 - nC
QGD gate-drain charge
ID = 5 A; VDS = 20 V; VGS = 4.5 V;
Fig. 14; Fig. 15
- 0.9 - nC
VGS(pl) gate-source plateau
voltage
ID = 5 A; VDS = 20 V; Fig. 14; Fig. 15 - 2.5 - V
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 6 / 13
Symbol Parameter Conditions Min Typ Max Unit
Ciss input capacitance - 520 - pF
Coss output capacitance - 110 - pF
Crss reverse transfer
capacitance
VDS = 20 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; Fig. 16
- 40 - pF
td(on) turn-on delay time - 6.2 - ns
trrise time - 3.8 - ns
td(off) turn-off delay time - 9.9 - ns
tffall time
VDS = 20 V; RL = 4 Ω; VGS = 4.5 V;
RG(ext) = 5 Ω
- 3.1 - ns
Qoss output charge VGS = 0 V; VDS = 20 V; f = 1 MHz;
Tj = 25 °C
- 3.4 - nC
Source-drain diode
VSD source-drain voltage IS = 5 A; VGS = 0 V; Tj = 25 °C; Fig. 17 - 0.83 1.1 V
trr reverse recovery time - 12.9 - ns
Qrrecovered charge
IS = 5 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 20 V - 6.9 - nC
tareverse recovery rise
time
- 8.7 - ns
tbreverse recovery fall
time
VGS = 0 V; IS = 5 A; dIS/dt = -100 A/µs;
VDS = 20 V; Fig. 18
- 4.2 - ns
003aaj908
0 0.5 1 1.5 2
0
5
10
15
20
25
VDS (V)
ID
(A)
2.2 V
2.4 V
2.6 V
2.8 V
VGS = 3 V
3.5 V
4.5 V
10 V
Fig. 6. Output characteristics; drain current as a
function of drain-source voltage; typical values
Fig. 7. Drain-source on-state resistance as a function
of gate-source voltage; typical values
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 7 / 13
003aaj910
0 5 10 15 20 25
0
10
20
30
40
50
ID (A)
gfs
(S)
Fig. 8. Forward transconductance as a function of
drain current; typical values
003aaj911
0 0.5 1 1.5 2 2.5 3 3.5 4
0
5
10
15
20
25
VGS (V)
ID
(A)
Tj = 25°C
150°C
Fig. 9. Transfer characteristics; drain current as a
function of gate-source voltage; typical values
003aaj912
0 0.6 1.2 1.8 2.4 3
10-6
10-5
10-4
10-3
10-2
10-1
VGS (V)
ID
(A)
TypMin Max
Fig. 10. Sub-threshold drain current as a function of
gate-source voltage
003aaj913
-60 -30 0 30 60 90 120 150 180
0
0.5
1
1.5
2
2.5
3
Tj (°C)
VGS(th)
(V)
1mA
ID = 5mA
Max(1mA)
Min(5mA)
Fig. 11. Gate-source threshold voltage as a function of
junction temperature
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 8 / 13
Fig. 12. Drain-source on-state resistance as a function
of drain current; typical values
003aaj915
-60 -30 0 30 60 90 120 150 180
0
0.4
0.8
1.2
1.6
2
Tj (°C)
a10 V
VGS = 4.5 V
Fig. 13. Normalized drain-source on-state resistance
factor as a function of junction temperature
003aaa508
VGS
VGS(th)
QGS1 QGS2
QGD
VDS
QG(tot)
ID
QGS
VGS(pl)
Fig. 14. Gate charge waveform definitions
003aaj916
0 2 4 6 8 10
0
2
4
6
8
10
QG (nC)
VGS
(V)
20 V
VGS = 8 V
32V
Fig. 15. Gate-source voltage as a function of gate
charge; typical values
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 9 / 13
003aaj917
10-1 1 10 102
10
102
103
VDS (V)
C
(pF) Ciss
Coss
Crss
Fig. 16. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aaj918
0 0.2 0.4 0.6 0.8 1 1.2
0
5
10
15
20
25
VSD (V)
IS
(A)
Tj = 25°C150°C
Fig. 17. Source current as a function of source-drain
voltage; typical values
003 a af 444
0
t (s )
ID
(A)
IRM
0.25 I
RM
trr
tatb
Fig. 18. Reverse recovery timing definition
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 10 / 13
7. Package outline
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT669 MO-235 06-03-16
11-03-25
0 2.5 5 mm
scale
e
E1
b
c2
A2
A2b cA eUNIT
DIMENSIONS (mm are the original dimensions)
mm 1.10
0.95
A3
A1
0.15
0.00
1.20
1.01
0.50
0.35
b2
4.41
3.62
b3
2.2
2.0
b4
0.9
0.7
0.25
0.19
c2
0.30
0.24
4.10
3.80
6.2
5.8
H
1.3
0.8
L2
0.85
0.40
L
1.3
0.8
L1
8°
0°
w y
D(1)
5.0
4.8
E(1)
3.3
3.1
E1(1)
D1(1)
max
0.25 4.20 1.27 0.25 0.1
12 3 4
mounting
base
D1
c
Plastic single-ended surface-mounted package (LFPAK; Power-SO8); 4 leads SOT669
E
b2
b3
b4
HD
L2
L1
A
A
wM
C
C
X
1/2 e
y C
θ
θ
(A )
3
L
A
A1
detail X
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
Fig. 19. Package outline LFPAK; Power-SO8 (SOT669)
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 11 / 13
8. Legal information
8.1 Data sheet status
Document
status [1][2]
Product
status [3]
Definition
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
8.2 Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product
is deemed to offer functions and qualities beyond those described in the
Product data sheet.
8.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
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authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 12 / 13
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor
tested in accordance with automotive testing or application requirements.
NXP Semiconductors accepts no liability for inclusion and/or use of non-
automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without NXP Semiconductors’ warranty
of the product for such automotive applications, use and specifications, and
(b) whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
8.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
NXP Semiconductors PSMN023-40YLC
N-channel 40 V 23mΩ logic level MOSFET in LFPAK using NextPower
technology
PSMN023-40YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 22 August 2012 13 / 13
9. Contents
1 Product profile ....................................................... 1
1.1 General description .............................................. 1
1.2 Features and benefits ...........................................1
1.3 Applications .......................................................... 1
1.4 Quick reference data ............................................ 1
2 Pinning information ............................................... 2
3 Ordering information .............................................2
4 Limiting values .......................................................2
5 Thermal characteristics .........................................4
6 Characteristics .......................................................5
7 Package outline ................................................... 10
8 Legal information .................................................11
8.1 Data sheet status ............................................... 11
8.2 Definitions ...........................................................11
8.3 Disclaimers .........................................................11
8.4 Trademarks ........................................................ 12
© NXP B.V. 2012. All rights reserved
For more information, please visit: http://www.nxp.com
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Date of release: 22 August 2012
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