HUF76129S3STK - Fairchild Semiconductor

HUF76129P3 , HUF76129S3S

56A, 30V, 0.016 Ohm, N-Channel, Logic

Level UltraFET Power MOSFETs

These N-Chann el power MOSFETs

are manufactured using the

innovative Ul traFET™ pr ocess.

This advanced process technology

achie ves the lo west pos sible on-resi stance per sil icon area,

resultin g in outstanding performanc e. This dev ice is capable

of wit hstanding hi gh energ y in the avalanche mode and the

diode e xhibits v ery lo w revers e recovery time and stored

charge. It w as designed for use in applica ti ons where po wer

efficiency is important, such as switching regulators,

switching converters , motor drivers , relay drivers, low-

voltage bus s w itches, and power management in portab le

and battery-operated products.

Formerly deve lopmental type TA76129.

Features

• Logic Level Gate Driv e

• 56A, 30V

•Ultr a Low On-Resi stance, rDS(ON) = 0.016Ω

• Tem peratur e Com pensating PSPI CE® Model

• Tem peratur e Com pensating SABER© Model

• Thermal Impedanc e SPICE Model

• Thermal Impedanc e SABER Model

• Peak Current vs Pulse Widt h Curve

• UIS Rating Curve

• Related Literature

- TB334, “G uidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

Ordering Information

PART NUMBER PACKAGE BRAND

HUF76129P3 TO-220AB 76129P

HUF76129S3S TO-263AB 76129S

NOTE: When ordering, use the entire part number. Add the suffix T to

obtain the TO-263AB variant in tape and reel, e.g., HUF76129S3ST.

JEDEC TO-220AB JEDEC TO-263AB

DRAIN

SOURCE

GATE

DRAIN

(FLANGE) GATE

SOURCE

DRAIN

(FLANGE)

Data Sheet Januar y 2003

Absolute Maximum Rat ings TC = 25oC, Unless Otherwise Specif ied UNITS

Drain to Source V o ltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDSS 30 V

Drain to Gate Voltage (RGS = 20k Ω) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 30 V

Gate to Source Vo ltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V

Drain Current

Continuous (TC = 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID

Continuous (TC = 100oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID

Continuous (TC = 100oC, VGS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM

Figu re 4

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Figures 6, 17, 1 8

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

0.83 W

W/oC

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -40 to 1 5 0 oC

Maximu m Temperature for S oldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL

Package Body f or 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300

260

CAUT ION: St ress es above those list ed in “Abs olute Maximum Rati ngs” may cause per mane nt damage to the device. This is a str ess only rating and operati on of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. TJ = 25oC to 150oC.

Electrical Speci fications TA = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OFF STATE SPECIFICATIONS

Dr ain t o Sou rce Breakdown Voltag e BVDSS ID = 250µA, VGS = 0V (Figure 12) 30 - - V

Z ero Gat e V ol tag e D rain C urr e nt IDSS VDS = 25V, VGS = 0V - - 1 µA

VDS = 25V, VGS = 0V, TC = 1 5 0oC--250µA

Ga te t o Sour c e Le ak ag e C urr e nt IGSS VGS = ±20V - - ±100 nA

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 11) 1 - 3 V

Drain t o Source On Resistance rDS(ON) ID = 56A, VGS = 10V (Figure 9, 10) - 0.014 0.016 Ω

ID = 35A, VGS = 5V (Figure 9) - 0.0175 0.021 Ω

ID = 34A, VGS = 4.5V - 0.0195 0.023 Ω

THERMAL SPECIFICATIONS

T her m al Res ista nc e Ju ncti on to Case RθJC (Figu re 3) - - 1.20 oC/W

Thermal Resistance Junction to Ambient RθJA TO-220 and TO-263 - - 62 oC/W

SWITCHING SPECIFICATIONS (VGS = 4.5V)

Turn -On Time tON VDD = 15V , ID ≅ 34A,

RL = 0.441Ω, V GS = 4.5V,

RGS = 6.8Ω

(Figures 15, 21, 22)

--160ns

Turn-O n Delay Time td(ON) -14-ns

Rise Time tr-90-ns

Turn-O ff Delay Time td(OFF) -28-ns

Fa ll Time tf-32-ns

Turn -Off Time tOFF --90ns

HUF76129P3, HUF76129S3S

SWITCHING SPECIFICATIONS (VGS = 10V)

Turn -On Time tON VDD = 15V , ID ≅ 56A,

RL = 0.268Ω, V GS = 10V,

RGS = 8.2Ω

(Figures 16, 21, 22)

--62ns

Turn-O n Delay Time td(ON) -11-ns

Rise Time tr-30-ns

Turn-O ff Delay Time td(OFF) -68-ns

Fa ll Time tf-35 -ns

Turn -Off Time tOFF --155ns

GATE CHARGE SPECIFICATIONS

T otal G ate Charg e Qg(TOT) VGS = 0V to 10V VDD = 15V,

ID ≅ 35A,

RL = 0 .429Ω

Ig(REF) = 1.0mA

(F ig ur e s 14 , 19, 20)

-3745nC

Gat e Charg e at 5V Qg(5) VGS = 0V to 5V - 19 23 nC

T hresh old G ate Ch arge Qg(TH) VGS = 0V to 1V - 1.4 1.7 nC

Ga te to Sourc e Gate Charg e Qgs -4.50- nC

Ga te t o Drai n “M iller ” C ha rge Qgd - 10.30 - nC

CAPACITANCE SPECIFICATIONS

Input Capacitance CISS VDS = 25V, VGS = 0V,

f = 1MHz

(Figure 13)

- 1350 - pF

Output Capacitance COSS -700- pF

Reverse Transfer Capacitance CRSS -160- pF

Electrical Speci fications TA = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Specific ations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Volta ge VSD ISD = 35A - - 1.25 V

Reverse Recovery Time trr ISD = 35A, dISD/dt = 100A/µs--60ns

Reverse Recovered Charge QRR ISD = 35A, dISD/dt = 100A/µs - - 105 nC

Typical Performance Curves

FIGURE 1. NORMALIZED PO WER DISSIPATI ON vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPER ATURE

TC, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

00255075100 150

0.2

0.4

0.6

0.8

1.0

1.2

125

025 50 75 100 125

ID, DRAIN CURRENT (A)

TC, CASE TEMPERATURE (oC)

150

40 VGS = 4.5V

VGS = 10V

HUF76129P3, HUF76129S3S

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

FIGURE 4. PEAK CURRENT CAPABILITY

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA NOTE: Refer to Fairchild Application Not es AN9321 and AN9322.

FIGURE 6. UNCL AMPED INDUCTIVE SWITCHING

CAPABILITY

Typical Performance Curves (Continued)

t, RECTANGULAR PULSE DURATION (s)

10-5 10-1 100

0.1

10-2

ZθJC, NORMALIZED

THERMAL IMPEDANCE

0.01 10-4 10-3

SINGLE PULSE NOTES:

DUTY FACTOR: D = t1/t2

PEAK TJ = PDM x ZθJC x RθJC + TC

PDM

t1t2

101

DUTY CYCLE - DESCENDING ORDER

0.5

0.2

0.1

0.05

0.01

0.02

TC = 25oC

I = I25 150 - TC

125

FOR TEMPERATURES

ABOVE 25oC DERATE PEAK

CURRENT AS FOLLOWS:

VGS = 10V

TRANSCONDUCTANCE

MAY LIMIT CURRENT

IN THIS REGION

IDM, PEAK CURRENT (A)

2000

10-5 10-4 10-3 10-2 10-1 100101

t, PULSE WIDTH (s)

100

VGS = 5 V

1000

TJ = MAX RATED

TC = 25oC

100µs

10ms

1ms

BVDSS MAX = 30V

LIMITED BY rDS(ON)

AREA MAY BE

OPERATION IN THIS

1001VDS, DRAIN TO SOURCE VOLTAGE (V)

100

1000

ID, DRAIN CURRENT (A)

10 1 10 100

100

0.01

1000

IAS, AVALANCHE CURRENT (A)

tAV, TIME IN AVALANCHE (ms)

STARTING TJ = 25oC

STARTING TJ = 150oC

0.1

0.001

tAV = (L)(IAS)/(1. 3*RATED BVDSS - VDD)

If R = 0

If R ≠ 0

tAV = (L/R)l n[(IAS*R)/(1.3*RA TED BVDSS - VDD) +1]

HUF76129P3, HUF76129S3S

FIGURE 7. TRANSFER CHARACTERISTICS FIGURE 8. SATURATION CHARACTERISTICS

FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 10. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

FIGURE 11. NORMALIZED GATE THRESHOLD V OLTAGE vs

JUNCTION TEMPERATURE FIGURE 12. NORMALIZED DRAIN T O S OURCE BREAKDOW N

VOLTAGE vs JUNCTION TEMPERATURE

Typical Performance Curves (Continued)

023451

ID, DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

150oC

-40oC

25oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VDD = 15V

VGS = 3.5V

012345

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 3V

80 PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VGS = 4V

VGS = 5V

VGS = 10V

VGS = 4.5V

10 4

VGS, GATE TO SOURCE VOLTAGE (V)

26108

ID = 56A

ID = 35A

ID = 20A

rDS(ON), DRAIN TO SOURCE

ON RESISTANCE (mΩ)

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0.8

1.0

1.2

1.6

NORMALIZED DRAIN TO SOURCE

TJ, JUNCTION TEMPERATURE (oC)

ON RESISTANCE

1.4

-60 -0 60 120 180

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VGS = 10V, ID = 56A

-60 0 60 120

0.6

0.7

1.1

1.2

NORMALIZED GATE

TJ, JUNCTION TEMPERATURE (oC)

THRESHOLD VOLTAGE

VGS = VDS, ID = 250µA

180

0.9

0.8

1.0

1.15

1.10

1.00

0.95

0.90

-60 0 60 160

TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

BREAKDOWN VOLTAGE

ID = 250µA

180

1.05

HUF76129P3, HUF76129S3S

FIGURE 13. CAPACITANCE vs DRAIN T O SOURCE VOLTAGE

NOTE: Refer to Fairchild Application Notes 7254 and 7260.

FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT

GATE CURRENT

FIGURE 15. SWITCHING TIME vs GATE RESISTANCE FIGURE 16. SWITCHING TIME vs GATE RESISTANCE

Test Circuits and Waveforms

FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 18. UNCLAMPED ENERGY WAVEFORMS

Typical Performance Curves (Continued)

COSS

2000

1200

00 5 15 25

C, CAPACITANCE (pF)

1600

VDS, DRAIN TO SOURCE VOLTAGE (V)

800

400

CISS

CRSS

10 20

VGS = 0V, f = 1MHz

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGD

VGS, GATE TO SOURCE VOLTAGE (V)

VDD = 15V

30 400

, GATE CHARGE (nC)

ID = 56A

ID = 35A

ID = 20A

WAVEFORMS IN

DESCENDING ORDER:

100

20 30 40 500

400

300

200

010

SWITCHING TIME (ns)

RGS, GATE TO SOURCE RESISTANCE (Ω)

td(OFF)

td(ON)

VGS = 4.5V, VDD = 15V, ID = 34A, RL = 0.441Ω

150

20 30 40 50

300

250

200

010

SWITCHING TIME (ns)

RGS, GATE TO SOURCE RESISTANCE (Ω)

td(OFF)

td(ON)

VGS = 10V, VDD = 15V, ID = 56A, RL = 0.268Ω

100

VGS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VDD

VDS

BVDSS

IAS

tAV

HUF76129P3, HUF76129S3S

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

FIGURE 21. SWI TCHING TIME TEST CIRCUIT FIGURE 22. SWITCHIN G TIME WAVEFORM

Test Circuits and Waveforms (Continued)

VGS +

VDS

VDD

DUT

Ig(REF)

VDD

Qg(TH)

VGS = 1V

Qg(5)

VGS = 5V

Qg(TOT)

VGS = 10

VDS

VGS

Ig(REF)

VGS

RGS DUT

-VDD

VDS

VGS

tON

td(ON)

90%

10%

VDS 90%

10%

td(OFF)

tOFF

90%

50%

10% PULSE WIDTH

VGS

HUF76129P3, HUF76129S3S

PSPICE Electrical Model

SUBCKT HUF76129 2 1 3 ; REV August 1998

C A 12 8 1. 95e -9

CB 15 14 2.06e -9

CIN 6 8 1.18e-9

D BODY 7 5 DBODYM O D

DBREAK 5 11 DBREAKMOD

DPLCAP 10 5 DPLCAPMOD

EBREAK 11 7 17 18 33.5

EDS 14 8 5 8 1

EGS 13 8 6 8 1

ESG 6 10 6 8 1

EVTH RES 6 21 19 8 1

EVTEM P 20 6 18 22 1

IT 8 1 7 1

LDRAIN 2 5 1e-9

LGATE 1 9 4.02e- 9

LSOU RCE 3 7 3.45e-9

MMED 16 6 8 8 M M EDMOD

MSTR O 16 6 8 8 M S T ROM O D

MWEAK 16 21 8 8 M WE AKMOD

RBREAK 17 18 RBREAKMOD 1

RDRAIN 50 16 RDRAINMOD 1.3e-3

RG ATE 9 20 3.5

RL DRAIN 2 5 10

RLGATE 1 9 40 .2

RLSOURCE 3 7 34.5

RSLC1 5 51 R SL CM OD 1e-6

RSLC2 5 50 1e 3

RSOURCE 8 7 RSOURCEMOD 8e-3

RVT HRE S 2 2 8 RVTHRESM OD 1

RVTEMP 18 19 RVTEMPMOD 1

S1A 6 12 13 8 S1A M OD

S1B 13 12 13 8 S1BMO D

S2A 6 15 14 13 S2AMO D

S2B 13 15 14 13 S2BMOD

VBAT 22 19 DC 1

ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*1000),3.5))}

.MO DE L DB ODY M OD D (IS = 1e-12 IKF = 10 R S = 5. 6e-3 TRS1 = 5e-4 TRS 2 = 1e-6 CJ O = 2.23e -9 TT = 2e-7 M = 4e-1 N = 9.9e -1 XTI =4 .7 5 )

.MODEL DBREAKMOD D (RS = 1.5e-1 IS = 1e-14 TRS1 = 9e-4 TRS2 = -2e-5 IKF = 1e-1)

.MODEL DPLCAPMOD D (CJO = 1.12e-9 IS = 1e-30 N = 10 M = 6.7e-1 VJ = 1.45)

.MODE L M M EDMOD NM OS (VTO = 2 KP = 5. 75 IS = 1e-30 N = 10 TO X = 1 L = 1u W = 1u RG = 3. 6)

.MODE L M STROMOD NMOS (V T O = 2.3 KP = 80 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)

.MODEL MWEAKMOD NMOS (VTO = 1.62 KP =2e-2 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 36)

.MO DE L RBR EAK MOD RE S (TC1 = 9.8e-4 TC2 = -1e-10)

.MO DEL RDRAINMOD RE S (TC1 = 2e-2 T C2 = 1e-7)

.MO DE L RS LCMO D RES (TC1 = 1e- 6 T C2 = 1.05e-6)

.MODEL RSOURCEMOD RES (TC1 = 5e-4 TC2 = 1e-5)

.MODEL RVTHRESMOD RES (TC1 = -2e-3 TC2 = -1.1e-5)

.MO DE L RVTE M P MOD R ES (T C1 = -1. 65e-3 TC2 = 1.4 5e-6)

.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.3 VOFF = -2.0)

.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.0 VOFF = -4.3)

.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.8 VOFF = 0.5)

.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF = -0.8)

.ENDS

NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global

Temperat ure O ptions; IEEE Power Electronics Specialist Conf e rence Records, 1991, written by William J. Hepp and C. Frank Wheatley.

RBREAK

RVTEMP

VBAT

RVTHRES

17 18

S1A

S1B

S2A

S2B

CA CB

EGS EDS

814

MWEAK

EBREAK DBODY

RSOURCE

SOURCE

LSOURCE

RLSOURCE

CIN

RDRAIN

EVTHRES 16

MMED

MSTRO

DRAIN

LDRAIN

RLDRAIN

DBREAK

DPLCAP

ESLC

RSLC1

RSLC2

GATE RGATE EVTEMP

ESG

LGATE

RLGATE 20

HUF76129P3, HUF76129S3S

Saber Electrical Model

nom tem p=25 deg c 30v LL Ultrafet

REV A ugust 1998

templ ate hu f76129 n2,n1,n3

electrical n2,n1,n3

{

var i iscl

d..model dbody m od = (i s=1. e-12, xti=4.75, cjo=2.23e-9, tt=20e-8, m= 4e-1, n=9.9e- 1)

d..model dbreakmod = (is=1e-14)

d..model dplcapmod = (cjo=1.12e-9, i s=1e-30,n=10, m = 6. 7e-1, vj=1.4 5,)

m..model mmedmod = (type=_n,vto=2,kp=5.75,is=1e-30, tox=1)

m..model mstrongmod = (type=_n,vto=2.3,kp=80,is=1e-30, tox=1)

m..model mweakmod = (type=_n,vto=1.62,kp=2e-2,is=1e-30, tox=1)

sw_v cs p.. mo del s 1amo d = (ron=1e-5,roff= 0. 1,vo n=-4.3,voff = -2)

sw_v cs p.. mo del s 1bmo d = (ron=1e-5,roff= 0. 1,vo n=-2,vof f=-4.3)

sw_v cs p..mo del s2amod = (ron=1e- 5,roff=0. 1, von=- 0.8,vof f=0. 5)

sw_v cs p..mo del s2bmod = (ron=1e- 5,roff=0. 1, von=0.5,v off=-0.8)

c.ca n12 n8 = 1.95e-9

c.c b n15 n14 = 2. 06e-9

c.cin n6 n8 = 1.18 e-9

d.dbody n7 n71 = model=dbodymod

d.dbreak n72 n11 = m odel=dbreakmod

d.dplcap n10 n5 = m odel =dplcapmod

i.it n8 n17 = 1

l.ldrain n2 n5 = 1e-9

l.lg ate n1 n9 = 4.02e-9

l.lsource n3 n7 = 3.45e-9

m.mmed n16 n6 n8 n8 = model=m m edm od, l= 1u, w=1 u

m.ms t rong n16 n6 n8 n8 = model=m strongmo d, l= 1u, w=1 u

m.mw eak n16 n21 n8 n8 = model =m weakmod , l=1u, w =1u

res. rbreak n17 n18 = 1, tc1=9. 8e-4, tc 2=-1e-9

res. rdbody n71 n5 =5.6e- 3, tc 1=5e-4, tc 2=1e-6

res. rdbreak n7 2 n5 =1.5e -1, tc 1=9e-4, tc2=-2 e-5

res. rdrain n50 n16 = 1.3e- 3, tc 1=2e-2, tc2 =1e-7

r e s .rg ate n9 n2 0 = 3. 5

res. rl drain n2 n5 = 10

res. rl gate n1 n9 = 40.2

res. rl sour ce n3 n7 = 34. 5

res. rslc1 n5 n51 = 1e- 6, tc1=1e-6, tc2 =-1.05 e-6

res. rslc2 n5 n50 = 1e 3

res.rsource n8 n7 = 8e-3, tc1=5e-4,tc2=1e-5

res.rvtemp n18 n19 = 1, tc1=-1.65e-3,tc2=1.45e-9

res. rvth res n22 n8 = 1, tc1=-2e-3,tc 2=-1. 1e-5

spe. ebreak n11 n7 n17 n18 = 33. 5

spe. eds n14 n8 n5 n8 = 1

spe. egs n13 n8 n6 n8 = 1

spe. esg n6 n10 n6 n8 = 1

spe. evtemp n20 n6 n18 n22 = 1

spe.evthres n6 n21 n19 n8 = 1

sw_v cs p.s1a n6 n12 n13 n8 = model =s1a m od

sw_v cs p.s1 b n13 n12 n13 n8 = model=s1bmod

sw_v cs p.s2 a n6 n15 n14 n13 = model=s2amod

sw_v cs p.s2 b n13 n15 n14 n13 = mod el =s2bmod

v.vbat n22 n19 = dc=1

equations {

i (n51->n50) +=iscl

iscl : v (n51, n50) = ((v (n5,n51) / (1e-9+abs (v(n5,n51))))*(( abs(v (n5,n 51)*1e6/ 1000))** 3.5 ))

}

RBREAK

RVTEMP

VBAT

RVTHRES

17 18

S1A

S1B

S2A

S2B

CA CB

EGS EDS

814

MWEAK

EBREAK DBODY

RSOURCE

SOURCE

LSOURCE

RLSOURCE

CIN

RDRAIN

EVTHRES 16

MMED

MSTRO

DRAIN

LDRAIN

RLDRAIN

DBREAK

DPLCAP

ISCL

RSLC1

RSLC2

GATE RGATE EVTEMP

ESG

LGATE

RLGATE 20

RDBODY

RDBREAK

HUF76129P3, HUF76129S3S

SPICE Th ermal Model

REV August 1998

HUF76129

CTHERM1 th 6 1.10e-5

CTHERM2 6 5 2.70e-2

CTHERM3 5 4 3.90e-2

CTHERM4 4 3 1.00e-2

CTHERM5 3 2 2.30e-2

CTHERM6 2 tl 1.80

RTHERM1 th 6 1.00e-4

RTHERM2 6 5 5.00e-4

RTHERM3 5 4 2.90e-2

RTHERM4 4 3 4.80e-1

RTHERM5 3 2 2.80e-1

RTHERM6 2 tl 1.00e-1

Saber Thermal Model

Saber thermal model HUF76129

template thermal_model th tl

thermal_c th, tl

{

ctherm.ctherm1 th c2 =1.10e-5

ctherm.ctherm2 c2 c3 =2.70e-2

ctherm.ctherm3 c3 c4 =3.90e-2

ctherm.ctherm4 c4 c5 =1.00e-2

ctherm.ctherm5 c5 c6 =2.30e-2

ctherm.ctherm6 c6 tl=1.80

rtherm.rtherm1 th c2 =1.00e-4

rtherm.rtherm2 c2 c3 =5.00e-4

rtherm.rtherm3 c3 c4 =2.90e-2

rtherm.rtherm4 c4 c5 =4.80e-1

rtherm.rtherm5 c5 c6 =2.80e-1

rtherm.rtherm6 c6 tl=1.00e- 1

}

RTHERM4

RTHERM6

RTHERM5

RTHERM3

RTHERM2

RTHERM1

CTHERM4

CTHERM6

CTHERM5

CTHERM3

CTHERM2

CTHERM1

th JUNCTION

CASE

HUF76129P3, HUF76129S3S

Rev. I2

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PRODUCT STATUS DEFINITIONS

Defini ti on of Terms

ACEx™

ActiveArray™

Bottomless™

CoolFET™

CROSSVOLT™

DOME™

EcoSPARK™

E2CMOS™

EnSigna™

FACT™

FACT Quiet Series™

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SPM™

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SuperSOT™-3

SuperSOT™-6

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SyncFET™

TinyLogic®

TruTranslation™

UHC™

UltraFET®

VCX™

A cross the board. Around the world.™

T he Power Franchi se™

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Advance Information Formati ve or In

Design This datasheet contains the design specificat ions for

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supplementary data will be published at a later date.

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changes at any t ime without notice in order to impr ove

design.

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