74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger Rev. 03 -- 24 January 2006 Product data sheet 1. General description The 74HC273; 74HCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC273; 74HCT273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common clock (pin CP) and master reset (pin MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the clock and master reset are common to all storage elements. 2. Features Ideal buffer for MOS microprocessor or memory Common clock and master reset Eight positive edge-triggered D-type flip-flops Complies with JEDEC standard no. 7A ESD protection: HBM EIA/JESD22-A114-C exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 C; tr = tf = 6 ns. Symbol Parameter Conditions Min Typ Max Unit 74HC273 tPHL, tPLH propagation delay CP to Qn VCC = 5 V; CL = 15 pF - 15 - ns tPHL HIGH-to-LOW propagation delay MR to Qn VCC = 5 V; CL = 15 pF - 15 - ns fmax maximum input clock frequency VCC = 5 V; CL = 15 pF - 66 - MHz 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 1: Quick reference data ...continued GND = 0 V; Tamb = 25 C; tr = tf = 6 ns. Symbol Parameter Ci Conditions input capacitance power dissipation capacitance CPD [1] per flip-flop; VI = GND to VCC Min Typ Max Unit - 3.5 - pF - 20 - pF 74HCT273 tPHL, tPLH propagation delay CP to Qn VCC = 5 V; CL = 15 pF - 15 - ns tPHL HIGH-to-LOW propagation delay MR to Qn VCC = 5 V; CL = 15 pF - 20 - ns fmax maximum input clock frequency VCC = 5 V; CL = 15 pF - 36 - MHz Ci input capacitance - 3.5 - pF CPD power dissipation capacitance - 23 - pF [1] [1] per flip-flop; VI = GND to (VCC - 1.5 V) CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of outputs. 4. Ordering information Table 2: Ordering information Type number Package Temperature range Name Description Version 74HC273N -40 C to +125 C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1 74HC273D -40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 74HC273DB -40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 74HC273PW -40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74HC273BQ -40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm SOT764-1 74HCT273N -40 C to +125 C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1 74HCT273D -40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 74HC273 74HCT273 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 2 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 2: Ordering information ...continued Type number Package Temperature range Name Description Version 74HCT273DB -40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 74HCT273PW -40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74HCT273BQ -40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm SOT764-1 5. Functional diagram 3 4 7 8 13 14 17 18 1 11 D0 D1 D2 D3 D4 D5 D6 D7 FF1 TO FF8 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 2 5 6 9 12 15 16 19 MR CP 001aae055 Fig 1. Functional diagram CP MR 11 1 C1 R 11 3 4 7 8 13 14 17 18 D0 CP D0 Q0 D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 2 5 6 9 12 15 16 19 MR 1 D2 D3 D4 D5 D6 D7 mna763 Fig 2. Logic symbol 2 1D 4 5 7 6 8 9 13 12 14 15 17 16 18 19 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 mna764 Fig 3. IEC logic symbol 74HC_HCT273_3 Product data sheet D1 3 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 3 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger D0 D1 D Q D2 D Q D3 D Q D Q CP FF1 CP FF2 CP FF3 CP FF4 RD RD RD RD CP MR Q0 D4 Q1 D5 D Q Q2 D6 D Q Q3 D7 D Q D Q CP FF5 CP FF6 CP FF7 CP FF8 RD RD RD RD Q4 Q5 Q6 Q7 001aae056 Fig 4. Logic diagram 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 4 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger 6. Pinning information 6.1 Pinning 1 terminal 1 index area 74HC273 74HCT273 20 VCC MR 74HC273 74HCT273 Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 MR 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 Q1 5 16 Q6 15 Q5 4 17 D6 Q2 6 5 16 Q6 D2 7 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 GND 10 11 CP 8 Q3 9 13 D4 12 Q4 GND 10 D3 14 D5 GND (1) CP 11 D1 Q1 001aae054 Transparent top view 001aae053 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as supply pin or output. Fig 5. Pin configuration DIP20, SO20, SSOP20 and TSSOP20 Fig 6. Pin configuration DHVQFN20 6.2 Pin description Table 3: Pin description Symbol Pin Description MR 1 master reset input (active LOW) Q0 2 flip-flop output 0 D0 3 data input 0 D1 4 data input 1 Q1 5 flip-flop output 1 Q2 6 flip-flop output 2 D2 7 data input 2 D3 8 data input 3 Q3 9 flip-flop output 3 GND 10 ground (0 V) CP 11 clock input (LOW-to-HIGH, edge-triggered) Q4 12 flip-flop output 4 D4 13 data input 4 D5 14 data input 5 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 5 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 3: Pin description ...continued Symbol Pin Description Q5 15 flip-flop output 5 Q6 16 flip-flop output 6 D6 17 data input 6 D7 18 data input 7 Q7 19 flip-flop output 7 VCC 20 supply voltage 7. Functional description 7.1 Function table Table 4: Function table [1] Operating modes Control Input Output MR CP Dn Qn Reset (clear) L X X L Load 1 H h H Load 0 H I L [1] H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition; L = LOW voltage level; I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition; = LOW-to-HIGH transition; X = don't care. 8. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions IIK input clamping current IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V IO output current ICC quiescent supply current IGND ground current - -50 mA Tstg storage temperature -65 +150 C VI < -0.5 V or VI > VCC + 0.5 V VO = -0.5 V to (VCC + 0.5 V) 74HC_HCT273_3 Product data sheet Min Max Unit -0.5 +7 V - 20 mA - 20 mA - 25 mA - 50 mA (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 6 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 5: Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Ptot total power dissipation Min Max Unit DIP20 package [1] - 750 mW SO20 package [2] - 500 mW SSOP20 package [3] - 500 mW TSSOP20 package [3] - 500 mW DHVQFN20 package [4] - 500 mW [1] For DIP20 package: Ptot derates linearly with 12 mW/K above 70 C. [2] For SO20 package: Ptot derates linearly with 8 mW/K above 70 C. [3] For SSOP20 and TSSOP20 packages: Ptot derates linearly with 5.5 mW/K above 60 C. [4] For DHVQFN20 packages: Ptot derates linearly with 4.5 mW/K above 60 C. 9. Recommended operating conditions Table 6: Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit 74HC273 VCC supply voltage 2.0 5.0 6.0 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature -40 +25 +125 C tr, tf input rise and fall time VCC = 2.0 V - - 1000 ns VCC = 4.5 V - 6.0 500 ns VCC = 6.0 V - - 400 ns 74HCT273 VCC supply voltage 4.5 5.0 5.5 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature -40 +25 +125 C tr, tf input rise and fall time - 6.0 500 ns VCC = 4.5 V 10. Static characteristics Table 7: Static characteristics 74HC273 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V VCC = 6.0 V 4.2 3.2 - V Tamb = 25 C VIH HIGH-state input voltage 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 7 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 7: Static characteristics 74HC273 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VIL LOW-state input voltage VCC = 2.0 V - 0.8 0.5 V VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.8 V IO = -20 A; VCC = 2.0 V 1.9 2.0 - V IO = -20 A; VCC = 4.5 V 4.4 4.5 - V VOH VOL HIGH-state output voltage LOW-state output voltage VI = VIH or VIL IO = -20 A; VCC = 6.0 V 5.9 6.0 - V IO = -4.0 mA; VCC = 4.5 V 3.98 4.32 - V IO = -5.2 mA; VCC = 6.0 V 5.48 5.81 - V IO = 20 A; VCC = 2.0 V - 0 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 V VI = VIH or VIL IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V ILI input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 0.5 A ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 A Ci input capacitance - 3.5 - pF VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = -20 A; VCC = 2.0 V 1.9 - - V IO = -20 A; VCC = 4.5 V 4.4 - - V IO = -20 A; VCC = 6.0 V 5.9 - - V IO = -4.0 mA; VCC = 4.5 V 3.84 - - V IO = -5.2 mA; VCC = 6.0 V 5.34 - - V IO = 20 A; VCC = 2.0 V - - 0.1 V IO = 20 A; VCC = 4.5 V - - 0.1 V IO = 20 A; VCC = 6.0 V - - 0.1 V Tamb = -40 C to +85 C VIH VIL VOH VOL ILI HIGH-state input voltage LOW-state input voltage HIGH-state output voltage LOW-state output voltage input leakage current VI = VIH or VIL VI = VIH or VIL IO = 4.0 mA; VCC = 4.5 V - - 0.33 V IO = 5.2 mA; VCC = 6.0 V - - 0.33 V VI = VCC or GND; VCC = 6.0 V - - 1.0 A 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 8 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 7: Static characteristics 74HC273 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 5.0 A ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 80 A VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V Tamb = -40 C to +125 C VIH VIL VOH VOL HIGH-state input voltage LOW-state input voltage HIGH-state output voltage LOW-state output voltage VI = VIH or VIL - IO = -20 A; VCC = 2.0 V 1.9 - - V IO = -20 A; VCC = 4.5 V 4.4 - - V IO = -20 A; VCC = 6.0 V 5.9 - - V IO = -4.0 mA; VCC = 4.5 V 3.7 - - V IO = -5.2 mA; VCC = 6.0 V 5.2 - - V VI = VIH or VIL - IO = 20 A; VCC = 2.0 V - - 0.1 V IO = 20 A; VCC = 4.5 V - - 0.1 V IO = 20 A; VCC = 6.0 V - - 0.1 V IO = 4.0 mA; VCC = 4.5 V - - 0.4 V IO = 5.2 mA; VCC = 6.0 V - - 0.4 V ILI input leakage current VI = VCC or GND; VCC = 6.0 V - - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 10.0 A ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 160 A Conditions Min Typ Max Unit Table 8: Static characteristics 74HCT273 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C VIH HIGH-state input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V VIL LOW-state input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V VOH HIGH-state output voltage VI = VIH or VIL; VCC = 4.5 V IO = -20 A 4.4 4.5 - V IO = -4.0 mA 3.98 4.32 - V IO = 20 A - 0 0.1 V IO = 4.0 mA - 0.15 0.26 V - - 0.1 A VOL ILI LOW-state output voltage input leakage current VI = VIH or VIL; VCC = 4.5 V VI = VCC or GND; VCC = 5.5 V 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 9 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 8: Static characteristics 74HCT273 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit IOZ OFF-state output current VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND per input pin; other inputs at VCC or GND; IO = 0 A - - 0.5 A ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 A ICC additional quiescent supply current VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A pin MR - 100 360 A pin CP - 175 630 A pin Dn Ci input capacitance - 15 54 A - 3.5 - pF Tamb = -40 C to +85 C VIH HIGH-state input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-state input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-state output voltage VI = VIH or VIL; VCC = 4.5 V IO = -20 A 4.4 - - V IO = -4.0 mA 3.84 - - V IO = 20 A - - 0.1 V IO = 4.0 mA - - 0.33 V VOL LOW-state output voltage VI = VIH or VIL; VCC = 4.5 V ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND per input pin; other inputs at VCC or GND; IO = 0 A - - 5.0 A ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 80 A ICC additional quiescent supply current VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A pin MR - - 450 A pin CP - - 787.5 A pin Dn - - 67.5 A Tamb = -40 C to +125 C VIH HIGH-state input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-state input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-state output voltage VI = VIH or VIL; VCC = 4.5 V IO = -20 A 4.4 - - V IO = -4.0 mA 3.7 - - V IO = 20 A - - 0.1 V IO = 4.0 mA - - 0.4 V - - 1.0 A VOL ILI LOW-state output voltage input leakage current VI = VIH or VIL; VCC = 4.5 V VI = VCC or GND; VCC = 5.5 V 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 10 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 8: Static characteristics 74HCT273 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit IOZ OFF-state output current VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND per input pin; other inputs at VCC or GND; IO = 0 A - - 10 A ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 160 A ICC additional quiescent supply current VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A pin MR - - 490 A pin CP - - 857.5 A pin Dn - - 73.5 A 11. Dynamic characteristics Table 9: Dynamic characteristics 74HC273 Voltages are referenced to GND (ground = 0 V); tr = tf = 6 ns; CL = 50 pF unless otherwise specified; for test circuit see Figure 10. Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V - 41 150 ns VCC = 4.5 V - 15 30 ns VCC = 5 V; CL = 15 pF - 15 - ns VCC = 6.0 V - 13 26 ns VCC = 2.0 V - 44 150 ns VCC = 4.5 V - 16 30 ns VCC = 5 V; CL = 15 pF - 15 - ns VCC = 6.0 V - 14 26 ns VCC = 2.0 V - 19 75 ns VCC = 4.5 V - 7 15 ns VCC = 6.0 V - 6 13 ns Tamb = 25 C tPHL, tPLH tPHL tTHL, tTLH tW propagation delay CP to Qn HIGH-to-LOW propagation delay MR to Qn output transition time see Figure 7 see Figure 8 see Figure 7 pulse width clock HIGH or LOW master reset LOW see Figure 7 VCC = 2.0 V 80 14 - ns VCC = 4.5 V 16 5 - ns VCC = 6.0 V 14 4 - ns see Figure 8 VCC = 2.0 V 60 17 - ns VCC = 4.5 V 12 6 - ns VCC = 6.0 V 10 5 - ns 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 11 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 9: Dynamic characteristics 74HC273 ...continued Voltages are referenced to GND (ground = 0 V); tr = tf = 6 ns; CL = 50 pF unless otherwise specified; for test circuit see Figure 10. Symbol Parameter Conditions trec see Figure 8 tsu th fmax recovery time MR to CP set-up time Dn to CP hold time Dn to CP maximum input clock frequency power dissipation capacitance Typ Max Unit VCC = 2.0 V +50 -6 - ns VCC = 4.5 V +10 -2 - ns VCC = 6.0 V +9 -2 - ns see Figure 9 VCC = 2.0 V 60 11 - ns VCC = 4.5 V 12 4 - ns VCC = 6.0 V 10 3 - ns see Figure 9 VCC = 2.0 V +3 -6 - ns VCC = 4.5 V +3 -2 - ns VCC = 6.0 V +3 -2 - ns see Figure 7 VCC = 2.0 V 6.0 20.6 - MHz VCC = 4.5 V 30 103 - MHz VCC = 5 V; CL = 15 pF - 66 - MHz 35 122 - MHz - 20 - pF VCC = 2.0 V - - 185 ns VCC = 4.5 V - - 37 ns VCC = 6.0 V - - 31 ns VCC = 2.0 V - - 185 ns VCC = 4.5 V - - 37 ns VCC = 6.0 V - - 31 ns VCC = 2.0 V - - 95 ns VCC = 4.5 V - - 19 ns VCC = 6.0 V - - 15 ns VCC = 6.0 V CPD Min per flip-flop; VI = GND to VCC [1] Tamb = -40 C to +85 C tPHL, tPLH tPHL tTHL, tTLH tW propagation delay CP to Qn HIGH-to-LOW propagation delay MR to Qn output transition time see Figure 7 see Figure 8 see Figure 7 pulse width clock HIGH or LOW master reset LOW see Figure 7 VCC = 2.0 V 100 - - ns VCC = 4.5 V 20 - - ns VCC = 6.0 V 17 - - ns see Figure 8 VCC = 2.0 V 75 - - ns VCC = 4.5 V 15 - - ns VCC = 6.0 V 13 - - ns 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 12 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 9: Dynamic characteristics 74HC273 ...continued Voltages are referenced to GND (ground = 0 V); tr = tf = 6 ns; CL = 50 pF unless otherwise specified; for test circuit see Figure 10. Symbol Parameter Conditions trec see Figure 8 tsu th fmax recovery time MR to CP set-up time Dn to CP hold time Dn to CP maximum input clock frequency Min Typ Max Unit VCC = 2.0 V 65 - - ns VCC = 4.5 V 13 - - ns VCC = 6.0 V 11 - - ns see Figure 9 VCC = 2.0 V 75 - - ns VCC = 4.5 V 15 - - ns VCC = 6.0 V 13 - - ns see Figure 9 VCC = 2.0 V 3 - - ns VCC = 4.5 V 3 - - ns VCC = 6.0 V 3 - - ns see Figure 7 VCC = 2.0 V 4.8 - - MHz VCC = 4.5 V 24 - - MHz VCC = 6.0 V 28 - - MHz VCC = 2.0 V - - 225 ns VCC = 4.5 V - - 45 ns VCC = 6.0 V - - 38 ns VCC = 2.0 V - - 225 ns VCC = 4.5 V - - 45 ns VCC = 6.0 V - - 38 ns VCC = 2.0 V - - 110 ns VCC = 4.5 V - - 22 ns VCC = 6.0 V - - 19 ns VCC = 2.0 V 120 - - ns VCC = 4.5 V 24 - - ns VCC = 6.0 V 20 - - ns VCC = 2.0 V 90 - - ns VCC = 4.5 V 18 - - ns VCC = 6.0 V 15 - - ns Tamb = -40 C to +125 C tPHL, tPLH tPHL tTHL, tTLH tW propagation delay CP to Qn HIGH-to-LOW propagation delay MR to Qn output transition time see Figure 7 see Figure 8 see Figure 7 pulse width clock HIGH or LOW master reset LOW see Figure 7 see Figure 8 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 13 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 9: Dynamic characteristics 74HC273 ...continued Voltages are referenced to GND (ground = 0 V); tr = tf = 6 ns; CL = 50 pF unless otherwise specified; for test circuit see Figure 10. Symbol Parameter Conditions trec see Figure 8 recovery time MR to CP set-up time Dn to CP tsu hold time Dn to CP th maximum input clock frequency fmax [1] Min Typ Max Unit VCC = 2.0 V 75 - - ns VCC = 4.5 V 15 - - ns VCC = 6.0 V 13 - - ns see Figure 9 VCC = 2.0 V 90 - - ns VCC = 4.5 V 18 - - ns VCC = 6.0 V 15 - - ns see Figure 9 VCC = 2.0 V 3 - - ns VCC = 4.5 V 3 - - ns VCC = 6.0 V 3 - - ns see Figure 7 VCC = 2.0 V 4.0 - - MHz VCC = 4.5 V 20 - - MHz VCC = 6.0 V 24 - - MHz CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of outputs. Table 10: Dynamic characteristics 74HCT273 Voltages are referenced to GND (ground = 0 V); tr = tf = 6 ns; CL = 50 pF unless otherwise specified; for test circuit see Figure 10. Symbol Parameter Conditions Min Typ Max Unit VCC = 4.5 V - 16 30 ns VCC = 5 V; CL = 15 pF - 15 - ns VCC = 4.5 V - 23 34 ns VCC = 5 V; CL = 15 pF - 20 - ns VCC = 4.5 V; see Figure 7 - 7 15 ns clock HIGH or LOW VCC = 4.5 V; see Figure 7 16 9 - ns master reset LOW VCC = 4.5 V; see Figure 8 16 8 - ns Tamb = 25 C tPHL, tPLH propagation delay CP to Qn tPHL HIGH-to-LOW propagation delay MR to Qn tTHL, tTLH output transition time tW pulse width see Figure 7 see Figure 8 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 14 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger Table 10: Dynamic characteristics 74HCT273 ...continued Voltages are referenced to GND (ground = 0 V); tr = tf = 6 ns; CL = 50 pF unless otherwise specified; for test circuit see Figure 10. Symbol Parameter Conditions Min Typ Max Unit trec recovery time MR to CP VCC = 4.5 V; see Figure 8 +10 -2 - ns tsu set-up time Dn to CP VCC = 4.5 V; see Figure 9 12 5 - ns th hold time Dn to CP VCC = 4.5 V; see Figure 9 +3 -4 - ns fmax maximum input clock frequency see Figure 7 30 56 - MHz VCC = 4.5 V VCC = 5.0 V; CL = 15 pF power dissipation capacitance CPD per flip-flop; VI = GND to (VCC - 1.5 V) [1] - 36 - MHz - 23 - pF Tamb = -40 C to +85 C tPHL, tPLH propagation delay CP to Qn VCC = 4.5 V; see Figure 7 - - 38 ns tPHL HIGH-to-LOW propagation delay MR to Qn VCC = 4.5 V; see Figure 8 - - 43 ns tTHL, tTLH output transition time VCC = 4.5 V; see Figure 7 - - 19 ns tW pulse width clock HIGH or LOW VCC = 4.5 V; see Figure 7 20 - - ns master reset LOW VCC = 4.5 V; see Figure 8 20 - - ns trec recovery time MR to CP VCC = 4.5 V; see Figure 8 13 - - ns tsu set-up time Dn to CP VCC = 4.5 V; see Figure 9 15 - - ns th hold time Dn to CP VCC = 4.5 V; see Figure 9 3 - - ns fmax maximum input clock frequency VCC = 4.5 V; see Figure 7 24 - - MHz Tamb = -40 C to +125 C tPHL, tPLH propagation delay CP to Qn VCC = 4.5 V; see Figure 7 - - 45 ns tPHL HIGH-to-LOW propagation delay MR to Qn VCC = 4.5 V; see Figure 8 - - 51 ns tTHL, tTLH output transition time VCC = 4.5 V; see Figure 7 - - 22 ns tW pulse width clock HIGH or LOW VCC = 4.5 V; see Figure 7 24 - - ns master reset LOW VCC = 4.5 V; see Figure 8 24 - - ns trec recovery time MR to CP VCC = 4.5 V; see Figure 8 15 - - ns tsu set-up time Dn to CP VCC = 4.5 V; see Figure 9 18 - - ns th hold time Dn to CP VCC = 4.5 V; see Figure 9 3 - - ns fmax maximum input clock frequency VCC = 4.5 V; see Figure 7 20 - - MHz [1] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 15 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger (CL x VCC2 x fo) = sum of outputs. 12. Waveforms 1/fmax VI CP input VM VM GND tW tW t PHL t PLH VOH 90% VM 10% Qn output VOL tTHL tTLH 001aae062 Measurement points are given in Table 11. VOL and VOH are typical voltage output drop that occur with the output load. Fig 7. Propagation delay clock input (CP) to output (Qn), clock (CP) pulse width, output transition time and the maximum clock pulse frequency VI VM MR input GND tW t rec VI CP input VM GND t PHL VM Qn output mna464 Measurement points are given in Table 11. VOL and VOH are typical voltage output drop that occur with the output load. Fig 8. Propagation delay master reset (MR) to output (Qn), pulse width master reset (MR) and recovery time master reset (MR) to clock (CP) 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 16 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger VI VM CP input GND t su t su th th VI VM Dn input GND VOH VM Qn output VOL mna767 Measurement points are given in Table 11. The shaded areas indicate when the input is permitted to change for predictable output performance. VOL and VOH are typical voltage output drop that occur with the output load. Fig 9. Data set-up and hold times data input (Dn) Table 11: Type Measurement points Input Output VM VM 74HC273 0.5VCC 0.5VCC 74HCT273 1.3 V 1.3 V 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 17 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC PULSE GENERATOR VI VO RL S1 open DUT RT CL 001aad983 Test data is given in Table 12. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistor S1 = Test selection switch Fig 10. Load circuitry for measuring switching times Table 12: Type Test data Input Load VI tr, tf CL 74HC273 VCC 6 ns 74HCT273 3V 6 ns tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 15 pF, 50 pF 1 k open GND VCC 15 pF, 50 pF 1 k open GND VCC 74HC_HCT273_3 Product data sheet S1 position RL (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 18 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger 13. Package outline DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1 ME seating plane D A2 A A1 L c e Z b1 w M (e 1) b MH 11 20 pin 1 index E 1 10 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 0.36 0.23 26.92 26.54 inches 0.17 0.02 0.13 0.068 0.051 0.021 0.015 0.014 0.009 1.060 1.045 D e e1 L ME MH w Z (1) max. 6.40 6.22 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2 0.25 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.078 (1) E (1) Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC JEITA MS-001 SC-603 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 11. Package outline SOT146-1 (DIP20) 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 19 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index Lp L 10 1 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 12. Package outline SOT163-1 (SO20) 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 20 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index Lp L 1 10 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8 o 0 o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig 13. Package outline SOT339-1 (SSOP20) 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 21 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A Lp L 1 10 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig 14. Package outline SOT360-1 (TSSOP20) 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 22 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 9 y y1 C v M C A B w M C b L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 4.6 4.4 3.15 2.85 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 3.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT764-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 15. Package outline SOT764-1 (DHVQFN20) 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 23 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger 14. Abbreviations Table 13: Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model MOS Metal Oxide Semiconductor 15. Revision history Table 14: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes 74HC_HCT273_3 20060124 Product data sheet - - Modifications: 74HC_HCT273_CNV_2 * The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. * Section 4 "Ordering information", Section 6 "Pinning information" and Section 13 "Package outline": Added DHVQFN package information * Section 10 "Static characteristics": Added from the family specification 19970827 Product specification - 74HC_HCT273_3 Product data sheet 74HC_HCT273_CNV_2 - - (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 24 of 26 74HC273; 74HCT273 Philips Semiconductors Octal D-type flip-flop with reset; positive-edge trigger 16. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 17. Definitions customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 19. Trademarks 18. Disclaimers Notice -- All referenced brands, product names, service names and trademarks are the property of their respective owners. Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors 20. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 74HC_HCT273_3 Product data sheet (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Rev. 03 -- 24 January 2006 25 of 26 Philips Semiconductors 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger 21. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 8 9 10 11 12 13 14 15 16 17 18 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 6 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 25 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Contact information . . . . . . . . . . . . . . . . . . . . 25 (c) Koninklijke Philips Electronics N.V. 2006 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 24 January 2006 Document number: 74HC_HCT273_3 Published in The Netherlands