LF412 Low Offset, Low Drift Dual JFET Input Operational Amplifier General Description Features These devices are low cost, high speed, JFET input operational amplifiers with very low input offset voltage and guaranteed input offset voltage drift. They require low supply current yet maintain a large gain bandwidth product and fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF412 dual is pin compatible with the LM1558, allowing designers to immediately upgrade the overall performance of existing designs. These amplifiers may be used in applications such as high speed integrators, fast D/A converters, sample and hold circuits and many other circuits requiring low input offset voltage and drift, low input bias current, high input impedance, high slew rate and wide bandwidth. Typical Connection Connection Diagrams Internally trimmed offset voltage: 1 mV (max) Input offset voltage drift: 10 V/C (max) Low input bias current: 50 pA Low input noise current: Wide gain bandwidth: 3 MHz (min) High slew rate: 10V/s (min) Low supply current: 1.8 mA/Amplifier High input impedance: 1012 Low total harmonic distortion 0.02% Low 1/f noise corner: 50 Hz Fast settling time to 0.01%: 2 s Metal Can Package 565642 565641 Ordering Information X Y Z LF412XYZ indicates electrical grade indicates temperature range "M" for military "C" for commercial indicates package type "H" or "N" Order Number LF412MH, LF412CH See NS Package Number H08A or LF412MH/883 (Note 1) See NS Package Number H08C Dual-In-Line Package 565644 Order Number LF412ACN, LF412CN or LF412MJ/883 (Note 1) See NS Package Number J08A or N08E BI-FET IITM is a trademark of National Semiconductor Corporation. (c) 2010 National Semiconductor Corporation 5656 www.national.com LF412 Low Offset, Low Drift Dual JFET Input Operational Amplifier January 28, 2010 LF412 Simplified Schematic 1/2 Dual 565643 Note 1: Available per JM38510/11905 Detailed Schematic 565632 www.national.com 2 LF412 18V 30V (Note 3) Output Short Circuit Duration (Note 4) 19V 15V Continuous Continuous (Note 5) 670 mW 150C 152C/W 115C 115C/W (Note 12) Tj max jA (Typical) Operating Temp. Range (Note 6) (Note 6) Storage Temp. -65CTA150 -65CTA150 C C Range Lead Temp. (Soldering, 10 sec.) 260C 260C ESD Tolerance 1700V 1700V (Note 13) (Note 11) LF412A 22V 38V N Package Power Dissipation If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Differential Input Voltage Input voltage Range H Package LF412 Absolute Maximum Ratings (Note 2) DC Electrical Characteristics (Note 7) Symbol Parameter Conditions LF412A Min LF412 Min Units Typ Max Typ Max VOS Input Offset Voltage RS=10 k, TA=25C 0.5 1.0 1.0 3.0 mV VOS/T Average TC of Input RS=10 k (Note 8) 7 10 7 20 V/C 25 100 25 100 pA 2 nA Offset Voltage IOS Input Offset Current VS=15V Tj=25C (Note 7, Note 9) Tj=70C VS=15V Tj=25C (Note 7, Note 9) Tj=70C Tj=125C 2 Tj=125C IB Input Bias Current RIN Input Resistance Tj=25C AVOL Large Signal Voltage VS=15V, VO=10V, Gain RL=2k, TA=25C VO Output Voltage Swing VCM Input Common-Mode 25 50 Common-Mode nA pA 4 4 nA 50 50 nA 50 1012 50 200 1012 200 V/mV 25 Over Temperature 25 200 15 200 V/mV VS=15V, RL=10k 12 13.5 12 13.5 V 16 +19.5 11 +14.5 V -11.5 V Voltage Range CMRR 25 200 200 -16.5 RS10k 80 100 70 100 dB 80 100 70 100 dB Rejection Ratio PSRR Supply Voltage Rejection Ratio (Note 10) IS Supply Current VO = 0V, RL = 3.6 5.6 3.6 6.5 mA Note 2: "Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. AC Electrical Characteristics (Note 7) Symbol Parameter LF412A Conditions Min Typ LF412 Max Min Typ Units Max Amplifier to Amplifier TA=25C, f=1 Hz-20 kHz Coupling (Input Referred) SR Slew Rate VS=15V, TA=25C 10 15 8 15 V/s GBW Gain-Bandwidth Product VS=15V, TA=25C 3 4 2.7 4 MHz -120 3 -120 dB www.national.com LF412 Symbol Parameter LF412A Conditions Min THD Total Harmonic Dist AV=+10, RL=10k, VO=20 Vp-p, BW=20 Hz-20 kHz en Equivalent Input Noise TA=25C, RS=100, Voltage f=1 kHz Equivalent Input Noise TA=25C, f=1 kHz in Typ LF412 Max Min Typ 0.02 0.02 25 25 0.01 0.01 Units Max % Current Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. Note 4: Any of the amplifier outputs can be shorted to ground indefintely, however, more than one should not be simultaneously shorted as the maximum junction temperature will be exceeded. Note 5: For operating at elevated temperature, these devices must be derated based on a thermal resistance of jA. Note 6: These devices are available in both the commercial temperature range 0CTA70C and the military temperature range -55CTA125C. The temperature range is designated by the position just before the package type in the device number. A "C" indicates the commercial temperature range and an "M" indicates the military temperature range. The military temperature range is available in "H" package only. In all cases the maximum operating temperature is limited by internal junction temperature Tj max. Note 7: Unless otherwise specified, the specifications apply over the full temperature range and for VS=20V for the LF412A and for VS=15V for the LF412. VOS, IB, and IOS are measured at VCM=0. Note 8: The LF412A is 100% tested to this specification. The LF412 is sample tested on a per amplifier basis to insure at least 85% of the amplifiers meet this specification. Note 9: The input bias currents are junction leakage currents which approximately double for every 10C increase in the junction temperature, Tj. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. Tj=TA+jA PD where jA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum. Note 10: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice. VS = 6V to 15V. Note 11: Refer to RETS412X for LF412MH and LF412MJ military specifications. Note 12: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside guaranteed limits. Note 13: Human body model, 1.5 k in series with 100 pF. Typical Performance Characteristics Input Bias Current Input Bias Current 565610 565611 www.national.com 4 LF412 Supply Current Positive Common-Mode Input Voltage Limit 565612 565613 Negative Common-Mode Input Voltage Limit Positive Current Limit 565615 565614 Negative Current Limit Output Voltage Swing 565616 565617 5 www.national.com LF412 Output Voltage Swing Gain Bandwidth 565619 565618 Bode Plot Slew Rate 565621 565620 Distortion vs Frequency Undistorted Output Voltage Swing 565622 565623 www.national.com 6 LF412 Open Loop Frequency Response Common-Mode Rejection Ratio 565625 565624 Power Supply Rejection Ratio Equivalent Input Noise Voltage 565626 565627 Open Loop Voltage Gain Output Impedance 565628 565629 7 www.national.com LF412 Inverter Settling Time 565630 Pulse Response RL=2 k, CL=10 pF Small Signal Inverting Small Signal Non-Inverting 565636 565637 Large Signal Inverting Large Signal Non-Inverting 565639 565638 www.national.com 8 LF412 Current Limit (RL=100) 565640 The amplifiers will drive a 2 k load resistance to 10V over the full temperature range. If the amplifier is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative voltage swing and finally reach an active current limit on both positive and negative swings. Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize "pick-up" and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant. Application Hints The LF412 series of JFET input dual op amps are internally trimmed (BI-FET IITM) providing very low input offset voltages and guaranteed input offset voltage drift. These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-mode limit on either input will cause a reversal of the phase to the output and force the amplifier output to the corresponding high or low state. Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode. Exceeding the positive common-mode limit on a single input will not change the phase of the output, however, if both inputs exceed the limit, the output of the amplifier may be forced to a high state. The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition. When the negative common-mode voltage swings to within 3V of the negative supply, an increase in input offset voltage may occur. Each amplifier is individually biased by a zener reference which allows normal circuit operation on 6.0V power supplies. Supply voltages less than these may result in lower gain bandwidth and slew rate. 9 www.national.com LF412 Typical Application Single Supply Sample and Hold 565631 www.national.com 10 LF412 Physical Dimensions inches (millimeters) unless otherwise noted Metal Can Package (H) Order Number LF412MH or LF412CH NS Package Number H08A 11 www.national.com LF412 Metal Can Package (H) Order Number LF412MH/833 NS Package Number H08C www.national.com 12 LF412 Dual-In-Line Package (J) Order Number LF412MJ/883 NS Package Number J08A Dual-In-Line Package (N) Order Number LF412ACN or LF412CN NS Package Number N08E 13 www.national.com LF412 Low Offset, Low Drift Dual JFET Input Operational Amplifier Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH(R) Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise(R) Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagicTM www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise(R) Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION ("NATIONAL") PRODUCTS. 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