December 2008 Rev 5 1/48
48
VN820-E
High-side driver
Features
■CMOS compatible input
■On-state open load detection
■Off-state open load detection
■Shorted load protection
■Under-voltage and over-voltage shutdown
■Protection against loss of ground
■Very low standby current
■Reverse battery protection (see Application
schematic )
Description
The VN820-E is a monolithic device designed in
STMicroelectronic's VIPower M0-3 technology.
The VN820-E is intended for driving any type of
load with one side connected to ground. The
active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against over-load. The device detects the
open load condition in both the on and off-state. In
the off-state the device detects if the output is
shorted to VCC. The device automatically turns off
in the case where the ground pin becomes
disconnected.
Type RDS(on) IOUT VCC
VN820-E
VN820SP-E
VN820B5-E
VN820SO-E
VN820PT-E
40 mΩ9 A 36 V
PENTAWATT
P2PAK
1
10
PowerSO-10
SO-16L
PPAK
Table 1. Device summary
Package
Order codes
Tube Tape and reel
PENTAWATT VN820-E -
PowerSO-10 VN820SP-E VN820SP13TR-E
P2PAK VN820B5-E VN820B513TR-E
PPAK VN820PT-E VN820PT13TR-E
SO-16L VN820SO-E VN820SO13TR-E
www.st.com
Contents VN820-E
2/48
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 18
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 18
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 19
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.5 PowerSO-10, P2PAK, PENTAWATT maximum demagnetization energy
(VCC = 13.5V) 21
3.6 PPAK maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . 22
3.7 SO-16L maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . 23
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2 P2PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.3 PPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.4 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.2 PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.3 P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.4 PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
5.5 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.6 SO-16L packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
VN820-E Contents
3/48
5.7 PENTAWATT packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.8 P2PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.9 PPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
5.10 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
List of tables VN820-E
4/48
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 6. Switching (VCC=13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 8. VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Open load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 14. SO-16L thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 15. P2PAK thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 16. PPAK thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 17. PowerSO-10 thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 18. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 19. PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 20. P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 21. PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 22. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 23. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
VN820-E List of figures
5/48
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. On-state resistance Vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. On-state resistance Vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 15. Open load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. Input high-level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 17. Input low-level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 18. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 19. Over-voltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. Open load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 23. Ilim Vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 25. Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. PowerSO-10, P2PAK, PENTAWATT maximum turn-off current versus inductance . . . . . 21
Figure 27. PPAK maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. SO-16L maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 29. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 30. SO-16L Rthj-amb Vs PCB copper area in open box free air conditions . . . . . . . . . . . . . . 24
Figure 31. SO-16L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 32. Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 33. P2PAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. P2PAK Rthj-amb Vs. PCB copper area in open box free air conditions . . . . . . . . . . . . . . 27
Figure 35. P2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 36. Thermal fitting model of a single channel HSD in P2PAK. . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 37. PPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 38. PPAK Rthj-amb Vs. PCB copper area in open box free air conditions . . . . . . . . . . . . . . . 29
Figure 39. PPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 40. Thermal fitting model of a single channel HSD in PPAK . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 41. PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 42. PowerSO-10 Rthj-amb Vs PCB copper area in open box free air conditions . . . . . . . . . . 32
Figure 43. PowerSO-10 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . 32
Figure 44. Thermal fitting model of a single channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . . 33
Figure 45. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 46. PENTAWATT package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 47. P2PAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 48. PPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
List of figures VN820-E
6/48
Figure 49. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 50. SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 51. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 52. PENTAWATT tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 53. P2PAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 54. P2PAK tape and reel (suffix “13TR”). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 55. PPAK suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 56. PPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 57. PPAK tape and reel (suffix “13TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 58. PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 59. PowerSO-10 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 60. PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
VN820-E Block diagram and pin description
7/48
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X Through 10KΩ resistor
UNDER-VOLTAGE
OVER-TEMPERATURE
VCC
GND
INPUT
OUTPUT
OVER-VOLTAGE
CURRENT LIMITER
LOGIC
DRIVER
Power CLAMP
STATUS
VCC
CLAMP
ON-STATE OPEN LOAD
OFF-STATE OPEN LOAD
AND OUTPUT SHORTED TO VCC
DETECTION
DETECTION
DETECTION
DETECTION
DETECTION
OUTPUT
STATUS
VCC
INPUT
GND
5
4
3
2
1
PPAK / P2PAK/ PENTAWATT
V
CC
OUTPUT
OUTPUT
OUTPUT
OUTPUT
V
CC
OUTPUT
OUTPUT
V
CC
N.C.
N.C.
STATUS
INPUT
V
CC
GND
N.C.
1
89
16
1
2
3
4
5
6
7
8
9
10
11
OUTPUT
OUTPUT
OUTPUT
OUTPUT
GROUND
INPUT
STATUS
N.C.
N.C.
V
CC
OUTPUT
PowerSO-10 SO-16L
Electrical specifications VN820-E
8/48
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to Absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics sure
program and other relevant quality document.
INPUT
IS
IIN
VIN
VCC
STATUS
ISTAT
VSTAT
GND
VCC
IOUT
VOUT
IGND
OUTPUT
V
F
Table 3. Absolute maximum ratings
Symbol Parameter
Value
Unit
SO-16L PowerSO-10 PENTAWATT P2PAK PPAK
VCC DC supply voltage 41 V
- VCC Reverse DC supply voltage - 0.3 V
- Ignd
DC reverse ground pin
current - 200 mA
IOUT DC output current Internally limited A
- IOUT Reverse DC output current - 9 A
IIN DC input current +/- 10 mA
ISTAT DC Status current +/- 10 mA
VESD
Electrostatic discharge
(human body model:
R = 1.5KΩ; C = 100pF)
- INPUT
- STATUS
- OUTPUT
- VCC
4000
4000
5000
5000
V
V
V
V
VN820-E Electrical specifications
9/48
2.2 Thermal data
Symbol Parameter
Value
Unit
SO-16L PowerSO-10 PENTAWATT P2PAK PPAK
EMAX
Maximum switching energy
(L = 4mH; RL= 0Ω;
Vbat = 13.5V; Tjstart = 150ºC;
IL = 13A)
- 481 - 481 - mJ
EMAX
Maximum switching energy
(L = 3.7mH; RL = 0Ω;
Vbat = 13.5V; Tjstart = 150ºC;
IL = 13A)
438 - - - - mJ
EMAX
Maximum switching energy
(L = 4.48mH; RL = 0Ω;
Vbat = 13.5V; Tjstart = 150ºC;
IL = 13A)
-- --526mJ
Ptot Power dissipation TC = 25°C 8.3 65.8 65.8 65.8 65.8 W
Tj
Junction operating
temperature Internally limited °C
TcCase operating temperature - 40 to 150 °C
Tstg Storage temperature - 55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Table 4. Thermal data
Symbol Parameter
Max. value
Unit
SO-16L PowerSO-10 PENTAWATT P2PAK PPAK
Rthj-case
Thermalresistance
junction-case - 1.9 1.9 1.9 1.9 °C/W
Rthj-lead
Thermalresistance
junction-lead 15 - - - - °C/W
Rthj-amb
Thermalresistance
junction-ambient
65(1)
1. When mounted on FR4 printed circuit board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC
pins.
51.9(2)
2. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick).
61.9(2) 51.9(2) 76.9(2) °C/W
48(3)
3. When mounted on FR4 printed circuit board with 6cm2 of Cu (at least 35µm thick) connected to all VCC
pins.
37(4)
4. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35µm thick).
-37
(4) 45(4) °C/W
Electrical specifications VN820-E
10/48
2.3 Electrical characteristics
Values specified in this section are for 8V < VCC < 36V; -40°C < Tj < 150°C, unless otherwise
stated.
Table 5. Power
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC Operating supply voltage 5.5 13 36 V
VUSD Under-voltage shutdown 3 4 5.5 V
VUSDhyst
Under-voltage shutdown
hysteresis 0.5 V
VOV Over-voltage shutdown 36 V
RON On-state resistance IOUT = 3A; Tj = 25°C; VCC > 8V
IOUT = 3A; VCC > 8V
40
80
mΩ
mΩ
ISSupply current
Off-state; VCC = 13V;
VIN = VOUT = 0V
Off-state; VCC = 13V;
VIN = VOUT = 0V; Tj = 25°C
On-state; VCC = 13V; VIN = 5V;
IOUT = 0A
10
10
2
25
20
3.5
µA
µA
mA
IL(off1) Off-state output current VIN = VOUT = 0V 0 50 µA
IL(off2) Off-state output current VIN = 0V; VOUT = 3.5V -75 0 µA
IL(off3) Off-state output current VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C 5µA
IL(off4) Off-state output current VIN = VOUT = 0V; VCC = 13V;
Tj = 25°C 3µA
Table 6. Switching (VCC=13V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL = 4.3Ω from VIN rising edge to
VOUT = 1.3V 30 µs
td(off) Turn-off delay time RL = 4.3Ω from VIN falling edge to
VOUT = 11.7V 30 µs
dVOUT/dt(on) Turn-on voltage slope RL = 4.3Ω from VOUT = 1.3V to
VOUT=10.4V See Figure 21. V/µs
dVOUT/dt(off) Turn-off voltage slope RL = 4.3Ω from VOUT = 11.7V to
VOUT = 1.3V See Figure 22. V/µs
VN820-E Electrical specifications
11/48
Table 7. Input pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Input low-level 1.25 V
IIL Low-level input current VIN = 1.25V 1 µA
VIH Input high-level 3.25 V
IIH High-level input current VIN = 3.25V 10 µA
Vhyst Input hysteresis voltage 0.5 V
VICL Input clamp voltage IIN = 1mA
IIN = -1mA
66.8
- 0.7
8V
V
Table 8. VCC output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VFForward on voltage - IOUT = 2A; Tj = 150°C 0.6 V
Table 9. Status pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VSTAT Status low output voltage ISTAT = 1.6mA 0.5 V
ILSTAT Status leakage current Normal operation; VSTAT = 5V 10 µA
CSTAT Status pin input capacitance Normal operation; VSTAT = 5V 100 pF
VSCL Status clamp voltage ISTAT = 1mA
ISTAT = - 1mA
66.8
- 0.7
8V
V
Table 10. Protections(1)
1. To ensure long term reliability under heavy over-load or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.
Symbol Parameter Test conditions Min. Typ. Max. Unit
TTSD Shutdown temperature 150 175 200 °C
TRReset temperature 135 °C
Thyst Thermal hysteresis 7 15 °C
tSDL
Status delay in over-load
condition Tj > Tjsh 20 ms
Ilim Current limitation 9V < VCC < 36V
5.5V < VCC < 36V
91320
20
A
A
Vdemag
Turn-off output clamp
voltage
IOUT = 3 A;
VIN = 0V;
L = 6mH
VCC - 41 VCC - 48 VCC - 55 V
Electrical specifications VN820-E
12/48
Figure 4. Status timings
Figure 5. Switching time waveforms
Table 11. Open load detection
Symbol Parameter Test conditions Min. Typ. Max. Unit
IOL
Open load on-state
detection threshold VIN = 5V 70 150 300 mA
tDOL(on)
Open load on-state
detection delay IOUT = 0A 200 µs
VOL
Open load off-state
voltage detection
threshold
VIN = 0V 1.5 2.5 3.5 V
tDOL(off)
Open load detection
delay at turn-off 1000 µs
V
IN
V
STAT
t
DOL(off)
OPEN LOAD STATUS TIMING
(with external pull-up) OVER-TEMP STATUS TIMING
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
T
j
> T
jsh
V
IN
V
STAT
t
SDL
t
SDL
t
t
VOUT
VIN
80%
10%
dVOUT/dt(on)
td(off)
90%
dVOUT/dt(off)
td(on)
VN820-E Electrical specifications
13/48
Table 12. Truth table
Conditions Input Output Status
Normal operation L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Over-temperature L
H
L
L
H
L
Under-voltage L
H
L
L
X
X
Over-voltage L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Table 13. Electrical transient requirements
ISO T/R
7637/1
Test pulse
Test level
I II III IV Delays and impedance
1- 25V
(1)
1. All functions of the device are performed as designed after exposure to disturbance.
- 50V(1) - 75V(1) - 100V(1) 2ms, 10Ω
2 + 25V(1) + 50V(1) + 75V(1) + 100V(1) 0.2ms, 10Ω
3a - 25V(1) - 50V(1) - 100V(1) - 150V(1) 0.1µs, 50Ω
3b + 25V(1) + 50V(1) + 75V(1) + 100V(1) 0.1µs, 50Ω
4- 4V
(1) - 5V(1) - 6V(1) - 7V(1) 100ms, 0.01Ω
5+ 26.5V
(1) + 46.5V(2)
2. One or more functions of the device is not performed as designed after exposure and cannot be returned to
proper operation without replacing the device.
+ 66.5V(2) + 86.5V(2) 400ms, 2Ω
Electrical specifications VN820-E
14/48
Figure 6. Waveforms
OPEN LOAD without external pull-up
STATUS
INPUT
NORMAL OPERATION
UNDER-VOLTAGE
V
CC
V
USD
V
USDhyst
INPUT
OVER-VOLTAGE
V
CC
V
CC
> V
OV
STATUS
INPUT
STATUS
STATUS
INPUT
STATUS
INPUT
OPEN LOAD with external pull-up
undefined
LOAD VOLTAGE
V
CC
<V
OV
LOAD VOLTAGE
LOAD VOLTAGE
LOAD VOLTAGE
LOAD VOLTAGE
OVER-TEMPERATURE
INPUT
STATUS
T
TSD
T
R
T
j
LOAD CURRENT
V
OUT
> V
OL
V
OL
VN820-E Electrical specifications
15/48
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High-level input current
Figure 9. Input clamp voltage Figure 10. Status leakage current
Figure 11. Status low output voltage Figure 12. Status clamp voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
IL(off1) (µA )
Off state
Vcc=36V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Iih (uA )
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vicl (V)
Ii n =1 m A
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
0
0.01
0.02
0.03
0.04
0.05
Ils ta t (u A )
Vstat=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
V s tat (V )
Is tat=1.6mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vscl (V)
Is t a t =1 m A
Electrical specifications VN820-E
16/48
Figure 13. On-state resistance Vs Tcase Figure 14. On-state resistance Vs VCC
Figure 15. Open load on-state detection
threshold
Figure 16. Input high-level
Figure 17. Input low-level Figure 18. Input hysteresis voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
10
20
30
40
50
60
70
80
90
100
Ron (mOhm)
Io u t =3 A
Vc c =8V; 13V; 36V
5 10152025303540
Vcc (V)
0
10
20
30
40
50
60
70
80
90
100
Ron (mOhm)
Tc = - 40ºC
Tc = 25ºC
Tc = 150ºC
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
50
60
70
80
90
100
110
120
130
140
150
Iol (m A )
Vcc=13V
Vin=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
Vil (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
Vhyst (V)
VN820-E Electrical specifications
17/48
Figure 19. Over-voltage shutdown Figure 20. Open load off-state voltage
detection threshold
Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope
Figure 23. Ilim Vs Tcase
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
30
32
34
36
38
40
42
44
46
48
50
Vov (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Vol (V)
Vin=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
100
200
300
400
500
600
700
800
900
1000
dV out/dt/(on) (V /ms )
Vcc=13V
Rl=6.5Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
100
200
300
400
500
600
700
800
900
1000
dV out/dt(off) (V /ms)
Vcc=13V
Rl=4.3Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
2
4
6
8
10
12
14
16
18
20
Ilim (A )
Vcc=13V
Application information VN820-E
18/48
3 Application information
Figure 24. Application schematic
3.1 GND protection network against reverse battery
3.1.1 Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1. RGND ≤ 600mV / (IS(on)max).
2. RGND ≥ (- VCC) / (- IGND)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power Dissipation in RGND (when VCC < 0: during reverse battery situations) is:
PD= (- VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high-side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
µ
C
+5V
R
prot
V
GND
STATUS
INPUT
+5V
R
prot
VN820-E Application information
19/48
3.1.2 Solution 2: diode (DGND) in the ground line
A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
3.2 Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended values: Rprot =10kΩ .
3.4 Open load detection in off-state
Off-state open load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1. no false open load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT= (VPU / (RL+RPU)) RL < VOlmin.
2. no misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU – VOLmax) / IL(off2).
Application information VN820-E
20/48
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-
up resistor RPU should be connected to a supply that is switched off when the module is in
standby.
The values of VOLmin, VOLmax and IL(off2) are available in the electrical characteristics
section.
Figure 25. Open load detection in off-state
VOL
V batt. VPU
RPU
RL
R
DRIVER
+
LOGIC
+
-
IN P U T
STATUS
VCC
OUT
GROUND
IL(off2)
VN820-E Application information
21/48
3.5 PowerSO-10,
P
2
PAK, PENTAWATT
maximum
demagnetization energy (VCC = 13.5V)
Figure 26. PowerSO-10,
P
2
PAK, PENTAWATT
maximum turn-off current versus
inductance
Note: Values are generated with RL =0 Ω. In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.
C: Tjstart = 125°C repetitive pulse
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
Demagnetization Demagnetization Demagnetization
t
VIN, IL
1
10
100
0.1 1 10 100
L(mH)
I
LMAX (A)
A
B
C
Application information VN820-E
22/48
3.6 PPAK maximum demagnetization energy (V
CC
= 13.5V)
Figure 27. PPAK maximum turn-off current versus inductance
Note: Values are generated with RL =0 Ω. In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.
C: Tjstart = 125°C repetitive pulse
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
Demagnetization Demagnetization Demagnetization
t
VIN, IL
1
10
100
0.1 1 10 100
L(mH)
I
LMAX (A)
A
B
C
VN820-E Application information
23/48
3.7 SO-16L maximum demagnetization energy (V
CC
= 13.5V)
Figure 28. SO-16L maximum turn-off current versus inductance
Note: Values are generated with RL =0 Ω. In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.
C: Tjstart = 125°C repetitive pulse
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
Demagnetization Demagnetization Demagnetization
t
VIN, IL
1
10
100
0.1 1 10 100
L(mH)
I
LMAX (A)
A
B
C
Package and PCB thermal data VN820-E
24/48
4 Package and PCB thermal data
4.1 SO-16L thermal data
Figure 29. SO-16L PC board
Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 41mm x 48mm, PCB
thickness = 2mm, Cu thickness = 35µm, Copper areas: 0.5cm2, 6cm2).
Figure 30. SO-16L Rthj-amb Vs PCB copper area in open box free air conditions
40
45
50
55
60
65
70
01234567
PC B Cu heatsink area (cm^2)
RTH j-amb (°C/W)
VN820-E Package and PCB thermal data
25/48
Figure 31. SO-16L thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
Figure 32. Thermal fitting model of a single channel HSD in SO-16L
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZT H (°C /W)
0.5 cm2
6 cm2
ZTHδRTH δZTHtp 1δ–()+⋅=
where
δtpT⁄=
T_amb
C1
R1 R2
C2
R3
C3
R4
C4
R5
C5
R6
C6
Pd
Tj
Package and PCB thermal data VN820-E
26/48
4.2 P2PAK thermal data
Figure 33. P2PA K PC b oard
Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 60mm x 60mm, PCB
thickness = 2 mm, Cu thickness = 35µm , Copper areas: 0.97cm2, 8cm2).
Table 14. SO-16L thermal parameters
Area / island (cm2) Footprint 6
R1 (°C/W) 0.04
R2 (°C/W) 0.25
R3 (°C/W) 2.2
R4 (°C/W) 12
R5 (°C/W) 15
R6 (°C/W) 37 22
C1 (W.s/°C) 0.0008
C2 (W.s/°C) 7E-03
C3 (W.s/°C) 1.5E-02
C4 (W.s/°C) 0.14
C5 (W.s/°C) 1
C6 (W.s/°C) 3 5
VN820-E Package and PCB thermal data
27/48
Figure 34. P2PA K Rthj-amb Vs. PCB copper area in open box free air conditions
Figure 35. P2PAK thermal impedance junction ambient single pulse
30
35
40
45
50
55
024681
0
PCB Cu heatsink area
(
cm^2
)
RTHj_amb (°C/W)
Tj-Tamb=50°C
0.01
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZT H (°C /W)
0.97 cm2
6 cm2
Package and PCB thermal data VN820-E
28/48
Equation 2: pulse calculation formula
where δ = tP/T
Figure 36. Thermal fitting model of a single channel HSD in P2PAK
Table 15. P2PAK thermal parameters
Area/island (cm2)0.976
R1 (°C/W) 0.04
R2 (°C/W) 0.25
R3 (°C/W) 0.3
R4 (°C/W) 4
R5 (°C/W) 9
R6 (°C/W) 37 22
C1 (W·s/°C) 0.0008
C2 (W·s/°C) 0.007
C3 (W·s/°C) 0.015
C4 (W·s/°C) 0.4
C5 (W·s/°C) 2
C6 (W·s/°C) 3 5
ZTHδRTH δZTHtp 1δ–()+⋅=
VN820-E Package and PCB thermal data
29/48
4.3 PPAK thermal data
Figure 37. PPAK PC board
Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 60mm x 60mm, PCB
thickness = 2 mm, Cu thickness=35µm , Copper areas: 0.44 cm2, 8 cm2).
Figure 38. PPAK Rthj-amb Vs. PCB copper area in open box free air conditions
0
10
20
30
40
50
60
70
80
90
0246810
PCB Cu heatsink area (cm^2)
RTHj_amb (ºC /W)
Package and PCB thermal data VN820-E
30/48
Figure 39. PPAK thermal impedance junction ambient single pulse
Equation 3: pulse calculation formula
where δ = tP/T
Figure 40. Thermal fitting model of a single channel HSD in PPAK
0.01
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZT H (°C /W)
0.44 cm2
6 cm2
ZTHδRTH δZTHtp 1δ–()+⋅=
VN820-E Package and PCB thermal data
31/48
Table 16. PPAK thermal parameters
4.4 PowerSO-10 thermal data
Figure 41. PowerSO-10 PC board
Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB
thickness = 2mm, Cu thickness = 35µm, Copper areas: from minimum pad lay-out to 8cm2).
Area/island (cm2)0.446
R1 (°C/W) 0.04
R2 (°C/W) 0.25
R3 (°C/W) 0.3
R4 (°C/W) 2
R5 (°C/W) 15
R6 (°C/W) 61 24
C1 (W·s/°C) 0.0008
C2 (W·s/°C) 0.007
C3 (W·s/°C) 0.02
C4 (W·s/°C) 0.3
C5 (W·s/°C) 0.45
C6 (W·s/°C) 0.8 5
Package and PCB thermal data VN820-E
32/48
Figure 42. PowerSO-10 Rthj-amb Vs PCB copper area in open box free air conditions
Figure 43. PowerSO-10 thermal impedance junction ambient single pulse
30
35
40
45
50
55
0246810
PCB Cu heatsink area (cm^2)
RTHj_amb (°C/W)
Tj-Tamb=50°C
0.01
0.1
1
10
100
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C /W)
0.5 cm
2
6 cm
2
VN820-E Package and PCB thermal data
33/48
Equation 4: pulse calculation formula
Figure 44. Thermal fitting model of a single channel HSD in PowerSO-10
Table 17. PowerSO-10 thermal parameters
Area / island (cm2) Footprint 6
R1 (°C/W) 0.04
R2 (°C/W) 0.25
R3 (°C/W) 0.25
R4 (°C/W) 0.8
R5 (°C/W) 12
R6 (°C/W) 37 22
C1 (W.s/°C) 0.0008
C2 (W.s/°C) 7E-03
C3 (W.s/°C) 0.015
C4 (W.s/°C) 0.3
C5 (W.s/°C) 0.75
C6 (W.s/°C) 3 5
ZTHδRTH δZTHtp 1δ–()+⋅=
where
δtpT⁄=
T_amb
C1
R1 R2
C2
R3
C3
R4
C4
R5
C5
R6
C6
Pd
Tj
Package and packing information VN820-E
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5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 45. SO-16L package dimensions
Table 18. SO-16L mechanical data
DIM.
mm.
Min. Typ. Max.
A2.65
a1 0.1 0.2
a2 2.45
b 0.35 0.49
b1 0.23 0.32
C0.5
c1 45° (typ.)
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5.2 PENTAWATT mechanical data
Figure 46. PENTAWATT package dimensions
DIM.
mm.
Min. Typ. Max.
D 10.1 10.5
E 10.0 10.65
e1.27
e3 8.89
F7.4 7.6
L 0.5 1.27
M0.75
S 8° (max.)
Table 18. SO-16L mechanical data (continued)
Package and packing information VN820-E
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Table 19. PENTAWATT mechanical data
Dim.
mm
Min. Typ. Max.
A4.8
C1.37
D2.4 2.8
D1 1.2 1.35
E 0.35 0.55
F 0.8 1.05
F1 1 1.4
G3.23.43.6
G1 6.6 6.8 7
H2 10.4
H3 10.05 10.4
L17.85
L1 15.75
L2 21.4
L3 22.5
L5 2.6 3
L6 15.1 15.8
L7 6 6.6
M4.5
M1 4
Diam. 3.65 3.85
VN820-E Package and packing information
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5.3 P2PAK mechanical data
Figure 47. P2PAK package dimensions
P010R
Package and packing information VN820-E
38/48
Table 20. P2PAK mechanical data
Dim.
mm
Min. Typ. Max.
A 4.30 4.80
A1 2.40 2.80
A2 0.03 0.23
b 0.80 1.05
c 0.45 0.60
c2 1.17 1.37
D 8.95 9.35
D2 8.00
E 10.00 10.40
E1 8.50
e 3.20 3.60
e1 6.60 7.00
L 13.70 14.50
L2 1.25 1.40
L3 0.90 1.70
L5 1.55 2.40
R0.40
V2 0º 8º
Package weight 1.40 Gr (typ)
VN820-E Package and packing information
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5.4 PPAK mechanical data
Figure 48. PPAK package dimensions
Table 21. PPAK mechanical data
Dim.
mm
Min. Typ. Max.
A 2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
B 0.40 0.60
B2 5.20 5.40
C 0.45 0.60
C2 0.48 0.60
D1 5.1
D 6.00 6.20
E 6.40 6.60
Package and packing information VN820-E
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5.5 PowerSO-10 mechanical data
Figure 49. PowerSO-10 package dimensions
Dim.
mm
Min. Typ. Max.
E1 4.7
e1.27
G 4.90 5.25
G1 2.38 2.70
H 9.35 10.10
L2 0.8 1.00
L4 0.60 1.00
R0.2
V2 0º 8º
Package weight Gr. 0.3
Table 21. PPAK mechanical data (continued)
DETAIL "A"
PLANE
SEATING
α
L
A1
F
A1
h
A
D
D1
= =
= =
E4
0.10 A
E
C
A
B
B
DETAIL "A"
SEATING
PLANE
E2
10
1
eB
HE
0.25
VN820-E Package and packing information
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Table 22. PowerSO-10 mechanical data
Dim.
mm
Min. Typ. Max.
A3.35 3.65
A(1)
1. Muar only POA P013P.
3.4 3.6
A1 0 0.10
B0.40 0.60
B(1) 0.37 0.53
C0.35 0.55
C(1) 0.23 0.32
D9.40 9.60
D1 7.40 7.60
E9.30 9.50
E2 7.20 7.60
E2(1) 7.30 7.50
E4 5.90 6.10
E4(1) 5.90 6.30
e1.27
F1.25 1.35
F(1) 1.20 1.40
H 13.80 14.40
H(1) 13.85 14.35
h0.50
L1.20 1.80
L(1) 0.80 1.10
α0° 8°
α(1) 2° 8°
Package and packing information VN820-E
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5.6 SO-16L packing information
Figure 50. SO-16L tube shipment (no suffix)
Figure 51. SO-16L tape and reel shipment (suffix “TR”)
All dimensions are in mm.
Base Q.ty 50
Bulk Q.ty 1000
Tube length (± 0.5) 532
A3.5
B13.8
C (± 0.1) 0.6
A
C
B
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Reel dimensions
VN820-E Package and packing information
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5.7 PENTAWATT packing information
Figure 52. PENTAWATT tube shipment (no suffix)
5.8 P2PAK packing information
Figure 53. P2PAK tube shipment (no suffix)
All dimensions are in mm.
Base Q.ty 50
Bulk Q.ty 1000
Tube length (± 0.5) 532
A18
B33.1
C (± 0.1) 1
C
B
A
All dimensions are in mm.
Base Q.ty 50
Bulk Q.ty 1000
Tube length (± 0.5) 532
A18
B33.1
C (± 0.1) 1
C
B
A
Package and packing information VN820-E
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Figure 54. P2PAK tape and reel (suffix “13TR”)
5.9 PPAK packing information
Figure 55. PPAK suggested pad layout
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
REEL DIMENSIONS
All dimensions are in mm.
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
6.71.83
VN820-E Package and packing information
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Figure 56. PPAK tube shipment (no suffix)
Figure 57. PPAK tape and reel (suffix “13TR”)
All dimensions are in mm.
Base Q.ty 75
Bulk Q.ty 3000
Tube length (± 0.5) 532
A6
B21.3
C (± 0.1) 0.6
A
C
B
All dimensions are in mm.
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 2.75
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
REEL DIMENSIONS
Package and packing information VN820-E
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5.10 PowerSO-10 packing information
Figure 60. PowerSO-10 tape and reel shipment (suffix “TR”)
Figure 58. PowerSO-10 suggested
pad layout
Figure 59. PowerSO-10 tube shipment
(no suffix)
6.30
10.8 - 11
14.6 - 14.9
9.5
1
2
3
4
5
1.27
0.67 - 0.73
0.54 - 0.6
10
9
8
7
6
B
A
C
All dimensions are in mm.
Base Q.ty Bulk Q.ty Tube length (±
0.5) AB C (±
0.1)
Casablanca 50 1000 532 10.4 16.4 0.8
Muar 50 1000 532 4.9 17.2 0.8
C
A
B
MUARCASABLANCA
Base Q.ty 600
Bulk Q.ty 600
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 24
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Reel dimensions
VN820-E Revision history
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6 Revision history
Table 23. Document revision history
Date Revision Changes
07-Dec-2004 1 Initial release.
09-Feb-2005 2 Text changed.
23-Mar-2005 3 Configuration diagram (PowerSO-10) modification.
03-May-2006 4 SO-16L mechanical and shipment data insertion.
17-Dec-2008 5
Document reformatted and restructured.
Added content, list of figures and tables.
Added ECOPACK® packages information.
Updated Figure 54.: P2PAK tape and reel (suffix “13TR”):
– changed component spacing (P) in tape dimensions table from 16
mm to 12 mm.
VN820-E
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