S-82A1A Series
www.ablic.com
BATTERY PROTECTION IC FOR 1-CELL PACK
© ABLIC Inc., 2016-2019 Rev.2.4_00
1
The S-82A1A Series is a protection IC for lithium-ion / lithium polymer rechargeable batteries and includes high-accuracy
voltage detection circuits and delay circuits. It is suitable for protecting 1-cell lithium-ion / lithium polymer rechargeable
battery packs from overcharge, overdischarge, and overcurrent.
By using an external overcurrent detection resistor, the S-82A1A Series realizes high-accuracy overcurrent protection with
less effect from temperature change.
Features
High-accuracy voltage detection circuit
Overcharge detection voltage 3.5 V to 4.6 V (5 mV step) Accuracy ±20 mV
Overcharge release voltage 3.1 V to 4.6 V*1 Accuracy ±50 mV
Overdischarge detection voltage 2.0 V to 3.0 V (10 mV step) Accuracy ±50 mV
Overdischarge release voltage 2.0 V to 3.4 V*2 Accuracy ±100 mV
Discharge overcurrent detection voltage 1 0.010 V to 0.100 V (1 mV step) Accuracy ±3 mV
Discharge overcurrent detection voltage 2 0.030 V to 0.200 V (1 mV step) Accuracy ±5 mV
Load short-circuiting detection voltage 0.050 V to 0.500 V (5 mV step) Accuracy ±20 mV
Charge overcurrent detection voltage 0.100 V to 0.010 V (1 mV step) Accuracy ±3 mV
Detection delay times are generated only by an internal circuit (external capacitors are unnecessary).
0 V battery charge: Enabled, inhibited
Power-down function: Available, unavailable
Release condition of discharge overcurrent status: Load disconnection, charger connection
Release voltage of discharge overcurrent status: Discharge overcurrent detection voltage 1 (VDIOV1),
discharge overcurrent release voltage (VRIOV) = VDD × 0.8 (typ.)
High-withstand voltage: VM pin and CO pin: Absolute maximum rating 28 V
Wide operation temperature range: Ta = 40°C to +85°C
Low current consumption
During operation: 2.0 μA typ., 4.0 μA max. (Ta = +25°C)
During power-down: 50 nA max. (Ta = +25°C)
During overdischarge: 500 nA max. (Ta = +25°C)
Lead-free, Sn 100%, halogen-freeP
*3
*1. Overcharge release voltage = Overcharge detection voltage Overcharge hysteresis voltage
(Overcharge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.4 V in 50 mV step.)
*2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage
(Overdischarge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.7 V in 100 mV step.)
*3. Refer to " Product Name Structure" for details.
Applications
Lithium-ion rechargeable battery pack
Lithium polymer rechargeable battery pack
Packages
SNT-6A
DFN-6(1414)A
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
2
Block Diagram
Control logic
Delay circuit
Oscillator
VINI
VSS
VDD
CO
DO
Load short-circuiting
detection comparator
Charge overcurrent
detection comparator
VM
Overdischarge
detection comparator
Overcharge
detection comparator
Discharge overcurrent
detection 1 comparator
Discharge overcurrent
detection 2 comparator
Figure 1
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
3
Product Name Structure
1. Product name
1. 1 SNT-6A
S-82A1A xx - I6T1 U
Package abbreviation and IC packing specifications*1
I6T1: SNT-6A, Tape
Serial code*2
Sequentially set from AA to ZZ
Environmental code
U: Lead-free (Sn 100%), halogen-free
*1. Refer to the tape drawing.
*2. Refer to "3. Product name list".
1. 2 DFN-6(1414)A
S-82A1A xx - A6T5 S
Package abbreviation and IC packing specifications*1
A6T5: DFN-6(1414)A, Tape
Serial code*2
Sequentially set from AA to ZZ
Environmental code
S: Lead-free, halogen-free
*1. Refer to the tape drawing.
*2. Refer to "3. Product name list".
2. Packages
Table 1 Package Drawing Codes
Package Name Dimension Tape Reel Land
SNT-6A PG006-A-P-SD PG006-A-C-SD PG006-A-R-SD PG006-A-L-SD
DFN-6(1414)A PV006-A-P-SD PV006-A-C-SD PV006-A-R-SD PV006-A-L-SD
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
4
3. Product name list
3. 1 SNT-6A
Table 2 (1 / 2)
Product Name
Overcharge
Detection
Voltage
[V
CU
]
Overcharge
Release
Voltage
[V
CL
]
Overdischarge
Detection
Voltage
[V
DL
]
Overdischarge
Release
Voltage
[V
DU
]
Discharge
Overcurrent
Detection
Voltage 1
[V
DIOV1
]
Discharge
Overcurrent
Detection
Voltage 2
[V
DIOV2
]
Load Short-
circuiting
Detection
Voltage
[V
SHORT
]
Charge
Overcurrent
Detection
Voltage
[V
CIOV
]
S-82A1AAB-I6T1U 4.470 V 4.270 V 2.500 V 2.800 V 0.048 V
0.140 V
0.031 V
S-82A1AAC-I6T1U 4.425 V 4.225 V 2.800 V 3.000 V 0.034 V
0.180 V
0.022 V
S-82A1AAD-I6T1U 4.425 V 4.225 V 2.800 V 3.000 V 0.040 V
0.180 V
0.030 V
S-82A1AAE-I6T1U 4.475 V 4.275 V 2.500 V 2.900 V 0.036 V
0.060 V
0.020 V
S-82A1AAF-I6T1U 4.425 V 4.225 V 2.400 V 2.800 V 0.034 V
0.180 V
0.023 V
S-82A1AAG-I6T1U 4.230 V 4.130 V 2.800 V 3.000 V 0.050 V
0.150 V
0.030 V
S-82A1AAH-I6T1U 4.500 V 4.300 V 2.300 V 2.700 V 0.065 V
0.300 V
0.065 V
S-82A1AAI-I6T1U 4.425 V 4.225 V 2.600 V 2.600 V 0.030 V 0.045 V 0.150 V
0.025 V
S-82A1AAJ-I6T1U 4.425 V 4.225 V 2.600 V 2.900 V 0.030 V
0.180 V
0.031 V
S-82A1AAK-I6T1U 4.425 V 4.225 V 2.800 V 3.000 V 0.040 V
0.180 V
0.030 V
S-82A1AAL-I6T1U 4.425 V 4.225 V 2.800 V 3.000 V 0.040 V
0.150 V
0.030 V
S-82A1AAM-I6T1U 4.475 V 4.275 V 2.800 V 3.000 V 0.040 V
0.180 V
0.030 V
S-82A1AAN-I6T1U 4.425 V 4.225 V 2.600 V 2.800 V 0.040 V
0.180 V
0.030 V
S-82A1AAO-I6T1U 4.425 V 4.225 V 2.500 V 2.900 V 0.036 V
0.060 V
0.020 V
S-82A1AAP-I6T1U 4.475 V 4.275 V 2.400 V 2.800 V 0.025 V
0.075 V
0.025 V
S-82A1AAQ-I6T1U 4.485 V 4.285 V 2.300 V 2.500 V 0.025 V 0.034 V 0.500 V
0.020 V
S-82A1AAR-I6T1U 4.475 V 4.275 V 2.500 V 2.900 V 0.032 V
0.060 V
0.020 V
S-82A1AAS-I6T1U 4.425 V 4.225 V 2.600 V 2.800 V 0.030 V 0.045 V 0.150 V
0.025 V
S-82A1AAT-I6T1U 4.425 V 4.225 V 2.600 V 2.800 V 0.030 V 0.045 V 0.250 V
0.025 V
S-82A1AAU-I6T1U 4.520 V 4.320 V 2.300 V 2.700 V 0.036 V
0.100 V
0.030 V
S-82A1AAV-I6T1U 4.470 V 4.270 V 2.500 V 2.900 V 0.035 V
0.100 V
0.030 V
S-82A1AAW-I6T1U 4.520 V 4.320 V 2.300 V 2.700 V 0.021 V
0.070 V
0.021 V
S-82A1AAX-I6T1U 4.475 V 4.275 V 2.600 V 3.000 V 0.021 V
0.050 V
0.021 V
S-82A1AAY-I6T1U 4.520 V 4.270 V 2.400 V 2.800 V 0.036 V
0.100 V
0.030 V
S-82A1AAZ-I6T1U 4.520 V 4.270 V 2.400 V 2.800 V 0.036 V
0.100 V
0.030 V
S-82A1ABM-I6T1U 4.475 V 4.275 V 2.500 V 2.900 V 0.021 V
0.080 V
0.027 V
S-82A1ABN-I6T1U 4.520 V 4.320 V 2.100 V 2.300 V 0.021 V
0.100 V
0.033 V
S-82A1ABR-I6T1U 4.475 V 4.275 V 2.500 V 2.800 V 0.010 V
0.035 V
0.013 V
S-82A1ABT-I6T1U 3.750 V 3.600 V 2.400 V 2.600 V 0.040 V
0.060 V
0.040 V
S-82A1ABW-I6T1U 4.250 V 4.050 V 2.500 V 2.900 V 0.040 V
0.100 V
0.040 V
S-82A1ABX-I6T1U 4.425 V 4.225 V 3.000 V 3.200 V 0.010 V
0.050 V
0.010 V
S-82A1ABY-I6T1U 4.500 V 4.300 V 2.500 V 2.700 V 0.010 V
0.060 V
0.010 V
S-82A1ACA-I6T1U 4.425 V 4.225 V 3.000 V 3.200 V 0.030 V
0.060 V
0.030 V
S-82A1ACH-I6T1U 4.275 V 4.275 V 2.300 V 2.300 V 0.035 V
0.060 V
0.025 V
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
5
Table 2 (2 / 2)
Product Name Delay Time
Combination
*1
0 V Battery Charge
*2
Power-down
Function
*3
Release Condition
of Discharge
Overcurrent Status
*4
Release Voltage of
Discharge
Overcurrent Status
*5
S-82A1AAB-I6T1U (1) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAC-I6T1U (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAD-I6T1U (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAE-I6T1U (3) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAF-I6T1U (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAG-I6T1U (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAH-I6T1U (4) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAI-I6T1U (5) Inhibited Available Load disconnection V
RIOV
S-82A1AAJ-I6T1U (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAK-I6T1U (2) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAL-I6T1U (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAM-I6T1U (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAN-I6T1U (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAO-I6T1U (3) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAP-I6T1U (1) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAQ-I6T1U (6) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAR-I6T1U (3) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAS-I6T1U (5) Inhibited Available Load disconnection V
DIOV1
S-82A1AAT-I6T1U (7) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAU-I6T1U (8) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAV-I6T1U (9) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAW-I6T1U (8) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAX-I6T1U (3) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAY-I6T1U (10) Enabled Unavailable Load disconnection V
RIOV
S-82A1AAZ-I6T1U (10) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ABM-I6T1U (12) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABN-I6T1U (13) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABR-I6T1U (9) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ABT-I6T1U (14) Inhibited Available Load disconnection V
RIOV
S-82A1ABW-I6T1U (16) Inhibited Available Load disconnection V
DIOV1
S-82A1ABX-I6T1U (3) Enabled Available Load disconnection V
RIOV
S-82A1ABY-I6T1U (8) Enabled Available Load disconnection V
RIOV
S-82A1ACA-I6T1U (17) Enabled Available Load disconnection V
RIOV
S-82A1ACH-I6T1U (19) Inhibited Available Load disconnection V
RIOV
*1. Refer to Table 4 about the details of the delay time combinations.
*2. 0 V battery charge:
Enabled
,
inhibited
*3. Power-down function: Available, unavailable
*4. Release condition of discharge overcurrent status: Load disconnection, charger connection
*5. Release voltage of discharge overcurrent status: VDIOV1, VRIOV = VDD × 0.8 (typ.)
Remark Please contact our sales representatives for products other than the above.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
6
3. 2 DFN-6(1414)A
Table 3 (1 / 2)
Product Name
Overcharge
Detection
Voltage
[V
CU
]
Overcharge
Release
Voltage
[V
CL
]
Overdischarge
Detection
Voltage
[V
DL
]
Overdischarge
Release
Voltage
[V
DU
]
Discharge
Overcurrent
Detection
Voltage 1
[V
DIOV1
]
Discharge
Overcurrent
Detection
Voltage 2
[V
DIOV2
]
Load Short-
circuiting
Detection
Voltage
[V
SHORT
]
Charge
Overcurrent
Detection
Voltage
[V
CIOV
]
S-82A1AAC-A6T5S 4.425 V 4.225 V 2.800 V 3.000 V 0.034 V
0.180 V
0.022 V
S-82A1AAD-A6T5S 4.425 V 4.225 V 2.800 V 3.000 V 0.040 V
0.180 V
0.030 V
S-82A1AAF-A6T5S 4.425 V 4.225 V 2.400 V 2.800 V 0.034 V
0.180 V
0.023 V
S-82A1AAG-A6T5S 4.230 V 4.130 V 2.800 V 3.000 V 0.050 V
0.150 V
0.030 V
S-82A1AAM-A6T5S 4.475 V 4.275 V 2.800 V 3.000 V 0.040 V
0.180 V
0.030 V
S-82A1ABA-A6T5S 4.475 V 4.275 V 2.600 V 3.000 V 0.035 V
0.075 V
0.035 V
S-82A1ABB-A6T5S 4.475 V 4.275 V 2.600 V 3.000 V 0.021 V
0.050 V
0.021 V
S-82A1ABC-A6T5S 4.470 V 4.250 V 2.600 V 2.800 V 0.033 V 0.055 V 0.250 V
0.030 V
S-82A1ABD-A6T5S 4.520 V 4.300 V 2.300 V 2.800 V 0.035 V 0.051 V 0.250 V
0.043 V
S-82A1ABE-A6T5S 4.475 V 4.225 V 2.600 V 3.000 V 0.030 V
0.080 V
0.030 V
S-82A1ABF-A6T5S 4.475 V 4.225 V 2.600 V 3.000 V 0.040 V
0.120 V
0.035 V
S-82A1ABG-A6T5S 4.425 V 4.225 V 2.400 V 2.900 V 0.014 V
0.070 V
0.034 V
S-82A1ABH-A6T5S 4.425 V 4.225 V 2.600 V 2.900 V 0.030 V
0.150 V
0.031 V
S-82A1ABI-A6T5S 4.425 V 4.225 V 2.600 V 2.800 V 0.030 V 0.045 V 0.150 V
0.025 V
S-82A1ABK-A6T5S 4.475 V 4.275 V 2.500 V 2.900 V 0.045 V
0.130 V
0.034 V
S-82A1ABL-A6T5S 4.475 V 4.275 V 2.600 V 2.900 V 0.040 V
0.180 V
0.030 V
S-82A1ABM-A6T5S 4.475 V 4.275 V 2.500 V 2.900 V 0.021 V
0.080 V
0.027 V
S-82A1ABN-A6T5S 4.520 V 4.320 V 2.100 V 2.300 V 0.021 V
0.100 V
0.033 V
S-82A1ABO-A6T5S 4.475 V 4.275 V 2.800 V 3.000 V 0.010 V
0.050 V
0.010 V
S-82A1ABP-A6T5S 4.475 V 4.275 V 2.800 V 3.000 V 0.010 V
0.050 V
0.014 V
S-82A1ABQ-A6T5S 4.475 V 4.275 V 2.800 V 3.000 V 0.034 V
0.100 V
0.025 V
S-82A1ABV-A6T5S 4.275 V 4.175 V 2.600 V 2.800 V 0.040 V 0.050 V
0.200 V
0.040 V
S-82A1ACE-A6T5S 4.550 V 4.350 V 2.600 V 3.000 V 0.040 V
0.180 V
0.040 V
S-82A1ACF-A6T5S 4.275 V 4.175 V 2.900 V 3.000 V 0.040 V 0.050 V 0.200 V
0.040 V
S-82A1ACG-A6T5S 4.475 V 4.275 V 2.800 V 3.000 V 0.017 V 0.030 V 0.050 V
0.017 V
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
7
Table 3 (2 / 2)
Product Name Delay Time
Combination
*1
0 V Battery Charge
*2
Power-down
Function
*3
Release Condition
of Discharge
Overcurrent Status
*4
Release Voltage of
Discharge
Overcurrent Status
*5
S-82A1AAC-A6T5S (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAD-A6T5S (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAF-A6T5S (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAG-A6T5S (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1AAM-A6T5S (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ABA-A6T5S (9) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABB-A6T5S (9) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABC-A6T5S (5) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ABD-A6T5S (11) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ABE-A6T5S (2) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABF-A6T5S (2) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABG-A6T5S (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ABH-A6T5S (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ABI-A6T5S (5) Enabled Available Load disconnection V
DIOV1
S-82A1ABK-A6T5S (9) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ABL-A6T5S (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ABM-A6T5S (12) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABN-A6T5S (13) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABO-A6T5S (9) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABP-A6T5S (9) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABQ-A6T5S (3) Enabled Unavailable Load disconnection V
RIOV
S-82A1ABV-A6T5S (15) Inhibited Available Charger connection V
DIOV1
S-82A1ACE-A6T5S (2) Inhibited Unavailable Load disconnection V
RIOV
S-82A1ACF-A6T5S (15) Inhibited Available Charger connection V
DIOV1
S-82A1ACG-A6T5S (18) Inhibited Unavailable Load disconnection V
RIOV
*1. Refer to Table 4 about the details of the delay time combinations.
*2. 0 V battery charge:
Enabled
,
inhibited
*3. Power-down function: Available, unavailable
*4. Release condition of discharge overcurrent status: Load disconnection, charger connection
*5. Release voltage of discharge overcurrent status: VDIOV1, VRIOV = VDD × 0.8 (typ.)
Remark Please contact our sales representatives for products other than the above.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
8
Table 4
Delay Time
Combination
Overcharge
Detection
Delay Time
[tCU]
Overdischarge
Detection
Delay Time
[tDL]
Discharge
Overcurrent
Detection
Delay Time 1
[tDIOV1]
Discharge
Overcurrent
Detection
Delay Time 2
[tDIOV2]
Load Short-
circuiting
Detection
Delay Time
[tSHORT]
Charge
Overcurrent
Detection
Delay Time
[tCIOV]
(1) 1.0 s 128 ms 16 ms 280 μs 8 ms
(2) 1.0 s 32 ms 16 ms 280 μs 16 ms
(3) 1.0 s 64 ms 16 ms 280 μs 8 ms
(4) 1.0 s 32 ms 16 ms 530 μs 16 ms
(5) 1.0 s 32 ms 4.0 s 16 ms 280 μs 16 ms
(6) 1.0 s 64 ms 512 ms 32 ms 280 μs 8 ms
(7) 1.0 s 128 ms 4.0 s 16 ms 280 μs 8 ms
(8) 1.0 s 64 ms 32 ms 530 μs 16 ms
(9) 1.0 s 64 ms 16 ms 280 μs 16 ms
(10) 1.0 s 64 ms 256 ms 530 μs 16 ms
(11) 1.0 s 32 ms 2.0 s 16 ms 280 μs 16 ms
(12) 1.0 s 64 ms 256 ms 280 μs 16 ms
(13) 1.0 s 64 ms 512 ms 280 μs 16 ms
(14) 1.0 s 64 ms 64 ms 280 μs 8 ms
(15) 512 ms 64 ms 8 ms 4 ms 530 μs 8 ms
(16) 1.0 s 64 ms 512 ms 280 μs 8 ms
(17) 1.0 s 128 ms 256 ms 280 μs 8 ms
(18) 1.0 s 256 ms 128 ms 16 ms 280 μs 64 ms
(19) 1.0 s 64 ms 8 ms 280 μs 8 ms
Remark
The delay times can be changed within the range listed in
Table 5
. For details, please contact our sales representatives.
Table 5
Delay Time Symbol Selection Range Remark
Overcharge detection
delay time tCU 256 ms 512 ms 1.0 s Select a value from
the left.
Overdischarge
detection delay time tDL 32 ms 64 ms 128 ms 256 ms Select a value from
the left.
Discharge
overcurrent detection
delay time 1
tDIOV1
4 ms 8 ms 16 ms 32 ms 64 ms 128 ms Select a value from
the left.
256 ms 512 ms 1.0 s 2.0 s 4.0 s
Discharge
overcurrent detection
delay time 2
tDIOV2 4 ms 8 ms 16 ms 32 ms 64 ms 128 ms Select a value from
the left.
Load short-circuiting
detection delay time tSHORT 280 μs 530 μs Select a value from
the left.
Charge overcurrent
detection delay time tCIOV 4 ms 8 ms 16 ms 32 ms 64 ms 128 ms Select a value from
the left.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
9
Pin Configuration
1. SNT-6A
5
4
6
2
3
1
Top view
Figure 2
Table 6
Pin No. Symbol Description
1 VM Input pin for external negative voltage
2 CO Connection pin of charge control FET gate
(CMOS output)
3 DO Connection pin of discharge control FET gate
(CMOS output)
4 VSS Input pin for negative power supply
5 VDD Input pin for positive power supply
6 VINI Overcurrent detection pin
2. DFN-6(1414)A
Top view
Bottom view
16
34
61
43
*1
Figure 3
Table 7
Pin No. Symbol Description
1 VSS Input pin for negative power suppl
y
2 VDD Input pin for positive power supply
3 VINI Overcurrent detection pin
4 VM Input pin for external negative voltage
5 CO Connection pin of charge control FET gate
(CMOS output)
6 DO Connection pin of discharge control FET gate
(CMOS output)
*1.
Connect the heat sink of backside at shadowed area to the board, and set electric potential open or VDD.
However, do not use it as the function of electrode.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
10
Absolute Maximum Ratings
Table 8
(Ta = +25°C unless otherwise specified)
Item Symbol Applied Pin Absolute Maximum Rating Unit
Input voltage between VDD pin and VSS pin VDS VDD
VSS 0.3 to VSS + 6 V
VINI pin input voltage VVINI VINI VDD 6 to VDD + 0.3 V
VM pin input voltage VVM VM VDD 28 to VDD + 0.3 V
DO pin output voltage VDO DO VSS 0.3 to VDD + 0.3 V
CO pin output voltage VCO CO VVM 0.3 to VDD + 0.3 V
Operation ambient temperature Topr 40 to +85 °C
Storage temperature Tstg 55 to +125 °C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Thermal Resistance Value
Table 9
Item Symbol Condition Min. Typ. Max. Unit
Junction-to-ambient thermal resistance*1 θJA
SNT-6A
Board A 224 − °C/W
Board B 176 − °C/W
Board C − °C/W
Board D − °C/W
Board E − °C/W
DFN-6(1414)A
Board A 315 − °C/W
Board B 276 − °C/W
Board C − °C/W
Board D − °C/W
Board E − °C/W
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark Refer to " Power Dissipation" and "Test Board" for details.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
11
Electrical Characteristics
1. Ta = +25°C
Table 10
(Ta = +25°C unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test
Circuit
Detection Voltage
Overcharge detection voltage V
CU
V
CU
0.020 V
CU
V
CU
+
0.020 V 1
Ta =
10°C
to
+
60°C
*1
V
CU
0.025 V
CU
V
CU
+
0.025 V 1
Overcharge release voltage V
CL
V
CL
V
CU
V
CL
0.050 V
CL
V
CL
+
0.050 V 1
V
CL
= V
CU
V
CL
0.025 V
CL
V
CL
+
0.020 V 1
Overdischarge detection voltage V
DL
V
DL
0.050 V
DL
V
DL
+
0.050 V 2
Overdischarge release voltage V
DU
V
DL
V
DU
V
DU
0.100 V
DU
V
DU
+
0.100 V 2
V
DL
= V
DU
V
DU
0.050 V
DU
V
DU
+
0.050 V 2
Discharge overcurrent detection voltage 1 V
DIOV1
V
DIOV1
0.003 V
DIOV1
V
DIOV1
+
0.003 V 2
Discharge overcurrent detection voltage 2 V
DIOV2
V
DIOV2
0.005 V
DIOV2
V
DIOV2
+
0.005 V 2
Load short-circuiting detection voltage V
SHORT
V
SHORT
0.020 V
SHORT
V
SHORT
+
0.020 V 2
Charge overcurrent detection voltage V
CIOV
V
CIOV
0.003 V
CIOV
V
CIOV
+
0.003 V 2
Discharge overcurrent release voltage V
RIOV
V
DD
= 3.4 V V
DD
×
0.77 V
DD
×
0.8 V
DD
×
0.83 V 2
0 V Battery Charge
0 V battery charge starting charger voltage V
0CHA
0 V battery charge enabled 0.0 0.7 1.0 V 2
0 V battery charge inhibition battery voltage V
0INH
0 V battery charge inhibited 0.9 1.2 1.5 V 2
Internal Resistance
Resistance between VDD pin and VM pin R
VMD
V
DD
= 1.8 V, V
VM
= 0 V 500 1000 2000 k
Ω
3
Resistance between VM pin and VSS pin R
VMS
V
DD
= 3.4 V, V
VM
= 1.0 V 5 10 15 k
Ω
3
Input Voltage
Operation voltage between VDD pin and
VSS pin V
DSOP1
1.5
6.0 V
Operation voltage between VDD pin and
VM pin V
DSOP2
1.5
28 V
Input Current
Current consumption during operation I
OPE
V
DD
= 3.4 V, V
VM
= 0 V
2.0 4.0
μ
A 3
Current consumption during power-down I
PDN
V
DD
= V
VM
= 1.5 V
0.05
μ
A 3
Current consumption during overdischarge I
OPED
V
DD
= V
VM
= 1.5 V
0.5
μ
A 3
Output Resistance
CO pin resistance "H" R
COH
5 10 20 k
Ω
4
CO pin resistance "L" R
COL
5 10 20 k
Ω
4
DO pin resistance "H" R
DOH
5 10 20 k
Ω
4
DO pin resistance "L" R
DOL
5 10 20 k
Ω
4
Delay Time
Overcharge detection delay time t
CU
t
CU
×
0.7
t
CU
t
CU
×
1.3
5
Overdischarge detection delay time t
DL
t
DL
×
0.7
t
DL
t
DL
×
1.3
5
Discharge overcurrent detection delay time 1 t
DIOV1
t
DIOV1
×
0.7 t
DIOV1
t
DIOV1
×
1.3
5
Discharge overcurrent detection delay time 2 t
DIOV2
t
DIOV2
×
0.7 t
DIOV2
t
DIOV2
×
1.3
5
Load short-circuiting detection delay time t
SHORT
t
SHORT
×
0.7 t
SHORT
t
SHORT
×
1.3
5
Charge overcurrent detection delay time t
CIOV
t
CIOV
×
0.7 t
CIOV
t
CIOV
×
1.3
5
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
12
2. Ta = 20°C to +60°C*1
Table 11
(Ta = 20°C to +60°C*1 unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test
Circuit
Detection Voltage
Overcharge detection voltage V
CU
V
CU
0.035 V
CU
V
CU
+
0.027 V 1
Overcharge release voltage V
CL
V
CL
V
CU
V
CL
0.065 V
CL
V
CL
+
0.057 V 1
V
CL
= V
CU
V
CL
0.040 V
CL
V
CL
+
0.027 V 1
Overdischarge detection voltage V
DL
V
DL
0.060 V
DL
V
DL
+
0.055 V 2
Overdischarge release voltage V
DU
V
DL
V
DU
V
DU
0.110 V
DU
V
DU
+
0.105 V 2
V
DL
= V
DU
V
DU
0.060 V
DU
V
DU
+
0.055 V 2
Discharge overcurrent detection voltage 1 V
DIOV1
V
DIOV1
0.003 V
DIOV1
V
DIOV1
+
0.003 V 2
Discharge overcurrent detection voltage 2 V
DIOV2
V
DIOV2
0.005 V
DIOV2
V
DIOV2
+
0.005 V 2
Load short-circuiting detection voltage V
SHORT
V
SHORT
0.020 V
SHORT
V
SHORT
+
0.020 V 2
Charge overcurrent detection voltage V
CIOV
V
CIOV
0.003 V
CIOV
V
CIOV
+
0.003 V 2
Discharge overcurrent release voltage V
RIOV
V
DD
= 3.4 V V
DD
×
0.77 V
DD
×
0.8 V
DD
×
0.83 V 2
0 V Battery Charge
0 V battery charge starting charger voltage V
0CHA
0 V battery charge enabled 0.0 0.7 1.5 V 2
0 V battery charge inhibition battery voltage V
0INH
0 V battery charge inhibited 0.7 1.2 1.7 V 2
Internal Resistance
Resistance between VDD pin and VM pin R
VMD
V
DD
= 1.8 V, V
VM
= 0 V 250 1000 3000 k
Ω
3
Resistance between VM pin and VSS pin R
VMS
V
DD
= 3.4 V, V
VM
= 1.0 V 3.5 10 20 k
Ω
3
Input Voltage
Operation voltage between VDD pin and
VSS pin V
DSOP1
1.5
6.0 V
Operation voltage between VDD pin and
VM pin V
DSOP2
1.5
28 V
Input Current
Current consumption during operation I
OPE
V
DD
= 3.4 V, V
VM
= 0 V
2.0 5.0
μ
A 3
Current consumption during power-down I
PDN
V
DD
= V
VM
= 1.5 V
0.1
μ
A 3
Current consumption during overdischarge I
OPED
V
DD
= V
VM
= 1.5 V
1.0
μ
A 3
Output Resistance
CO pin resistance "H" R
COH
2.5 10 30 k
Ω
4
CO pin resistance "L" R
COL
2.5 10 30 k
Ω
4
DO pin resistance "H" R
DOH
2.5 10 30 k
Ω
4
DO pin resistance "L" R
DOL
2.5 10 30 k
Ω
4
Delay Time
Overcharge detection delay time t
CU
t
CU
×
0.55
t
CU
t
CU
×
2.0
5
Overdischarge detection delay time t
DL
t
DL
×
0.55
t
DL
t
DL
×
2.0
5
Discharge overcurrent detection delay time 1 t
DIOV1
t
DIOV1
×
0.55 t
DIOV1
t
DIOV1
×
2.0
5
Discharge overcurrent detection delay time 2 t
DIOV2
t
DIOV2
×
0.55 t
DIOV2
t
DIOV2
×
2.0
5
Load short-circuiting detection delay time t
SHORT
t
SHORT
×
0.55 t
SHORT
t
SHORT
×
2.0
5
Charge overcurrent detection delay time t
CIOV
t
CIOV
×
0.55 t
CIOV
t
CIOV
×
2.0
5
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
13
3. Ta = 40°C to +85°C*1
Table 12
(Ta = 40°C to +85°C*1 unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test
Circuit
Detection Voltage
Overcharge detection voltage V
CU
V
CU
0.045 V
CU
V
CU
+
0.030 V 1
Overcharge release voltage V
CL
V
CL
V
CU
V
CL
0.080 V
CL
V
CL
+
0.060 V 1
V
CL
= V
CU
V
CL
0.050 V
CL
V
CL
+
0.030 V 1
Overdischarge detection voltage V
DL
V
DL
0.080 V
DL
V
DL
+
0.060 V 2
Overdischarge release voltage V
DU
V
DL
V
DU
V
DU
0.130 V
DU
V
DU
+
0.110 V 2
V
DL
= V
DU
V
DU
0.080 V
DU
V
DU
+
0.060 V 2
Discharge overcurrent detection voltage 1 V
DIOV1
V
DIOV1
0.003 V
DIOV1
V
DIOV1
+
0.003 V 2
Discharge overcurrent detection voltage 2 V
DIOV2
V
DIOV2
0.005 V
DIOV2
V
DIOV2
+
0.005 V 2
Load short-circuiting detection voltage V
SHORT
V
SHORT
0.020 V
SHORT
V
SHORT
+
0.020 V 2
Charge overcurrent detection voltage V
CIOV
V
CIOV
0.003 V
CIOV
V
CIOV
+
0.003 V 2
Discharge overcurrent release voltage V
RIOV
V
DD
= 3.4 V V
DD
×
0.77 V
DD
×
0.8 V
DD
×
0.83 V 2
0 V Battery Charge
0 V battery charge starting charger voltage V
0CHA
0 V battery charge enabled 0.0 0.7 1.5 V 2
0 V battery charge inhibition battery voltage V
0INH
0 V battery charge inhibited 0.7 1.2 1.7 V 2
Internal Resistance
Resistance between VDD pin and VM pin R
VMD
V
DD
= 1.8 V, V
VM
= 0 V 250 1000 3000 k
Ω
3
Resistance between VM pin and VSS pin R
VMS
V
DD
= 3.4 V, V
VM
= 1.0 V 3.5 10 20 k
Ω
3
Input Voltage
Operation voltage between VDD pin and
VSS pin V
DSOP1
1.5
6.0 V
Operation voltage between VDD pin and
VM pin V
DSOP2
1.5
28 V
Input Current
Current consumption during operation I
OPE
V
DD
= 3.4 V, V
VM
= 0 V
2.0 5.0
μ
A 3
Current consumption during power-down I
PDN
V
DD
= V
VM
= 1.5 V
0.1
μ
A 3
Current consumption during overdischarge I
OPED
V
DD
= V
VM
= 1.5 V
1.0
μ
A 3
Output Resistance
CO pin resistance "H" R
COH
2.5 10 30 k
Ω
4
CO pin resistance "L" R
COL
2.5 10 30 k
Ω
4
DO pin resistance "H" R
DOH
2.5 10 30 k
Ω
4
DO pin resistance "L" R
DOL
2.5 10 30 k
Ω
4
Delay Time
Overcharge detection delay time t
CU
t
CU
×
0.4
t
CU
t
CU
×
2.5
5
Overdischarge detection delay time t
DL
t
DL
×
0.4
t
DL
t
DL
×
2.5
5
Discharge overcurrent detection delay time 1 t
DIOV1
t
DIOV1
×
0.4 t
DIOV1
t
DIOV1
×
2.5
5
Discharge overcurrent detection delay time 2 t
DIOV2
t
DIOV2
×
0.4 t
DIOV2
t
DIOV2
×
2.5
5
Load short-circuiting detection delay time t
SHORT
t
SHORT
×
0.4 t
SHORT
t
SHORT
×
2.5
5
Charge overcurrent detection delay time t
CIOV
t
CIOV
×
0.4 t
CIOV
t
CIOV
×
2.5
5
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
14
Test Circuits
Caution Unless otherwise specified, the output voltage levels "H" and "L" at CO pin (VCO) and DO pin (VDO) are
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
VVM and the DO pin level with respect to VSS.
1. Overcharge detection voltage, overcharge release voltage
(Test circuit 1)
Overcharge detection voltage (VCU) is defined as the voltage V1 at which VCO goes from "H" to "L" when the voltage
V1 is gradually increased from the starting condition of V1 = 3.4 V. Overcharge release voltage (VCL) is defined as
the voltage V1 at which VCO goes from "L" to "H" when the voltage V1 is then gradually decreased. Overcharge
hysteresis voltage (VHC) is defined as the difference between VCU and VCL.
2. Overdischarge detection voltage, overdischarge release voltage
(Test circuit 2)
Overdischarge detection voltage (VDL) is defined as the voltage V1 at which VDO goes from "H" to "L" when the
voltage V1 is gradually decreased from the starting conditions of V1 = 3.4 V, V2 = V5 = 0 V. Overdischarge release
voltage (VDU) is defined as the voltage V1 at which VDO goes from "L" to "H" when setting V2 = 0.01 V, V5 = 0 V and
when the voltage V1 is then gradually increased. Overdischarge hysteresis voltage (VHD) is defined as the difference
between VDU and VDL.
3. Discharge overcurrent detection voltage 1, discharge overcurrent release voltage
(Test circuit 2)
3. 1 Release voltage of discharge overcurrent status "VDIOV1"
Discharge overcurrent detection voltage 1 (VDIOV1) is defined as the voltage V5 whose delay time for changing
VDO from "H" to "L" is discharge overcurrent detection delay time 1 (tDIOV1) when the voltage V5 is increased
from the starting conditions of V1 = V2 = 3.4 V, V5 = 0 V. VDO goes from "L" to "H" when setting V5 = 0 V and
when the voltage V2 is then gradually decreased to VDIOV1 typ. or lower.
3. 2 Release voltage of discharge overcurrent status "VRIOV"
VDIOV1 is defined as the voltage V5 whose delay time for changing VDO from "H" to "L" is tDIOV1 when the voltage
V5 is increased from the starting conditions of V1 = V2 = 3.4 V, V5 = 0 V. Discharge overcurrent release voltage
(VRIOV) is defined as the voltage V2 at which VDO goes from "L" to "H" when setting V5 = 0 V and when the
voltage V2 is then gradually decreased.
4. Discharge overcurrent detection voltage 2 (for only the products whose discharge overcurrent
detection voltage 2 is set)
(Test circuit 2)
Discharge overcurrent detection voltage 2 (VDIOV2) is defined as the voltage V5 whose delay time for changing VDO
from "H" to "L" is discharge overcurrent detection delay time 2 (t
DIOV2) when the voltage V5 is increased from the
starting conditions of V1 = V2 = 3.4 V, V5 = 0 V.
5. Load short-circuiting detection voltage
(Test circuit 2)
Load short-circuiting detection voltage (VSHORT) is defined as the voltage V5 whose delay time for changing VDO from
"H" to "L" is load short-circuiting detection delay time (tSHORT) when the voltage V5 is increased from the starting
conditions of V1 = V2 = 3.4 V, V5 = 0 V.
6. Charge overcurrent detection voltage
(Test circuit 2)
Charge overcurrent detection voltage (VCIOV) is defined as the voltage V5 whose delay time for changing VCO from
"H" to "L" is charge overcurrent detection delay time (tCIOV) when the voltage V5 is decreased from the starting
conditions of V1 = 3.4 V, V2 = V5 = 0 V.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
15
7. Current consumption during operation
(Test circuit 3)
The current consumption during operation (IOPE) is the current that flows through the VDD pin (IDD) under the set
conditions of V1 = 3.4 V and V2 = V5 = 0 V.
8. Current consumption during power-down, current consumption during overdischarge
(Test circuit 3)
8. 1 With power-down function
The current consumption during power-down (IPDN) is IDD under the set conditions of V1 = V2 = 1.5 V, V5 = 0 V.
8. 2 Without power-down function
The current consumption during overdischarge (IOPED) is IDD under the set conditions of V1 = V2 = 1.5 V, V5 =
0 V.
9. Resistance between VDD pin and VM pin
(Test circuit 3)
RVMD is the resistance between VDD pin and VM pin under the set conditions of V1 = 1.8 V, V2 = V5 = 0 V.
10. Resistance between VM pin and VSS pin (Release condition of discharge overcurrent status
"load disconnection")
(Test circuit 3)
RVMS is the resistance between VM pin and VSS pin when the voltage V5 is decreased to 0 V from the starting
conditions of V1 = 3.4 V, V2 = V5 = 1.0 V.
11. CO pin resistance "H"
(Test circuit 4)
The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = 3.4 V,
V2 = V5 = 0 V, V3 = 3.0 V.
12. CO pin resistance "L"
(Test circuit 4)
The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = 4.7 V,
V2 = V5 = 0 V, V3 = 0.4 V.
13. DO pin resistance "H"
(Test circuit 4)
The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = 3.4 V,
V2 = V5 = 0 V, V4 = 3.0 V.
14. DO pin resistance "L"
(Test circuit 4)
The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = 1.8 V,
V2 = V5 = 0 V, V4 = 0.4 V.
15. Overcharge detection delay time
(Test circuit 5)
The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" just after the voltage V1 increases
and exceeds VCU under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
16
16. Overdischarge detection delay time
(Test circuit 5)
The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases
and falls below VDL under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.
17. Discharge overcurrent detection delay time 1
(Test circuit 5)
The discharge overcurrent detection delay time 1 (tDIOV1) is the time needed for VDO to go to "L" after the voltage V5
increases and exceeds VDIOV1 under the set conditions of V1 = V2 = 3.4 V, V5 = 0 V.
18. Discharge overcurrent detection delay time 2 (for only the products whose discharge
overcurrent detection voltage 2 is set)
(Test circuit 5)
The discharge overcurrent detection delay time 2 (tDIOV2) is the time needed for VDO to go to "L" after the voltage V5
increases and exceeds VDIOV2 under the set conditions of V1 = V2 = 3.4 V, V5 = 0 V.
19. Load short-circuiting detection delay time
(Test circuit 5)
The load short-circuiting detection delay time (tSHORT) is the time needed for VDO to go to "L" after the voltage V5
increases and exceeds VSHORT under the set conditions of V1 = V2 = 3.4 V, V5 = 0 V.
20. Charge overcurrent detection delay time
(Test circuit 5)
The charge overcurrent detection delay time (tCIOV) is the time needed for VCO to go to "L" after the voltage V5
decreases and falls below VCIOV under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.
21. 0 V battery charge starting charger voltage (0 V battery charge enabled)
(Test circuit 2)
The 0 V battery charge starting charger voltage (V0CHA) is defined as the absolute value of voltage V2 at which VCO
goes to "H" (VCO = VDD) when the voltage V2 is gradually decreased from the starting condition of V1 = V2 = V5 =
0 V.
22. 0 V battery charge inhibition battery voltage (0 V battery charge inhibited)
(Test circuit 2)
The 0 V battery charge inhibition battery voltage (V0INH) is defined as the voltage V1 at which VCO goes to "L" (VCO =
VVM) when the voltage V1 is gradually decreased, after setting V1 = 1.9 V, V2 = 2.0 V, V5 = 0 V.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
17
V V
DO
V V
CO
CO
DO
VSS
VDD
VM
S-82A1A Series
R1 = 330 Ω
V1
COM
C1
= 0.1 μF VINI
A
V V
DO
V V
CO
CO
DO
VSS
VDD
VM
S-82A1A Series
V1
V2
COM
I
DD
VINI
V5
Figure 4 Test Circuit 1 Figure 5 Test Circuit 2
CO DO
VSS
VDD
VM
S-82A1A Series
V1
V2
COM
A
I
DD
A I
VM
VINI
V5
A I
DO
A I
CO
CO
DO
VSS
VDD
VM
S-82A1A Series
V1
V2
COM
V4 V3
VINI
V5
Figure 6 Test Circuit 3 Figure 7 Test Circuit 4
CO DO
VSS
VDD
VM
S-82A1A Series
V1
V2
COM
Oscilloscope Oscilloscope
VINI
V5
Figure 8 Test Circuit 5
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
18
Operation
Remark Refer to " Battery Protection IC Connection Example".
1. Normal status
The S-82A1A Series monitors the voltage of the battery connected between VDD pin and VSS pin, the voltage
between VINI pin and VSS pin to control charging and discharging. When the battery voltage is in the range from
overdischarge detection voltage (VDL) to overcharge detection voltage (VCU), and the VINI pin voltage is in the range
from charge overcurrent detection voltage (VCIOV) to discharge overcurrent detection voltage 1 (VDIOV1), the S-82A1A
Series turns both the charge and discharge control FETs on. This condition is called the normal status, and in this
condition charging and discharging can be carried out freely.
The resistance between VDD pin and VM pin (RVMD), and the resistance between VM pin and VSS pin (RVMS) are not
connected in the normal status.
Caution After the battery is connected, discharging may not be carried out. In this case, the S-82A1A Series
returns to the normal status by connecting a charger.
2. Overcharge status
2. 1 VCL VCU (Product in which overcharge release voltage differs from overcharge detection voltage)
When the battery voltage becomes higher than VCU during charging in the normal status and the condition
continues for the overcharge detection delay time (tCU) or longer, the S-82A1A Series turns the charge control
FET off to stop charging. This condition is called the overcharge status.
The overcharge status is released in the following two cases.
(1) In the case that the VM pin voltage is lower than 0.35 V typ., the S-82A1A Series releases the overcharge
status when the battery voltage falls below overcharge release voltage (VCL).
(2) In the case that the VM pin voltage is equal to or higher than 0.35 V typ., the S-82A1A Series releases the
overcharge status when the battery voltage falls below VCU.
When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by
the Vf voltage of the parasitic diode than the VSS pin voltage, because the discharge current flows through the
parasitic diode in the charge control FET. If this VM pin voltage is equal to or higher than 0.35 V typ., the
S-82A1A Series releases the overcharge status when the battery voltage is equal to or lower than VCU.
Caution If the battery is charged to a voltage higher than VCU and the battery voltage does not fall below VCU
even when a heavy load is connected, discharge overcurrent detection and load short-circuiting
detection do not function until the battery voltage falls below VCU. Since an actual battery has an
internal impedance of tens of mΩ, the battery voltage drops immediately after a heavy load that
causes overcurrent is connected, and discharge overcurrent detection and load short-circuiting
detection function.
2. 2 VCL = VCU (Product in which overcharge release voltage is the same as overcharge detection voltage)
When the battery voltage becomes higher than VCU during charging in the normal status and the condition
continues for the overcharge detection delay time (tCU) or longer, the S-82A1A Series turns the charge control
FET off to stop charging. This condition is called the overcharge status.
In the case that the VM pin voltage is equal to or higher than 0.35 V typ. and the battery voltage falls below VCU,
the S-82A1A Series releases the overcharge status.
When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by
the Vf voltage of the parasitic diode than the VSS pin voltage, because the discharge current flows through the
parasitic diode in the charge control FET. If this VM pin voltage is equal to or higher than 0.35 V typ., the S-82A1A
Series releases the overcharge status when the battery voltage is equal to or lower than VCU.
Caution 1. If the battery is charged to a voltage higher than VCU and the battery voltage does not fall below
VCU even when a heavy load is connected, discharge overcurrent detection and load short-
circuiting detection do not function until the battery voltage falls below VCU. Since an actual
battery has an internal impedance of tens of mΩ, the battery voltage drops immediately after a
heavy load that causes overcurrent is connected, and discharge overcurrent detection and load
short-circuiting detection function.
2. When a charger is connected after overcharge detection, the overcharge status is not released
even if the battery voltage is below VCL. The overcharge status is released when the discharge
current flows and the VM pin voltage goes over 0.35 V typ. by removing the charger.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
19
3. Overdischarge status
When the battery voltage falls below VDL during discharging in the normal status and the condition continues for the
overdischarge detection delay time (tDL) or longer, the S-82A1A Series turns the discharge control FET off to stop
discharging. This condition is called the overdischarge status.
Under the overdischarge status, VDD pin and VM pin are shorted by RVMD in the S-82A1A Series. The VM pin voltage
is pulled up by RVMD.
When connecting a charger in the overdischarge status, the battery voltage reaches VDL or higher and the S-82A1A
Series releases the overdischarge status if the VM pin voltage falls below 0 V typ.
The battery voltage reaches the overdischarge release voltage (VDU) or higher and the S-82A1A Series releases the
overdischarge status if the VM pin voltage does not fall below 0 V typ.
RVMS is not connected in the overdischarge status.
3. 1 With power-down function
Under the overdischarge status, when voltage difference between VDD pin and VM pin is 0.8 V typ. or lower, the
power-down function works and the current consumption is reduced to the current consumption during power-
down (IPDN). By connecting a battery charger, the power-down function is released when the VM pin voltage is
0.7 V typ. or lower.
When a battery is not connected to a charger and the VM pin voltage 0.7 V typ., the S-82A1A Series
maintains the overdischarge status even when the battery voltage reaches VDU or higher.
When a battery is connected to a charger and 0.7 V typ. > the VM pin voltage > 0 V typ., the battery voltage
reaches VDU or higher and the S-82A1A Series releases the overdischarge status.
When a battery is connected to a charger and 0 V typ.the VM pin voltage, the battery voltage reaches VDL or
higher and the S-82A1A Series releases the overdischarge status.
3. 2 Without power-down function
The power-down function does not work even when voltage difference between VDD pin and VM pin is 0.8 V typ.
or lower.
When a battery is not connected to a charger and the VM pin voltage 0.7 V typ., the battery voltage reaches
VDU or higher and the S-82A1A Series releases the overdischarge status.
When a battery is connected to a charger and 0.7 V typ. > the VM pin voltage > 0 V typ., the battery voltage
reaches VDU or higher and the S-82A1A Series releases the overdischarge status.
When a battery is connected to a charger and 0 V typ.the VM pin voltage, the battery voltage reaches VDL or
higher and the S-82A1A Series releases the overdischarge status.
4. Discharge overcurrent status (discharge overcurrent 1, discharge overcurrent 2, load short
circuiting)
When a battery in the normal status is in the status where the VINI pin voltage is equal to or higher than VDIOV1
because the discharge current is equal to or higher than the specified value and the status lasts for the discharge
overcurrent detection delay time 1 (tDIOV1) or longer, the discharge control FET is turned off and discharging is
stopped. This status is called the discharge overcurrent status.
4. 1 Release condition of discharge overcurrent status "load disconnection" and release voltage of
discharge overcurrent status "VDIOV1"
Under the discharge overcurrent status, VM pin and VSS pin are shorted by RVMS in the S-82A1A Series.
However, the VM pin voltage is the VDD pin voltage due to the load as long as the load is connected. When the
load is disconnected, the VM pin returns to the VSS pin voltage. When the VM pin voltage returns to VDIOV1 or
lower, the S-82A1A Series releases the discharge overcurrent status.
RVMD is not connected in the discharge overcurrent status.
4. 2 Release condition of discharge overcurrent status "load disconnection" and release voltage of
discharge overcurrent status "VRIOV"
Under the discharge overcurrent status, VM pin and VSS pin are shorted by RVMS in the S-82A1A Series.
However, the VM pin voltage is the VDD pin voltage due to the load as long as the load is connected. When the
load is disconnected, the VM pin returns to the VSS pin voltage. When the VM pin voltage returns to VRIOV or
lower, the S-82A1A Series releases the discharge overcurrent status.
RVMD is not connected in the discharge overcurrent status.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
20
4. 3 Release condition of discharge overcurrent status "charger connection"
Under the discharge overcurrent status, VDD pin and VM pin are shorted by RVMD in the S-82A1A Series.
When a battery is connected to a charger and the VM pin voltage returns to VDIOV1 or lower, the S-82A1A Series
releases the discharge overcurrent status.
RVMS is not connected in the discharge overcurrent status.
5. Charge overcurrent status
When a battery in the normal status is in the status where the VINI pin voltage is equal to or lower than VCIOV
because the charge current is equal to or higher than the specified value and the status lasts for the charge
overcurrent detection delay time (tCIOV) or longer, the charge control FET is turned off and charging is stopped. This
status is called the charge overcurrent status.
The S-82A1A Series releases the charge overcurrent status when the discharge current flows and the VM pin voltage
is 0.35 V typ. or higher by removing the charger.
The charge overcurrent detection does not function in the overdischarge status.
6. 0 V battery charge enabled
This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V
battery charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB+ and EB pins by
connecting a charger, the charge control FET gate is fixed to the VDD pin voltage.
When the voltage between the gate and source of the charge control FET becomes equal to or higher than the
threshold voltage due to the charger voltage, the charge control FET is turned on to start charging. At this time, the
discharge control FET is off and the charging current flows through the internal parasitic diode in the discharging
control FET. When the battery voltage becomes equal to or higher than VDL, the S-82A1A Series returns to the
normal status.
Caution 1. Some battery providers do not recommend charging for a completely self-discharged lithium-ion
rechargeable battery. Please ask the battery provider to determine whether to enable or inhibit
the 0 V battery charge.
2. The 0 V battery charge has higher priority than the charge overcurrent detection function.
Consequently, a product in which use of the 0 V battery charge is enabled charges a battery
forcibly and the charge overcurrent cannot be detected when the battery voltage is lower than
VDL.
7. 0 V battery charge inhibited
This function inhibits recharging when a battery that is internally short-circuited (0 V battery) is connected. When the
battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charge control FET gate is
fixed to the EB pin voltage to inhibit charging. When the battery voltage is V0INH or higher, charging can be
performed.
Caution Some battery providers do not recommend charging for a completely self-discharged lithium-ion
rechargeable battery. Please ask the battery provider to determine whether to enable or inhibit the
0 V battery charge.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
21
8. Delay circuit
The detection delay times are determined by dividing a clock of approximately 4 kHz by the counter.
Remark tDIOV1, tDIOV2 and tSHORT start when VDIOV1 is detected. When VDIOV2 or VSHORT is detected over tDIOV2 or tSHORT
after the detection of VDIOV1, the S-82A1A Series turns the discharge control FET off within tDIOV2 or tSHORT
of each detection.
DO pin voltage
V
INI pin voltage
VDD
VDD
Time
VDIOV1
VSS
VSS
VSHORT
tSHORT
Time
tD 0 tD tSHORT
Figure 9
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
22
Timing Charts
1. Overcharge detection, overdischarge detection
V
CU
V
DU
(V
DL
+ V
HD
)
V
DL
V
CL
(V
CU
V
HC
)
Battery voltage
V
SS
CO pin voltage
V
DD
DO pin voltage
V
SS
Charger connection
Load connection
Status
*1
(1) (2) (1) (3) (1)
0.35 V typ.
V
SS
VM pin voltage
V
DD
V
EB
V
DD
V
EB
Overdischarge detection delay time
(t
DL
)
Overcharge detection delay time (t
CU
)
V
DIOV1
V
SS
VINI pin voltage
V
DD
V
CIOV
*1. (1): Normal status
(2): Overcharge status
(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 10
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
23
2. Discharge overcurrent detection
2. 1 Release condition of discharge overcurrent status "load disconnection"
V
RIOV
V
DD
V
SS
V
SHORT
(1) (2) (1) (2)
Load short-circuiting
detection delay time (t
SHORT
)
(1)
V
DI
V
DIOV1
Discharge overcurrent
detection delay time 1 (t
DIOV1
)
V
CU
V
DU
(V
DL
+ V
HD
)
V
DL
V
CL
(V
CU
V
HC
)
Battery voltage
V
SS
CO pin voltage
V
DD
DO pin voltage
V
SS
Load connection
Status
*1
VM pin voltage
V
DD
V
SHORT
V
DD
V
SS
V
DIOV2
V
DIOV1
VINI pin voltage
Discharge overcurrent
detection delay time 2 (t
DIOV2
)
(2) (1)
*1. (1): Normal status
(2): Discharge overcurrent status
Remark The charger is assumed to charge with a constant current.
Figure 11
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
24
2. 2 Release condition of discharge overcurrent status "charger connection"
V
DD
V
EB
(1) (2) (1) (2)
Load short-circuiting
detection dela
y
time
(t
SHORT
)
(1)
Discharge overcurrent
detection delay time 1 (t
DIOV1
)
V
CU
V
DU
(V
DL
+ V
HD
)
V
DL
V
CL
(V
CU
V
HC
)
Battery voltage
V
SS
CO pin voltage
V
DD
DO pin voltage
V
SS
Load connection
Status
*1
VM pin voltage
V
DD
V
SHORT
V
DD
V
SS
V
DIOV2
V
DIOV1
VINI
p
in volta
g
e
Discharge overcurrent
detection delay time 2 (t
DIOV2
)
(2) (1)
V
SS
V
CIOV
V
DIOV1
Charger connection
*1. (1): Normal status
(2): Discharge overcurrent status
Remark The charger is assumed to charge with a constant current.
Figure 12
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
25
3. Charge overcurrent detection
(2)
VDD
VSS
VDD
VSS
VDD
VSS
VCIOV
(3)
(1)
VEB
VEB
VCU
VDU (VDL + VHD)
VDL
VCL (VCUVHC)
(1) (1) (2)
Battery voltage
DO pin voltage
CO pin voltage
VM pin voltage
Charger connection
Load connection
Status*1
Charge overcurrent
detection delay time (tCIOV)
O
verdischarge detection
delay time (tDL) Charge overcurrent
detection dela
y
time
t
CIOV
)
VDD
VSS
VCIOV
VINI pin voltage
VDIOV1
0.35 V typ.
*1. (1): Normal status
(2): Charge overcurrent status
(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 13
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
26
Battery Protection IC Connection Example
DO CO VM
FET1 FET2 R2
VSS
VINI
R3
R1
C1
VDD
EB+
S-82A1A Series
Battery
EB
Figure 14
Table 13 Constants for External Components
Symbol Part Purpose Min. Typ. Max. Remark
FET1 N-channel
MOS FET Discharge control Threshold voltage Overdischarge
detection voltage*1
FET2 N-channel
MOS FET Charge control Threshold voltage Overdischarge
detection voltage*1
R1 Resistor ESD protection,
For power fluctuation 270 Ω 330 Ω 1 kΩ Caution should be exercised when
setting VDIOV1 30 mV, VCIOV 30 mV.*2
C1 Capacitor For power fluctuation 0.068 μF 0.1 μF 1.0 μF Caution should be exercised when
setting VDIOV1 30 mV, VCIOV 30 mV.*2
R2 Resistor
ESD protection,
Protection for reverse
connection of a charge
r
300 Ω 470 Ω 1.5 kΩ
R3 Resisto
r
Overcurrent detection 5 mΩ
*1. If an FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be
stopped before overdischarge is detected.
*2. When setting VDIOV1 30 mV, VCIOV 30 mV for power fluctuation protection, the condition of R1 × C1 100 μF Ω
should be met.
Caution 1. The constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the connection
example. In addition, the connection example and the constants do not guarantee proper operation.
Perform thorough evaluation using the actual application to set the constants.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
27
Precautions
The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
28
Characteristics (Typical Data)
1. Current consumption
1. 1 IOPE vs. Ta 1. 2 IPDN vs. Ta
5.0
I
OPE
[μA]
40 8
5
7550250
25
Ta [ °C]
0.0
4.0
3.0
2.0
1.0
0.100
I
PDN
[μA]
40 8
5
7550250
25
Ta [ °C]
0.000
0.075
0.050
0.025
1. 3 IOPED vs. Ta
1.00
I
OPED
[μA]
40 8
5
7550250
25
Ta [ °C]
0.00
0.75
0.50
0.25
1. 4 IOPE vs.
V
DD
1. 4. 1 With powe
r
-down function 1. 4. 2 Without powe
r
-down function
5.0
I
OPE
[μA]
V
DD
[V]
0.0
4.0
3.0
2.0
1.0
5.0
I
OPE
[μA]
V
DD
[V]
0.0
4.0
3.0
2.0
1.0
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
29
2. Detection voltage
2. 1 VCU vs. Ta 2. 2 VCL vs. Ta
4.52
V
CU
[V]
40 8
5
7550250
25
Ta [ °C]
4.44
4.50
4.48
4.46
4.36
V
CL
[V]
40 8
5
7550250
25
Ta [ °C]
4.20
4.32
4.28
4.24
2. 3 VDL vs. Ta 2. 4 VDU vs. Ta
2.38
V
DL
[V]
Ta [°C]
2.22
2.34
2.30
2.26
2.64
V
DU
[V]
Ta [°C]
2.36
2.57
2.50
2.43
2. 5
V
DIOV1 vs.
V
DD 2. 6
V
DIOV1 vs. Ta
0.029
V
DIOV1
[V]
0.021
0.027
0.025
0.023
2.4 4.4
V
DD
[V]
4.03.63.22.8
Ta [°C]
0.029
V
DIOV1
[V]
0.021
0.027
0.025
0.023
2. 7
V
DIOV2 vs.
V
DD 2. 8
V
DIOV2 vs. Ta
0.038
V
DIOV2
[V]
0.030
0.036
0.034
0.032
2.4 4.4
V
DD
[V]
4.03.63.22.8
Ta [°C]
0.038
V
DIOV2
[V]
0.030
0.036
0.034
0.032
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
30
2. 9 VSHORT vs.
V
DD 2. 10 VSHORT vs. Ta
0.52
VSHORT [V]
0.48
2.4 4.4
VDD [V]
4.03.63.22.8
0.51
0.50
0.49
40 8
5
7550250
25
Ta [ °C]
0.52
V
SHORT
[V]
0.48
0.51
0.50
0.49
2. 11
V
CIOV vs.
V
DD 2. 12
V
CIOV vs. Ta
0.016
V
CIOV
[V]
0.024
2.4 4.4
V
DD
[V]
4.03.63.22.8
0.018
0.020
0.022
40 8
5
7550250
25
Ta [ °C]
0.016
VCIOV [V]
0.024
0.018
0.020
0.022
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
31
3. Delay time
3. 1 tCU vs. Ta 3. 2 tDL vs. Ta
2.5
t
CU
[s]
Ta [°C]
0.0
2.0
1.5
1.0
0.5
160
t
DL
[ms]
Ta [°C]
0
120
80
40
3. 3 tDIOV1 vs.
V
DD 3. 4 tDIOV1 vs. Ta
1250
t
DIOV1
[ms]
0
500
750
1000
250
2.4 4.4
V
DD
[V]
4.03.63.22.8
Ta [°C]
1250
t
DIOV1
[ms]
0
1000
750
500
250
3. 5 tDIOV2 vs.
V
DD 3. 6 tDIOV2 vs. Ta
80
tDIOV2 [ms]
0
2.4 4.4
VDD [V]
4.03.63.22.8
60
40
20
40 8
5
7550250
25
Ta [ °C]
80
t
DIOV2
[ms]
0
60
40
20
3. 7 tSHORT vs.
V
DD 3. 8 tSHORT vs. Ta
V
DD
[V]
750
0
500
250
t
SHORT
[μs]
750
Ta [
°
C]
0
500
250
t
SHORT
[
μ
s]
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
32
3. 9 tCIOV vs.
V
DD 3. 10 tCIOV vs. Ta
20
tCIOV [ms]
0
2.4 4.4
VDD [V]
4.03.63.22.8
15
10
5
40 8
5
7550250
25
Ta [ °C]
20
t
CIOV
[ms]
0
15
10
5
4. Output resistance
4. 1 RCOH vs. VCO 4. 2 RCOL vs. VCO
30
R
COH
[kΩ]
0
05
V
CO
[V]
4321
25
20
15
10
5
R
COL
[kΩ]
05
V
CO
[V]
4321
30
0
25
20
15
10
5
4. 3 RDOH vs. VDO 4. 4 RDOL vs. VDO
30
R
DOH
[kΩ]
0
05
V
DO
[V]
4321
25
20
15
10
5
30
R
DOL
[kΩ]
0
05
V
DO
[V]
4321
25
20
15
10
5
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
33
Marking Specifications
1. SNT-6A
Top view
132
645
(1) (2) (3)
(4) (5) (6)
(1) to (3): Product code (Refer to Product name vs. Product code)
(4) to (6): Lot number
Product name vs. Product code
Product Name Product Code
(1) (2) (3)
S-82A1AAB-I6T1U 6 C B
S-82A1AAC-I6T1U 6 C C
S-82A1AAD-I6T1U 6 C D
S-82A1AAE-I6T1U 6 C E
S-82A1AAF-I6T1U 6 C F
S-82A1AAG-I6T1U 6 C G
S-82A1AAH-I6T1U 6 C H
S-82A1AAI-I6T1U 6 C I
S-82A1AAJ-I6T1U 6 C J
S-82A1AAK-I6T1U 6 C K
S-82A1AAL-I6T1U 6 C L
S-82A1AAM-I6T1U 6 C M
S-82A1AAN-I6T1U 6 C N
S-82A1AAO-I6T1U 6 C O
S-82A1AAP-I6T1U 6 C P
S-82A1AAQ-I6T1U 6 C Q
S-82A1AAR-I6T1U 6 C R
S-82A1AAS-I6T1U 6 C S
S-82A1AAT-I6T1U 6 C T
S-82A1AAU-I6T1U 6 C U
S-82A1AAV-I6T1U 6 C V
S-82A1AAW-I6T1U 6 C W
S-82A1AA
X
-I6T1U 6 C X
S-82A1AAY-I6T1U 6 C Y
S-82A1AAZ-I6T1U 6 C Z
S-82A1ABM-I6T1U 6 M M
S-82A1ABN-I6T1U 6 M N
S-82A1ABR-I6T1U 6 M R
S-82A1ABT-I6T1U 6 M T
S-82A1ABW-I6T1U 6 M W
S-82A1AB
X
-I6T1U 6 M X
S-82A1ABY-I6T1U 6 M Y
S-82A1ACA-I6T1U 6 Y A
S-82A1ACH-I6T1U 6 Y H
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82A1A Series Rev.2.4_00
34
2. DFN-6(1414)A
Top view
132
645
(1) (2) (3) (4)
(5) (6) (7) (8)
(1) to (3): Product code (Refer to Product name vs. Product code)
(4): Product code (Fixed)
(5) to (8): Lot numbe
r
Product name vs. Product code
Product Name Product Code
(1) (2) (3)
S-82A1AAC-A6T5S 6 C C
S-82A1AAD-A6T5S 6 C D
S-82A1AAF-A6T5S 6 C F
S-82A1AAG-A6T5S 6 C G
S-82A1AAM-A6T5S 6 C M
S-82A1ABA-A6T5S 6 M A
S-82A1ABB-A6T5S 6 M B
S-82A1ABC-A6T5S 6 M C
S-82A1ABD-A6T5S 6 M D
S-82A1ABE-A6T5S 6 M E
S-82A1ABF-A6T5S 6 M F
S-82A1ABG-A6T5S 6 M G
S-82A1ABH-A6T5S 6 M H
S-82A1ABI-A6T5S 6 M I
S-82A1ABK-A6T5S 6 M K
S-82A1ABL-A6T5S 6 M L
S-82A1ABM-A6T5S 6 M M
S-82A1ABN-A6T5S 6 M N
S-82A1ABO-A6T5S 6 M O
S-82A1ABP-A6T5S 6 M P
S-82A1ABQ-A6T5S 6 M Q
S-82A1ABV-A6T5S 6 M V
S-82A1ACE-A6T5S 6 Y E
S-82A1ACF-A6T5S 6 Y F
S-82A1ACG-A6T5S 6 Y G
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.2.4_00 S-82A1A Series
35
Power Dissipation
0 25 50 75 100 125 150 175
0.0
0.2
0.4
0.6
0.8
1.0
Ambient temperature (Ta) [°C]
Power dissipation (P
D
) [W]
T
j
= +125°C max.
SNT-6
A
B
A
0 25 50 75 100 125 150 175
0.0
0.2
0.4
0.6
0.8
1.0
Ambient temperature (Ta) [°C]
Power dissipation (P
D
) [W]
T
j
= +125°C max.
DFN-6(1414)A
B
A
Board Power Dissipation (PD) Board Power Dissipation (PD)
A 0.45 W A 0.32 W
B 0.57 W B 0.36 W
C C
D D
E E
(1)
1
2
3
4
(2)
1
2
3
4
Board B
Item Specification
Thermal via -
Material FR-4
Number of copper foil layer 4
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
Size [mm] 114.3 x 76.2 x t1.6
2
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
-
-
74.2 x 74.2 x t0.070
Thermal via -
Material FR-4
Board A
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Number of copper foil layer
ICMountArea
SNT-6A Test Board
No. SNT6A-A-Board-SD-1.0
ABLIC Inc.
(1)
1
2
3
4
(2)
1
2
3
4
Board A
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Material FR-4
Number of copper foil layer 2
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
-
-
74.2 x 74.2 x t0.070
74.2 x 74.2 x t0.070
Thermal via -
Board B
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Thermal via -
Material FR-4
Number of copper foil layer 4
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
ICMountArea
DFN-6(1414)A Test Board
No. DFN6-A-Board-SD-1.0
ABLIC Inc.
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
SNT-6A-A-PKG Dimensions
PG006-A-P-SD-2.1
No. PG006-A-P-SD-2.1
0.2±0.05
0.48±0.02
0.08 +0.05
-0.02
0.5
1.57±0.03
123
45
6
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5
1.85±0.05 0.65±0.05
0.25±0.05
mm
PG006-A-C-SD-2.0
SNT-6A-A-Carrier Tape
No. PG006-A-C-SD-2.0
+0.1
-0
1
2
4
3
56
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
QTY.
No. PG006-A-R-SD-1.0
PG006-A-R-SD-1.0
Enlarged drawing in the central part
SNT-6A-A-Reel
5,000
mm
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
SNT-6A-A
-Land Recommendation
PG006-A-L-SD-4.1
No. PG006-A-L-SD-4.1
0.3
0.2
0.52
1.36
0.52
1
2
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1. (0.25 mm min. / 0.30 mm typ.)
2. (1.30 mm ~ 1.40 mm)
0.03 mm
SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package ( 1.30 mm ~ 1.40 mm ).
1.
2. (1.30 mm ~ 1.40 mm)
(0.25 mm min. / 0.30 mm typ.)
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
PV006-A-P-SD-2.0
No. PV006-A-P-SD-2.0
The heat sink of back side has different electric
potential depending on the product.
Confirm specifications of each product.
Do not use it as the function of electrode.
DFN-6-A-PKG Dimensions
0.2±0.05
(0.8)
0.5
1.4±0.05
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
PV006-A-C-SD-1.0
Feed direction
4.0±0.1
ø1.5
1.6±0.1 0.65±0.1
0.20±0.05
1
3
46
No. PV006-A-C-SD-1.0
2.0±0.05
+0.1
-0
4.0±0.1
DFN-6-A-Carrier Tape
ø0.5 +0.1
-0
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
QTY. 5,000
No. PV006-A-R-SD-1.0
PV006-A-R-SD-1.0
mm
ø13±0.2
Enlarged drawing in the central part
DFN-6-A-Reel
11.4±1.0
9.0
+1.0
- 0.0
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
DFN-6-A
PV006-A-L-SD-1.0
No. PV006-A-L-SD-1.0
Caution It is recommended to solder the heat sink to a board
in order to ensure the heat radiation.
PKG
0.2
0.8
0.5
-Land Recommendation
Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
www.ablic.com