● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV860
Features
Adjustable output regulation for dimming
220VPP output voltage for higher brightness
Single cell lithium ion compatible
150nA shutdown current
Separately adjustable lamp and converter frequencies
3x3mm 12-Lead QFN package
Split supply capability
Applications
Mobile cellular phone keypads
PDAs
Handheld wireless communication products
Global Positioning Systems (GPS)
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The HV860 has two internal oscillators, a switching
MOSFET, and a high voltage EL lamp driver H-bridge. The
frequency for the switching MOSFET is set by an external
resistor connected between the RSW-Osc pin and the
supply pin VDD. The EL lamp driver frequency is set by
an external resistor connected between REL-Osc pin and
VDD pin. An external inductor is connected between the LX
and VDD pins or VIN for split supply applications. A 3.0nF
capacitor is connected between CS and ground. The EL
lamp is connected between VA and VB.
The switching MOSFET charges the external inductor and
discharges it into the capacitor at CS. The voltage at CS will
start to increase. Once the voltage at CS reaches a nominal
value of 110V, the switching MOSFET is turned OFF to
conserve power. The outputs VA and VB are configured as
an H bridge and are switching in opposite states to achieve
±110V across the EL lamp.
EL lamp dimming can be accomplished by changing the
input voltage to the VREG pin. The VREG pin allows an
external voltage source to control the VCS amplitude. The
VCS voltage is approximately 87 times the voltage seen on
VREG.
Typical Application Circuit
Low Noise, Dimmable
EL Lamp Driver
General Description
The Supertex HV860 is a high voltage driver designed for
driving Electroluminescent, (EL), lamps of up to 5 square
inches. The input supply voltage range is from 2.5 to 4.5V.
The device uses a single inductor and a minimum number of
passive components. Using the internal reference voltage,
the regulated output voltage is at a nominal voltage of 110V.
The EL lamp will therefore see ±110V. An enable pin, (EN),
is available to turn the device on and off via a logic signal.
VIN
1.5V = On
0V = Off
VDD
EL
Lamp
CS
CDD
RSW
REL
CIN LX
D
RREG
9
7
5
3
2
10
12
1
11
4
8
HV860
VDD
VB
VA
CS
LXVREF
VREG
REL-Osc
RSW-Osc
EN GND
2
HV860
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Ordering Information
Device
12-Lead QFN
3.00x3.00mm body
0.80mm height (max)
0.50mm pitch
HV860 HV860K7-G
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter Value
VDD, Supply voltage -0.5V to 6.0V
Operating temperature -40°C to +85°C
Storage temperature -65°C to +150°C
Power dissipation: 1.6W
VCS, Output voltage -0.5V to +120V
VREG External input voltage 1.33V
Sym Parameter Min Typ Max Units Conditions
Electrical Characteristics
(Over recommended operating conditions unless otherwise specified TA = 25°C)
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
Pin Configuration
Package θja
12-Lead QFN (K7) 60 °C/W
Thermal Resistance
RDS(ON) On-resistance of switching transistor - - 6.0 Ω I = 100mA
VCS Maximum output regulation voltage 90 - 120 V VDD = 2.5V to 4.5V
1
2
3
4 5 6
7
8
9
10
11
12
GND LX
CS
VB
VA
VDD
EN
VREG
VREF
REL-Osc
NC
RSW-Osc
Note:
Pads are at the bottom of the package. Center heat slug is at ground
potential.
Product Marking
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
H860
YWLL
12-Lead QFN (K7)
Recommended Operating Conditions
Sym Parameter Min Typ Max Units Conditions
VDD Supply voltage 2.5 - 4.5 V ---
fSW Switching frequency 40 - 200 kHz ---
fEL EL output frequency 150 - 500 Hz ---
CLOAD EL lamp capacitance load 0 - 20 nF ---
TAOperating temperature -40 - +85 °C ---
12-Lead QFN (K7)
(top view)
Package may or may not include the following marks: Si or
3
HV860
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Sym Parameter Min Typ Max Units Conditions
Electrical Characteristics (cont.)
VCS Output regulation voltage
- 95 -
V
VDD = 2.5 to 4.5V, VREG = 1.092V
- 75 - VDD = 2.5 to 4.5V, VREG = 0.862V
- 55 - VDD = 2.5 to 4.5V, VREG = 0.632V
VREG External input voltage range 0 - 1.33 V VDD = 2.5 to 4.5V
VREFH VREF output high voltage 1.18 1.26 1.33 V VDD = 2.5 to 4.5V
IDDQ Quiescent VDD supply current - - 150 nA EN = Low
IDD Input current going into the VDD pin - - 250 µA VDD = 2.5 to 4.5V, REL = 2.0MΩ,
RSW = 1.0MΩ
IIN
Input current including inductor
current - 16 30 mA VIN = 3.0V. See Figure 1.
IINQ Quiescent VIN supply current - - 200 nA VIN = 4.2V. EN = Low.
See Figure 1.
fEL EL lamp frequency 160 200 240 Hz REL = 2.0MΩ
fSW Switching transistor frequency 76 90 104 kHz RSW = 1.0MΩ
D Switching transistor duty cycle - - 88 % ---
VIH Enable input logic high voltage 1.5 - VDD V VDD = 2.5 to 4.5V
VIL Enable input logic low voltage 0 - 0.2 V VDD = 2.5 to 4.5V
IIH Enable input logic high current - - 100 µA VIH = VDD = 2.5 to 4.5V
IIL Enable input logic low current - - -1.0 µA VIL = 0V, VDD = 2.5 to 4.5V
CIN Enable input capacitance - - 15 pF ---
Block Diagram
VA
VB
1.26V
VREF
Device Enable
EN
RSW-Osc
VREG
VREF
REL-Osc
GND
60pF
VDD LX CS
VCS
-
+
C
VSENSE
PWM Switch
Oscillator
0 to 88%
Output
Drivers
2x EL
Freq.
EL
Frequency
100kΩ
4
HV860
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
VIN
1.5V = ON
0V = Off
VDD
3.0in2
EL Lamp
3.3nF
200V
0.1μF 1.0MΩ
4.7μF
BAS21
+
-
2.0MΩ
3.3MΩ
220μH
(Cooper Inductor SD3814-221)
9
7
5
3
2
10
12
1
11
4
8
HV860
VDD
VB
VA
CS
LXVREF
VREG
REL-Osc
RSW-Osc
EN GND
Figure 1: Typical Application / Test Circuit
VDD Lamp Size VIN IIN VCS fEL Brightness
3.0V 3.0in2
3.3V 19.42mA
110V 194Hz
20.32cd/m2
3.7V 17.95mA 21.40cd/m2
4.2V 16.02mA 21.81cd/m2
Typical Performance
Typical Waveform on VA, VB, and Differential Waveform VA - VB
5
HV860
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Figure 2: Split Supply and Enable/Disable Configuration
VIN
Regulated Voltage = VDD
EL
Lamp
CS
RSW
REL
CIN LXD
RREG
+
-
9
7
5
3
2
10
12
1
11
4
8
On = 1.5V
Off = 0V
CDD
HV860
VDD
VB
VA
CS
LXVREF
VREG
REL-Osc
RSW-Osc
EN GND
Figure 3: Typical Application Circuit for Audible Noise Reduction
VDD
VB
VA
CS
LX
VREF
VREG
REL-Osc
RSW-Osc
EN GND
HV860
VIN
1.5V = On
0V = Off
VDD
EL
Lamp
CS
CDD
RSW
REL
CIN LXD
RREG
9
7
5
3
2
10
12
1
11
4
8
The EL lamp, when lit, emits an audible noise. This is due
to EL lamp construction. The audible noise generated by the
EL lamp can be a major problem for applications where the
EL lamp is held close to the ear, such as cellular phones.
The HV860 employs a proprietary circuit to help minimize
the EL lamp’s audible noise by using a single resistor, RREG,
as shown in Figure 3.
Audible Noise Reduction
The audible noise from the EL lamp can be minimized with
the proper selection of RREG. RREG is connected between the
VREF and VREG pins. VREG has an internal 60pF capacitor
to ground. EL lamp noise can be minimized without much
loss in brightness by setting the RC time constant to be
approximately 1/12 of the EL frequency’s period.
How to Minimize EL Lamp Audible Noise
Split Supply Configuration
The HV860 can also be used for handheld devices operating
from a battery where a regulated voltage is available. This
is shown in Figure 2. The regulated voltage can be used to
run the internal logic of the HV860. The amount of current
necessary to run the internal logic is 250µA max. Therefore,
the regulated voltage could easily provide the current without
being loaded down.
Enable/Disable Configuration
The HV860 can be easily enabled and disabled via a logic
control signal on the EN pin as shown in Figure 2. The
control signal can be from a microprocessor. When the
microprocessor signal is high the device is enabled, and
when the signal is low, it is disabled.
6
HV860
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Figure 4: PWM Dimming Circuit
HV860
VIN
VDD
EL Lamp
3.3nF
200V
0.1μF 1.0MΩ
4.7μF
BAS21
2.0MΩ
3.3MΩ
220μH
(Cooper Inductor SD3814-221)
9
7
5
3
2
10
12
1
11
4
8
10kΩ
Open Drain
n-channel
PWM Signal
+
-
On = 1.5V
Off = 0V
+
-
VDD
VB
VA
CS
LXVREF
VREG
REL-Osc
RSW-Osc
EN GND
This section describes the method of dimming the EL lamp.
Reducing the voltage amplitude at the VREG pin will reduce
the voltage on the CS pin, which will effectively reduce the
peak to peak voltage the EL lamp sees. Figure 4 shows a
circuit to dim the lamp by changing the duty cycle of a PWM
signal. A 10kΩ resistor is connected in series with a 3.3MΩ
resistor. An N-channel open drain PWM signal is used to pull
the 10kΩ resistor to ground. The effective voltage on the
VREG pin will be proportional to the duty cycle of the PWM
signal. The PWM operating frequency can be anywhere
between 20kHz to 100kHz.
EL Lamp Dimming using PWM
7
HV860
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Pin Configuration and External Component Description
Pin # Name Description
1 REL-Osc
External resistor from REL-Osc to VDD sets the EL frequency. The EL frequency is inversely
proportional to the external REL resistor value. Reducing the resistor value by a factor of two will
result in increasing the EL frequency by two.
2 VREG
Input voltage to set VCS regulation voltage. This pin allows an external voltage source to control
the VCS amplitude. EL lamp dimming can be accomplished by varying the input voltage at VREG.
The VCS voltage is approximately 87 times the voltage seen on VREG.
External resistor RREG, connected between VREG and VREF pins controls the VCS charging rate.
The charging rate is inversely proportional to the RREG resistor value.
3 VREF Switched internal reference voltage.
4 GND Device ground.
5 LX
Drain of internal switching MOSFET. Connection for an external inductor.
The inductor LX is used to boost the low input voltage by inductive flyback. When the internal
switch is on, the inductor is being charged. When the internal switch is off, the charge stored in
the inductor will be transferred to the high voltage capacitor CS. The energy stored in the capacitor
is transferred to the internal H-bridge, and therefore to the EL lamp. In general, smaller value
inductors, which can handle more current, are more suitable to drive larger size lamps. As the
inductor value decreases, the switching frequency of the inductor (controlled by RSW) should be
increased to avoid saturation.
A 220µH Cooper (SD3814-221) inductor with 5.5Ω series DC resistance is typically recommended.
For inductors with the same inductance value, but with lower series DC resistance, lower RSW
resistor value is needed to prevent high current draw and inductor saturation.
6 NC No internal connections to the device.
7 CS High voltage regulated output. Connection for an external high voltage capacitor to ground
8 VB VB side of the EL lamp driver H-bridge. Connection for one of the EL lamp terminals.
9 VA VA side of the EL lamp driver H-bridge. Connection for one of the EL lamp terminals.
10 VDD Low voltage input supply pin.
11 EN Logic input pin. Logic high will enable the device. This pin has an 100kΩ internal pull-down resistor
connected to GND.
12 RSW-Osc
External resistor from RSW-Osc to VDD sets the switch converter frequency. The switch converter
frequency is inversely proportional to the external RSW resistor value. Reducing the resistor value
by a factor of two will result in increasing the switch converter frequency by two.
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com.
©2009 All rights reserved. Unauthorized use or reproduction is prohibited.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
8
HV860
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-HV860
C081209
12-Lead QFN Package Outline (K7)
3.00x3.00mm body, 0.80mm height (max), 0.50mm pitch
Symbol A A1 A3 b D D2 E E2 e L L1 θ
Dimension
(mm)
MIN 0.70 0.00
0.20
REF
0.18 2.85* 1.25 2.85* 1.25
0.50
BSC
0.30 0.00 0O
NOM 0.75 0.02 0.25 3.00 - 3.00 - 0.40 - -
MAX 0.80 0.05 0.30 3.15* 1.65 3.15* 1.65 0.50 0.15 14O
JEDEC Registration MO-220, Variation WEED-5, Issue K, June 2006.
* This dimension is not specified in the JEDEC drawing.
Drawings not to scale.
Supertex Doc. #: DSPD-12QFNK73X3P050, Version B041309.
Notes:
A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.
Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present.
The inner tip of the lead may be either rounded or square.
1.
2.
3.
Seating
Plane
Top View
Side View
Bottom View
A
A1
D
E
D2
e
b
E2
A3
L
L1
View B
View B
1
12
Note 3
Note 2
Note 1
(Index Area
D/2 x E/2)
Note 1
(Index Area
D/2 x E/2)
1
12
θ
