OKI Semiconductor MSC23132C/CL-xxBS8/DS8 1,048,576-Word x 32-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKIMSC23132C /CL-xxB58/DS8 isa fully decoded 1,048,576-word x32-bit CMOS Dynamic Random Access Memory Module composed of eight 4-Mb DRAMs (1M x 4) in SOJ packages mounted with eight decoupling capacitors on a 72-pin glass epoxy single-inline package. This module is generally used for non-parity memory expansion applications such as fax machines, printers and personal computers. The low-power version (CL) offers reduced power consumption for mobile computing applications like laptops and palmtops. FEATURES * 1-Meg x 32-bit organization 72-Pin Socket Insertable Module MS$C23132C/CL-xxBS8_: Gold tab MSC23132C/CL-xxDS8 : Solder tab * Single 5 V supply +10% tolerance * Access times : 60, 70, 80 ns *Input : TTL compatible * Output : TTL compatible, 3-state * Refresh : 1024 cycles/16 ms (128 ms : L-version) * CAS before RAS refresh, CAS before RAS hidden refresh, RAS-only refresh capability * Multi-bit test mode capability * Fast Page Mode capability PRODUCT FAMILY Family Access Time (Max.) Cycle Time Power Dissipation trac | taa | teac (Min.) [Operating (Max.}| Standby (Max.) MSC23132C/CL-60B58/DS3 6O0ns | 30ns | 15ns 110 ns 4400 mW 44 my MSC23132C/CL-70BS8/DS8 7Ons | 35ns | 20ns 130 ns . 3960 mW 8.8 mW (L-version) MSC23132C/CL-80BS8/0S3 BOns | 40ns | 20ns 150 ns 3520 mW 87MSC23132C/Cl-xxBS8/DS8 OKI Semiconductor PIN CONFIGURATION MSC23132C/CL-xxBS8/DS& 4 107.95 20.2 5.28 Max. 3.38 20.2 101.19 Typ. Oo oOo 4 oD O25 oOo a om 03.18 a TP.) typ 4 10.181 a4 | [4 72} 3.7 Min, 2.03 Typ. Ri57 j | 95.25 1 The common size difference of the board width 12.5 mm of its height is Specified as +0.2. The value above 12.5 mm is specified as +0.5. Pin No. [Pin Name] | Pin No. |Pin Name! | Pin No. |Pin Name! | Pin No. |Pin Namal! Pin No. |Pin Name 1 Vss 16 Aa 41 A8 46 NG 61 DQ13 2 DQ0 7 AS 32 Ag 47 WE 62 DQ30 3 DQ16 18 AGB 33 NC 48 NC 63 DQi4 4 pa1 19 NC 34 RAS2 49 pa8 64 DQ31 5 DQ17 20 Da4 35 NC 50 DQ24 65 DOS 6 poe 21 Da20 36 NG 1 Das 66 NC 7 DQ18 22 a5 37 NC 52 DQ25 67 PD1 8 DQ3 23 DQ21 38 NG 53 Dod 68 PO2 9 Da19 24 DQG 39 Vss 54 D026 69 PD3 10 Vec 25 O22 40 CASO 55 Dda11 70 PD4 11 NC 26 paz 41 CASZ 56 DQ27 71 NC 12 AQ ar DQ23 42 CASI 57 0Q12 72 Ves 13 Al 28 AT 43 CAST 58 0028 14 A2 29 NC 44 RASO 59 Vee 15 Ag 30 Voc 45 NC 60 Da29 Presence Detect Pins MSC23132C/CL | MSG23132C/CL | MSC23132C/CL Pin No. Pin Name -60B$8/DS8 -70BS8/DS8 -80BS8/DS8 67 PDI Vss Vss Vss 68 PD2 Vss Vss Vs 63 PDS NC Ves NC 70 PD4 NC NC Vss 88OB Semiconductor MSC23132C/CL-xxBS3/DS8 BLOCK DIAGRAM AQ - Ag WE #| Ag-ag 00 |- DAO @ Ao-ag DO F DOIG pa | poz po | pats CASO CAS ba Los CAS2 CAS no pars WE WE CE OE Veo Vsg ib Vec Vg5 ib @4 Ag-ag DG - Daa 6] ag-ag DA + DA20 RAS DG - DQ5 FAS Dad + 0021 pda |-- p06 pa | paz TAS CAS pa +- p07 ba | pa23 WE WE of Veo Vg IL Veco Vg kb tie BL es t [0 2B Pb ORT ne pa + pat10 ne pa - pas 1 we | De fan CASS pa + pa27 OE We og Voc Vg Wb Veco Vgg {eee She {ee eho i po + pa14 n ba b- 0a30 WE pa | pats we D2 bast | CE | GE Veco Vg5 Kb Veo Vgg a Veo a Cy ca Vs3 # + 89MSC23132C/CL-xxBS8/DS8 OKI Semiconductor ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Symbol Rating Unit Voltage on Any Pin Relative to Vss Vin. Vout -1.0 to 7.0 Vv Voltage Vcc Supply Relative to Vss Vec ~1.0 to 7.0 V Short Circuit Output Current los 50 mA Power Dissipation Po 8 Ww Operating Temperature Topr Oto 70 C Storage Temperature Tstg 40 to 125 C Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended Operating Conditions Ta = 0C to 70C) Parameter Symbol Min. Typ. Max. Unit Vee 45 5.0 5.5 Vv Power Supply Voltage Vs 0 0 0 v Input High Voltage Vin 24 _ 6.5 V Input Low Voltage Vin -1.0 _ 0.8 V Capacitance (Ta = 25C, t= 1 MHz) Parameter Symbot Typ. Max. Unit Input Capacitance (AQ - AQ) Cina _ 57 pF Input Capacitance (WE) Cine 65 pF Input Capacitance (RASO, RAS?) Cina 35 pF Input Capacitance (CASO - CAS3) Cina ~ 20 pF \/0 Capacitance (DQ0 - DQ31) Coa _ 13 pF Note: Capacitance measured with Boonton Meter.ONE Semiconductor DC Characteristics MSC23132C/CL-xxBS8/DS8 (Vcc = 5 V 210%, Ta = 0C to 70C) IMSC23132C/CL MSC23132C/CL/MSC23132C/CL Parameter Symbol Condition -60BS8/0S8 | -70BS8/DS8 | -80BS8/DS8 | Unit|Note Min. | Max. | Min. | Max. | Min. | Max. OVEViS6.5V; Input Leakage Current lu | All other pins not } -80 80 80 80 80 80 pA under test = OV Output Leakage Current | tq | out disable -10 | 10 | -10/ 10 | -10/ 10 | pa OVS Vo <55V Output High Voitage Vou | lon =-5.0 mA 24 Vee 24 Veco 24 Vec V Output Low Voltage Vor | lop = 4.2 mA 0 0.4 0 04 0 0.4 V Average Power . Supply Current tery [PAS GAS cvetig. |_| og | | 720 | | e40 | mal t.2 . tac = Min. (Operating) Power Supply RAS, GAS = Vin _ 16 _ 16 _ 16 | mA: 1 Current (Standby) loca | RAS, CAS 8 8 8 mA| 1 2Vec-0.2V _ 1.6 _ 16 _ 1.6 | mA/ 1,5 Average Power RAS cycling, Supply Current Iocg | CAS = Vin, | 800} | 720 | | 640 | mA| 4,2 (RAS-only Refresh) tac = Min. Average Power RAS cycling, Supply Current locs | CAS before RAS, | - | 800 | | 720 | | 640 | mA| 1.2 (CAS before RAS Refresh) trc = Min. Average Power RAS = Vi, Supply Current tec? | CAS cycling, _ 640 _ 560 480 | mA; 1,3 (Fast Page Mode) tec = Min. Average Power tre = 125 ys, 12 Supply Current lec10 CAS before 2.4 _ 2.4 2.4 | mA 4 5 (Battery Backup) RAS cycling Notes: Specified values are obtained with the output open.. . Address can be changed once or less while RAS=Vj,. . Vec-0.2 VE Vy $6.5 V,-1.0 VS Vi_ S02 V. . L-version. 1, 2 3. Address can be changed once or less while CAS=Vjy. 4 5 91MSC23132C/CL-xxBS8/DS8 ORBIT Semiconductor AC Characteristics (1/2) (Veo = 5 V 210%, Ta =0C to 70C) Note 1,2,3,9,10 Imso23132/CL MSC23132C/CL|MSC23132C/CL Parameter Symbol -GOBS8/DSS | -70BS8/DS8 | -80BS8/DS8 | Unit! Note Min. | Max. | Min. | Max. | Min. | Max. Random Read or Write Cycle Time tae | 110 _ 130 _ 150 - ns Fast Page Mode Cycle Time tpe 40 _ 45 _ 50 _ ns Access Time from RAS taac | | 60 | 70 ; | 8 | ns [4,56 Access Time from CAS trac | 15 | 20 | 20 ] ns | 45 Access Time from Column Address taa _ 30 35 _ 40 ns | 46 Access Time from CAS Precharge tepa | 35 _ 40 45 | ms] 4 Output Low Impedance Time from CAS taz | 0 0 0 }ns}] 4 Output Buffer Turn-off Delay Time torr 0 t6 0 20 0 20 ns 7 Transition Time tr 3 50 3 50 3 50 ns 3 Refresh Period trer 16 _ 16 _ 16 ms Refresh Period (L-version) trer | 128 _ 128 _ 128 | ms RAS Precharge Time tap | 40 _ 50 _ 60 | ns RAS Pulse Width tras | 60 10K 70 10K 80 10K | ns RAS Pulse Width (Fast Page Mode) trasp | 60 | 100K | 70 | 100K} 80 | 100K | ns RAS Hold Time tasy | 15 _ 20 20 | ns CAS Precharge Time tcp | 10 10 _ t0 | ns CAS Pulse Width Icas 15 10K 20 10K 20 10K | ns CAS Hold Time tcsy | 60 | 70 | 80 | | as CAS to RAS Precharge Time tcre 5 5 5 _ ns RAS to CAS Delay Time tacn | 20 45 20 50 20 60 ns 5 RAS to Column Address Delay Time taan | 15 30 15 35 15 40 /) ns] 6 Row Address Set-up Time tasa 0 _ 0 _ 0 _ ns Row Address Hold Time tray | 10 _ 10 _ 10 ns Column Address Set-up Time tase 0 _ 0 _ 0 | ns Column Address Hold Time tcan | 18 _ 15 _ 15 _ ns Column Address Hold Time from RAS tan | 50 55 _ 60 | os Column Address to RAS Lead Time tra | 30 _ 35 _ 40 ns 92OKI Semiconductor MSC23132C/CL-xxBS8/DS8 AC Characteristics (2/2) (Veo =5 V 210%, Ta =0G to 70C) Note 1,2,3,9,10 MSC231320/CL/MSC23132C/CL|MSC23192C/CL| Parameter Symbo!) -60BS8/DS8 | -70BS8/DS8 | -80BS8/DSS /|Unit| Note Min. | Max. } Min. | Max. | Min. | Max. Read Command Set-up Time tacs 0 _ 0 _ 0 _ ns Read Command Hold Time tracy 0 0 _ 0 _ ns 8 Read Command Hold Time referenced to RAS | tern 0 0 0 | ns 8 Write Command Set-up Time twes 0 _ 0 _ 0 _ ns Write Command Hold Time twex 10 _ 10 _ 10 _ ns Write Command Hold Time from RAS: twen | 45 50 60 | os Write Command Pulse Width twp 10 _ 19 _ 10 _ ns Write Command to RAS Lead Time taw. | 15 _ 20 _ 20 | ns Write Command to CAS Lead Time tew. | 15 |; 20 20) | ns Data-in Set-up Time tps 0 _ 0 _ 0 _ ns Data-in Hold Time tou 15 _ 16 _ 15 _ ns Data-in Hoid Time from RAS toon | 50 | 55 60 [ns CAS Active Delay Time from RAS Precharge! trpc | 5 5 _ 5 | ns RAS to CAS Set-up Time (CAS before RAS)| tesp 5 _ 5 5 | ns RAS to CAS Hold Time (CAS before RAS) | tcua | 10 | 10 _ 10 | | os CAS Precharge Time (Refresh Counter Test}! tcpr | 30 | 35 40 | ns WE to RAS Precharge Time {CAS before RAS)| twap | 10 10 10 | os WE Hold Time from RAS (CAS before BAS)| tway | 10 10 _ 10 | ns RAS to WE Set-up Time (Test Mode} twrs | 10 | 0 | 10 | | os RAS to WE Hold Time (Test Mode) tw | 10 _ 10 10 | ns 93MSC23132C/CL-xxBS8/DS8 Notes: 94 1. 10. OKI Semiconductor A start-up delay of 200 us is required after power-up followed by a minimum of eight initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device operation is achieved. _ _ When using the internal refresh counter, a minimum of eight CAS before RAS initialization cycles is required. AC mesurement assume tr = 5 ns. Vin (Min.) and Vy, (Max.) are reference levels for measuring input timing signals. Transition times are measured between V1q and Vj,. - Measured with a load circuit equivalent to 2 TTL loads and 100 pF. Operation within the tpcp (Max.) limit ensures that trac (Max.) can be met. trcp (Max.) is specified as a reference point only. If tpcpis greater than the specified tpcp (Max.) limit, access time is controlled by tcac.. Operation within the trap (Max.) limit ensures that trac: (Max.) can be met. tRaD (Max.) is specified as a reference point only. If trap is greater than the specified trap (Max.) limit, access time is controlled by ta. . torr (Max.) defines the time at which the output achieves an open circuit condition and is not referenced to output voltage levels. - {RCH OF trRH must be satisfied for a read cycle. , The test mode is initiated by performing a WE and CAS before RAS refresh cycle. This mode is latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet is a 2-bit parallel test function. CAO is not used. In a read cycle, if all internal bits are equal, the DQ pin will indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low level. The test mode is cleared and the memory device returned to its normal operating state by performing a RAS-only refresh cycle or a CAS before RAS refresh cycle. In a test mode read cycle, the access time parameters are delayed by 5 ns. The test mode parameters are obtained by adding 5 ns to the normal read cycle values. See ADDENDUM E for AC Timing Waveforms