CRYSTAL-TO-LVDS PCI EXPRESS™
CLOCK SYNTHESIZER W/SPREAD SPECTRUM
ICS844202-245
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 1 ICS844202BK-245 REV. A JULY 9, 2007
PRELIMINARY
GENERAL DESCRIPTION
The ICS844202-245 is a 2 output PCI Express™ clock
synthesizer optimized to generate low jitter PCIe
reference clocks with or without spread spectrum
modulation and is a member of the HiPerClockS™
family of high performance clock solutions from IDT.
Spread type and amount can be configured via the SSC control
pins. Using a 25MHz, 18pF parallel resonant crystal, the device
will generate LVDS clocks at either 25MHz, 100MHz, 125MHz or
250MHz. The ICS844202-245 uses a low jitter VCO that easily
meets PCI Express jitter requirements and is packaged in a
32-pin VFQFN package.
FEATURES
• Two LVDS outputs at 25MHz, 100MHz, 125MHz or 250MHz
• Crystal oscillator interface, 25MHz, 18pF parallel resonant
crystal
• Supports the following output frequencies:
25MHz, 100MHz, 125MHz or 250MHz
• VCO range: 240MHz - 700MHz
• Supports SSC downspread at 0.50% and -0.75%,
centerspread at ±0.25% and no spread options
• Cycle-to-cycle jitter: 70ps (typical)
• Period jitter: 40ps (typical)
• Full 3.3V power supply mode
• 0°C to 70°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
HiPerClockS™
ICS
BLOCK DIAGRAM
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
VDD
VDD
nc
nc
VDDO
nc
FSEL0
nc
GND
OE
XTAL_OUT
XTAL_IN
OEB
VDD
SSC0
FSEL1
nQ1
Q1
VDDO
VDDA
GND
GND
nQ0
Q0
nc
nc
GND
nc
nc
SSC1
nc
GND
ICS844202-245
32-Lead VFQFN
5mm x 5mm x 0.75mm
package body
K Package
Top View
Phase
Detector
VCO
240-700MHz
Feedback Divider
÷20
Spread Spectrum
Control
OSC
0 0 PLL Bypass
0 1 ÷5
1 0 ÷4
1 1 ÷2
Q0
nQ0
Q1
nQ1
OE
XTAL_IN
XTAL_OUT
SSC[1:0]
FSEL[1:0]
Pullup
Default = 100MHz
25MHz
Pullup:Pullup
Pulldown:Pullup
2
2
PIN ASSIGNMENT
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 2 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
ecnaticapaCtupnI 4Fp
R
PULLUP
rotsiseRpullluPtupnI 15kΩ
R
NWODLLUP
rotsiseRnwodlluPtupnI 15kΩ
ρεβμυΝεμαΝεπψΤνοιτπιρχσεΔ
11,2,1V
DD
rewoP.snipylppuseroC
,8,6,4,3
,81,21
,12,02
42,32
cndesunU.tcennocoN
72,5V
ODD
rewoP.snipylppustuptuO
70LESFtupnIpulluP .slevelecafretniLTTVL/SOMCVL.A3elbaTeeS.niptcelesycneuqerftuptuO
91L
ESFtupnInwodlluP .slevelecafretniLTTVL/SOMCVL.A3elbaTeeS.niptcelesycneuqerftuptuO
,01
91
0CSS
1CSS tupnIpulluP .B3elbaTeeS.sniplortnocmurtcepsdaerpS
.slevelecafretniLTTVL/SOMCVL
41,31 ,NI_LATX
TUO_LATX tupnIpulluP ,tupt
uoehtsiTUO_LATX.ecafretnilatsyrctnanoserlellaraP
).ecnereferLLP(.tupniehtsiNI_LATX
51EOtupnI .delbaneerast
uptuo,hgIHcigoL.nipelbanetuptuO
.slevelecafretniLTTVL/SOMCVL.Z-iHnierastuptuo,WOLcigoL
,71,61
.92.22
03
DN
GrewoP.dnuorgylppusrewoP
62,521Q,1QntuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
82V
ADD
rewoP.nipylppusgolanA
23,130Q,0QntuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
:ETON nwodlluPdnapulluP .s
eulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotrefer
TABLE 3B. SSC[1:0] FUNCTION TABLETABLE 3A. FSEL[1:0] FUNCTION TABLE
tupnIstuptuO
1LESF0LESF1:0Qn/1:0Q
00 )zHM52(ssapyBLLP
01 )tluafed(zHM001
10 zHM521
11 zHM052
tupnI %daerpS
1CSS0CSS
00 52.0-±retneC
01 5.0-nwoD
10 57.0-nwoD
11 )tluafed(daerpSoN
Description
TypeNameNumber
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 3 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD 4.6V
Inputs, VI-0.5V to VDD + 0.5V
Outputs, IO
Continuous Current 10mA
Surge Current 15mA
Package Thermal Impedance, θJA 42.4°C/W (0 mps)
Storage Temperature, T
STG -65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
egatloVhgiHtupnI 2V
DD
3.0+V
V
LI
egatloVwoLtupnI 3.0-8.0V
I
HI
tnerruChgiHtupnI
1LESFV
DD
V=
NI
V564.3=051Aµ
,1CSS,0CSS
EO,0LESF V
DD
V=
NI
V564.3=5Aµ
I
LI
tnerruCwoLtupnI
1LESFV
DD
V,V564.3=
NI
V0=5-Aµ
,1CSS,0CSS
EO,0LESF V
DD
V,V564.3=
NI
V0=051-Aµ
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 531.33.3564.3V
V
ADD
egatloVylppuSgolanAV
DD
21.0–3.3V
DD
V
V
ODD
egatloVylppuStuptuO 531.33.3564.3V
I
DD
tnerruCylppuSrewoP 38Am
I
ADD
tnerruCylppuSgolanA 21Am
I
ODD
tnerruCylppuStuptuO 62Am
TABLE 4C. LVDS DC CHARACTERISTICS, DD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DO
egatloVtuptuOlaitnereffiD 053Vm
ΔV
DO
V
DO
egnahCedutingaM 05Vm
V
SO
egatloVtesffO 33.1V
ΔV
SO
V
SO
egnahCedutingaM 05Vm
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 4 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
TABLE 6. AC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
TUO
ycneuqerFtuptuO
52zHM
521zHM
001zHM
052zHM
t)rep(tijSMR,rettiJdoireP
zHM5253sp
zHM00154sp
zHM52104sp
zHM05204sp
t
j)cc(ti 2,1ETON;rettiJelcyC-ot-elcyC
zHM5206sp
zHM00107sp
zHM52106sp
zHM05207sp
t)o(ks3,2ETON;wekStuptuO 04sp
F
latx
1ETON;egnaRtupnIlatsyrC 215253zHM
F
M
4ETON;ycneuqerFnoitaludoMCSS DBTzHk
F
FM
4ETON;rotcaFnoitaludoMCSS DBT%
CSS
der
5ETON;noitcudeRlartcepS 11Bd
t
ELBATS
tuptuOkcolCelbatSotpu-rewoP 01sm
t
R
t/
F
emiTllaF/esiRtuptuO%08-%02525sp
cdoelcyCytuDtuptuO 05%
.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT
:1ETON
.egnargnitarepoOCVehtnihtiwdilavylnO:2ETON
.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastup
tuoneewtebwekssadenifeD:3ETON
.stniopssorclaitnereffidtuptuoehttaderusaeM
.delbanegnikcolcmurtcepSdaerpS:4ETON
TABLE 5. CRYSTAL CHARACTERISTICS
retemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
noitallicsOfoedoM latnemadnuF
ycneuqerF 52zHM
)RSE(ecnatsiseRs
eireStnelaviuqE DBT Ω
ecnaticapaCtnuhS 7Fp
leveLevirD 001Wµ
.latsyrctnanoserlellarapFp81nagnisudeziretcarahC:E
TON
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 5 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
PARAMETER MEASUREMENT INFORMATION
OUTPUT SKEW
PERIOD JITTER3.3V LVDS OUTPUT LOAD AC TEST CIRCUIT
CYCLE-TO-CYCLE JITTER
VOH
VREF
VOL
Mean Period
(First edge after trigger)
Reference Point
(Trigger Edge)
1σ contains 68.26% of all measurements
2σ contains 95.4% of all measurements
3σ contains 99.73% of all measurements
4σ contains 99.99366% of all measurements
6σ contains (100-1.973x10-7)% of all measurements
Histogram
t
sk(o)
Qy
Qx
nQy
nQx
OUTPUT RISE/FALL TIME
Clock
Outputs 20%
80% 80%
20%
t
R
t
F
V
OD
t
PW
tPERIOD
t
PW
t
PERIOD
odc = x 100%
Q0, Q1
nQ0, nQ1
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
➤
➤
➤
➤
tcycle n tcycle n+1
tjit(cc) = tcycle n – tcycle n+1
1000 Cycles
Q0, Q1
nQ0, nQ1
SCOPE
Qx
nQx
3.3V±10%
POWER SUPPLY
+–
Float GND
LVDS
VDD,
VDDO VDDA
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 6 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
CRYSTAL INPUT INTERFACE
The ICS844204-245 has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in Figure 2 below
FIGURE 2. CRYSTAL INPUt INTERFACE
were determined using a 25MHz, 18pF parallel resonant crystal
and were chosen to minimize the ppm error.
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS844204-245 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VDD, VDDA and
VDDO should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance, power
supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01μF bypass
capacitor should be connected to each VDDA.
POWER SUPPLY FILTERING T ECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10Ω
VDDA
10μF
.01μF
3.3V
.01μF
VDD
INPUTS:
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVDS OUTPUTS
All unused LVDS output pairs can be either left floating or
terminated with 100Ω across. If they are left floating, there should
be no trace attached.
C1
27p
X1
18pF Parallel Crystal
C2
27p
XTAL_OUT
XTAL_IN
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 7 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept a single-ended LVCMOS
signal through an AC couple capacitor. A general interface
diagram is shown in Figure 3. The XTAL_OUT pin can be left
floating. The input edge rate can be as slow as 10ns. For
LVCMOS inputs, it is recommended that the amplitude be
reduced from full swing to half swing in order to prevent signal
interference with the power rail and to reduce noise. This
configuration requires that the output impedance of the driver
(Ro) plus the series resistance (Rs) equals the transmission
line impedance. In addition, matched termination at the crystal
input will attenuate the signal in half. This can be done in one
of two ways. First, R1 and R2 in parallel should equal the
transmission line impedance. For most 50Ω applications, R1
and R2 can be 100Ω. This can also be accomplished by
removing R1 and making R2 50Ω.
FIGURE 3. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
XTA L _ I N
XTA L _ O U T
VCC
R2
Ro
R1
Zo = 50
Rs
VCC
.1uf
VDD VDD
Zo = Ro + Rs
FIGURE 4. P.C. BOARD FOR EXPOSED PAD THERMAL RELEASE PATH EXAMPLE
THERMAL RELEASE PATH
The expose metal pad provides heat transfer from the device to
the P.C. board. The expose metal pad is ground pad connected
to ground plane through thermal via. The exposed pad on the
device to the exposed metal pad on the PCB is contacted through
solder as shown in Figure 4. For further information, please refer
to the Application Note on Surface Mount Assembly of Amkor’s
Thermally /Electrically Enhance Leadframe Base Package, Amkor
Technology.
EXPOSED METAL PAD
PIN
SOLDER
EPAD
(GROUND PAD)
SOLDER
PIN
THER MAL VIA
PIN PAD
GROUND PLANEPIN PAD
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 8 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
3.3V LVDS DRIVER TERMINATION
A general LVDS interface is shown in Figure 5. In a 100Ω
differential transmission line environment, LVDS drivers require
a matched load termination of 100Ω across near the receiver
FIGURE 5. TYPICAL LVDS DRIVER TERMINATION
input. For a multiple LVDS outputs buffer, if only partial outputs
are used, it is recommended to terminate the un-used outputs.
R1
100
3.3V
100 Ohm Differential Transmission Line
3.3V
+
-
LVDS
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 9 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS844202-245.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS844202-245 is the sum of the core power plus the analog power plus the power dissipated in
the load(s). The following is the power dissipation for VDD = 3.3V + 5% = 3.645V, which gives worst case results.
•Power (core)MAX = VDD_MAX * (IDD_MAX + IDDA_MAX + IDDO_MAX) = 2.465V * (83mA + 12mA + 26mA) = 121mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA
must be used. Assuming no air
flow and a multi-layer board, the appropriate value is 42.4°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.121W * 42.4°C/W = 75.1°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and
the type of board (single layer or multi-layer).
TABLE 7. THERMAL RESISTANCE θθ
θθ
θJA FOR 32-LEAD VFQFN, FORCED CONVECTION
θθ
θθ
θJA by Velocity (Meters per Second)
0 1 2.5
Multi-Layer PCB, JEDEC Standard Test Boards 42.4°C/W 37.0°C/W 33.2°C/W
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 10 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS844202-245 is: 4715
TABLE 7. θJAVS. AIR FLOW TABLE FOR 32 LEAD VFQFN
θθ
θθ
θJA by Velocity (Meters per Second)
0 1 2.5
Multi-Layer PCB, JEDEC Standard Test Boards 42.4°C/W 37.0°C/W 33.2°C/W
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 11 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
PACKAGE OUTLINE - K SUFFIX FOR 32 LEAD VFQFN
TABLE 8. PACKAGE DIMENSIONS
Reference Document: JEDEC Publication 95, MO-220
NOITAIRAVCEDEJ
SRETEMILLIMNISNOISNEMIDLLA
LOBMYS
2-DHHV
MUMINIMLANIMONMUMIXAM
N23
A08.0--00.1
1A 0--50.0
3A .feR52.0
b81.052.003.0
N
D
8
N
E
8
DCISAB00.5
2D 52.152.252.3
ECISAB00.5
2E 52.152.252.3
eCISAB05.0
L03.004.005.0
IDT™ / ICS™ LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 12 ICS844202BK-245 REV. A JULY 9, 2007
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
TABLE 9. ORDERING INFORMATION
rebmuNredrO/traPgnikraMegakcaPgnigakcaPgnippihSerutarepmeT
542-KB202448SCIDBTNFQFVdaeL23yartC°07otC°0
T542-KB20
2448SCIDBTNFQFVdaeL23leer&epat0052C°07otC°0
FL542-KB202448SCIL542B204SCINFQFV"eerF-daeL"daeL23yartC°07otC°0
TFL
542-KB202448SCIL542B204SCINFQFV"eerF-daeL"daeL23leer&epat0052C°07otC°0
.tnailpmocSHoReradnanoitarugifnocee
rF-bPehterarebmuntrapehtotxiffus"FL"nahtiwderedroeratahtstraP:ETON
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology, Incorporated (IDT) assumes no responsibility for either its use or for
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extneded temperature ranges, high reliability or other extraordinary environmental requirements are not recommended without additional
processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical
instruments.
Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
800-345-7015
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Fax: 408-284-2775
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Corporate Headquarters
Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
+408 284 8200 (outside U.S.)
Asia Pacific and Japan
Integrated Device Technology
Singapore (1997) Pte. Ltd.
Reg. No. 199707558G
435 Orchard Road
#20-03 Wisma Atria
Singapore 238877
+65 6 887 5505
Europe
IDT Europe, Limited
321 Kingston Road
Leatherhead, Surrey
KT22 7TU
England
+44 (0) 1372 363 339
Fax: +44 (0) 1372 378851
ICS844202-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
© 2007 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks
of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be
trademarks or registered trademarks used to identify products or services of their respective owners.
Printed in USA
