2N3954A MONOLITHIC DUAL N-CHANNEL JFET The 2N3954A is a Low Noise, Low Drift, Monolithic Dual N-Channel JFET The 2N3954A family are matched JFET pairs for differential amplifiers. The 2N3954A family of general purpose JFETs is characterized for low and medium frequency differential amplifiers requiring low offset voltage, drift, noise and capacitance The 2N3954A family exhibits low capacitance - 6pF max and a spot noise figure of - 0.5dB max. The part offers a superior tracking ability. The 8 Pin P-DIP and 8 Pin SOIC provide ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information). 2N3954A Applications: Wideband Differential Amps High Input Impedance Amplifiers FEATURES LOW DRIFT LOW LEAKAGE LOW NOISE ABSOLUTE MAXIMUM RATINGS @ 25C (unless otherwise noted) | VGS12 /T|= 5V/C max. IG = 20pA TYP. en = 10nV/Hz TYP. Maximum Temperatures Storage Temperature 65C to +200C Operating Junction Temperature +150C Maximum Voltage and Current for Each Transistor - Note 1 VGSS Gate Voltage to Drain or Source 60V VDSO Drain to Source Voltage 60V IG(f) Gate Forward Current 50mA Maximum Power Dissipation Device Dissipation @ Free Air - Total 400mW @ 25C MATCHING CHARACTERISTICS @ 25C UNLESS OTHERWISE NOTED SYMBOL CHARACTERISTICS VALUE UNITS CONDITIONS | V GS12 / T| max. DRIFT VS. 5 V/C VDG=20V, ID=200A TEMPERATURE TA=55C to +125C | V GS12 | max. OFFSET VOLTAGE 5 mV VDG=20V, ID=200A ELECTRICAL CHARACTERISTICS @ 25C (unless otherwise noted) SYMBOL CHARACTERISTICS MIN. TYP. BVGSS Breakdown Voltage 60 BVGGO GateToGate Breakdown 60 TRANSCONDUCTANCE YfSS Full Conduction 1000 2000 YfS Typical Operation 500 700 |YFS12 / Y FS| Mismatch 0.6 DRAIN CURRENT IDSS Full Conduction 0.5 2 |IDSS12 / IDSS| Mismatch at Full Conduction 1 GATE VOLTAGE VGS(off) or Vp Pinchoff voltage 1 2 VGS(on) Operating Range 0.5 GATE CURRENT IG Operating 20 IG High Temperature IG Reduced VDG 5 IGSS At Full Conduction OUTPUT CONDUCTANCE YOSS Full Conduction YOS Operating 0.1 |YOS12| Differential 0.01 COMMON MODE REJECTION CMR 20 log | VGS12/ VDS| 100 CMR 20 log | VGS12/ VDS| 75 NOISE NF Figure en Voltage CAPACITANCE CISS Input CRSS Reverse Transfer CDD DraintoDrain 0.1 MAX. UNITS V V CONDITIONS VDS = 0 ID=1A I G= 1nA ID= 0 I S= 0 3000 1000 3 mho mho % VDG= 20V VDG= 20V 5 5 mA % VDG= 20V VGS= 0V 4.5 4 V V VDS= 20V VDS=20V ID= 1nA ID=200A 50 50 100 pA nA pA pA 5 1 0.1 mho mho mho dB dB 0.5 15 dB nV/Hz 6 2 pF pF pF VGS= 0V f = 1kHz ID= 200A Click To Buy VDG= 20V TA= +125C VDG= 10V VDG= 20V ID= 200A ID= 200A VDS= 0 VDG= 20V VDG= 20V VGS= 0V ID= 200A VDS = 10 to 20V ID=200A VDS = 5 to 10V ID=200A VDS= 20V VGS= 0V RG= 10M f= 100Hz NBW= 6Hz VDS=20V ID=200A f=10Hz NBW=1Hz VDS= 20V VGS= 0V VDG= 20V f= 1MHz ID= 200A Note 1 - These ratings are limiting values above which the serviceability of any semiconductor may be impaired PDIP / SOIC (Top View) Micross Components Europe Available Packages: 2N3954A in PDIP / SOIC 2N3954A available as bare die Please contact Micross for full package and die dimensions Tel: +44 1603 788967 Email: chipcomponents@micross.com Web: http://www.micross.com/distribution Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.