IRFIZ44NPbF
VDSS 55V
RDS(on) 0.024
ID 31A
Description
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low on-
resistance per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that HEXFET
Power MOSFETs are well known for, provides the designer with
an extremely efficient and reliable device for use in a wide variety
of applications.
The TO-220 Full Pak eliminates the need for additional insulating
hardware in commercial-industrial applications. The molding
compound used provides a high isolation capability and a low
thermal resistance between the tab and external heat sink. This
isolation is equivalent to using a 100 micron mica barrier with
standard TO-220 product. The Fullpak is mounted to a heat sink
using a single clip or by a single screw fixing.
1 2017-04-27
Absolute Maximum Ratings
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 31
A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 22
IDM Pulsed Drain Current  160
PD @TC = 25°C Maximum Power Dissipation 45 W
Linear Derating Factor 0.3 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy (Thermally Limited)  210
mJ
IAR Avalanche Current  25 A
EAR Repetitive Avalanche Energy 4.5 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
G D S
Gate Drain Source
Advanced Process Technology
Isolated Package
High Voltage Isolation = 2.5KVRMS
Sink to Lead Creepage Dist. = 4.8mm
Fully Avalanche Rated
Lead-Free
HEXFET® Power MOSFET
TO-220 Full-Pak
Base Part Number Package Type Standard Pack Orderable Part Number
Form Quantity
IRFIZ44NPbF TO-220 Full-Pak Tube 50 IRFIZ44NPbF
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case ––– 3.3
RJA Junction-to-Ambient ––– 65 °C/W
G
D
S
IRFIZ44NPbF
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Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
starting TJ = 25°C, L = 470µH, RG = 25, IAS = 25A (See fig. 12)
I
SD 25A, di/dt 320A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 300µs; duty cycle 2%.
t=60s, ƒ=60Hz
Uses IRFZ44N data and test conditions.
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.055 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.024  VGS = 10V, ID = 17A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Trans conductance 17 ––– ––– S VDS = 25V, ID = 25A
IDSS Drain-to-Source Leakage Current ––– ––– 25 µA VDS = 55V, VGS = 0V
––– ––– 250 VDS = 55V,VGS = 0V,TJ =150°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Qg Total Gate Charge ––– ––– 65
nC
ID = 25A
Qgs Gate-to-Source Charge ––– ––– 12 VDS = 44V
Qgd Gate-to-Drain Charge ––– ––– 27 VGS = 10V , See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 7.3 –––
ns
VDD = 28V
tr Rise Time ––– 69 ––– ID =25A
td(off) Turn-Off Delay Time ––– 47 ––– RG= 12
tf Fall Time ––– 60 ––– RD= 1.1See Fig. 10
LD Internal Drain Inductance ––– 4.5 –––
nH
Between lead,
6mm (0.25in.)
LS Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
Ciss Input Capacitance ––– 1300 ––– VGS = 0V
Coss Output Capacitance ––– 410 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 150 ––– ƒ = 1.0MHz, See Fig. 5
C Drain to Sink Capacitance ––– 12 ––– ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 31
A
MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current ––– ––– 160 integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C,IS = 17A,VGS = 0V 
trr Reverse Recovery Time ––– 65 98 ns TJ = 25°C ,IF = 25A
Qrr Reverse Recovery Charge ––– 160 240 C di/dt = 100A/µs 
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
pF
IRFIZ44NPbF
3 2017-04-27
Fig. 2 Typical Output Characteristics
Fig. 3 Typical Transfer Characteristics
Fig. 4 Normalized On-Resistance
vs. Temperature
Fig. 1 Typical Output Characteristics
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
20µs PULSE WIDTH
T = 25°C
C
A
4.5V
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
A
4.5V
20µs PULSE WIDTH
T = 175°C
C
1
10
100
1000
45678910
T = 25°C
J
GS
V , Gate-to-Source Voltage (V)
D
I , Drain-to-Source Current (A)
A
V = 25V
20µs PULSE WIDTH
DS
T = 175°C
J
0.0
0.5
1.0
1.5
2.0
2.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
V = 10V
GS
A
I = 41A
D
IRFIZ44NPbF
4 2017-04-27
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
0
500
1000
1500
2000
2500
110100
C, Capacitance (pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
4
8
12
16
20
0 10203040506070
Q , Total Gate Charge (nC)
G
V , Gate-to-Source Voltage (V)
GS
A
FOR TEST CIRCUIT
SEE FIGURE 13
V = 44V
V = 28V
DS
DS
I = 25A
D
1
10
100
1000
0.5 1.0 1.5 2.0 2.5 3.0
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
A
T = 175°C
J
1
10
100
1000
110100
V , Drain-to-Source Voltage (V)
DS
I , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 25°C
T = 175°C
Single Pulse
C
J
IRFIZ44NPbF
5 2017-04-27
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
25 50 75 100 125 150 175
0
5
10
15
20
25
30
35
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRFIZ44NPbF
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Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
tp
V
(BR)DSS
I
AS
Fig 13b. Gate Charge Test Circuit
Fig 13a. Gate Charge Waveform
0
100
200
300
400
500
25 50 75 100 125 150 175
J
E , Single Pulse Avalanche Energy (mJ)
AS
I
TOP 10A
18A
BOTTOM 25A
A
Starting T , Junction Temperature (°C)
V = 25V
D
DD
IRFIZ44NPbF
7 2017-04-27
Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
IRFIZ44NPbF
8 2017-04-27
TO-220 Full-Pak Package Outline (Dimensions are shown in millimeters (inches))
TO-220 Full-Pak Part Marking Information
TO-220AB Full-Pak packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to website at http://www.irf.com/package/
IRFIZ44NPbF
9 2017-04-27
Qualification Information
Qualification Level Industrial
(per JEDEC JESD47F)
TO-220 Full-Pak N/A
RoHS Compliant Yes
Moisture Sensitivity Level
Applicable version of JEDEC standard at the time of product release.
Trademarks of Infineon Technologies AG
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™,
CoolSiC™, DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™,
GaNpowIR™, HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™,
OPTIGA™, OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID
FLASH™, SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2016-04-19
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2016 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about this
document?
Email: erratum@infineon.com
Document reference
ifx1
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Please note that this product is not qualified
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of the Automotive Electronics Council.
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Revision History
Date Comments
04/27/2017
 Changed datasheet with Infineon logo - all pages.
 Corrected Package Outline on page 8.
 Added disclaimer on last page.