74HC166D CMOS Digital Integrated Circuits Silicon Monolithic 74HC166D 1. Functional Description * 8-Bit Shift Register (P-IN, S-OUT) 2. General The 74HC166D is a high speed CMOS 8-BIT PARALLEL/SERIAL-IN, SERIAL-OUT SHIFT REGISTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It consists of parallel-in or serial-in, serial-out 8-bit shift register with a gated clock input and an overriding clear input. The parallel-in or serial-in modes are controlled by the SHIFT/LOAD input. When the SHIFT/LOAD input is held high, the serial data input is enabled and the eight flip-flops perform serial shifting on each clock pulse. When held low, the parallel data inputs are enabled and synchronous loading occurs on the next clock pulse. Clocking is accomplished on the low-to-high transition of the clock pulse. The CK-INH input should be shifted high only while the CK input is held high. A direct clear input overrides all other inputs, including the clock, and sets all the flip-flops to zero. Functional details are shown in the truth table and the timing charts. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. Features (1) High speed: fMAX = 57 MHz (typ.) at VCC = 5 V (2) Low power dissipation: ICC = 4.0 A (max) at Ta = 25 (3) Balanced propagation delays: tPLH tPHL (4) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V 4. Packaging SOIC16 Start of commercial production (c)2016 Toshiba Corporation 1 2016-05 2016-08-04 Rev.3.0 74HC166D 5. Pin Assignment 6. Marking 7. IEC Logic Symbol (c)2016 Toshiba Corporation 2 2016-08-04 Rev.3.0 74HC166D 8. Truth Table X: Don't care a.....h: The level of steady state input voltage at inputs A through H respectively. 9. Timing Diagrams (c)2016 Toshiba Corporation 3 2016-08-04 Rev.3.0 74HC166D 10. System Diagram 11. Absolute Maximum Ratings (Note) Characteristics Supply voltage Input voltage Symbol Note Rating Unit VCC -0.5 to 7.0 V VIN -0.5 to VCC + 0.5 V VOUT -0.5 to VCC + 0.5 V Input diode current IIK 20 mA Output diode current IOK 20 mA Output current IOUT 25 mA VCC/ground current ICC 50 mA 500 mW -65 to 150 Output voltage Power dissipation PD Storage temperature Tstg (Note 1) Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: PD derates linearly with -8 mW/ above 85 (c)2016 Toshiba Corporation 4 2016-08-04 Rev.3.0 74HC166D 12. Operating Ranges (Note) Characteristics Symbol Test Condition Rating Unit Supply voltage VCC 2.0 to 6.0 V Input voltage VIN 0 to VCC V Output voltage VOUT 0 to VCC V Operating temperature Topr -40 to 125 Input rise and fall times tr,tf 0 to 50 s Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. (c)2016 Toshiba Corporation 5 2016-08-04 Rev.3.0 74HC166D 13. Electrical Characteristics 13.1. DC Characteristics (Unless otherwise specified, Ta = 25 ) Characteristics High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage Symbol VIH VIL VOH VOL Test Condition VIN = VIH or VIL VIN = VIH or VIL VCC (V) Min Typ. Max Unit 2.0 1.50 V 4.5 3.15 6.0 4.20 2.0 0.50 4.5 1.35 6.0 1.80 2.0 1.9 2.0 4.5 4.4 4.5 6.0 5.9 6.0 IOH = -4 mA 4.5 4.18 4.31 IOH = -5.2 mA 6.0 5.68 5.80 IOL = 20 A 2.0 0.0 0.1 4.5 0.0 0.1 IOH = -20 A 6.0 0.0 0.1 IOL = 4 mA 4.5 0.17 0.26 IOL = 5.2 mA V V V 6.0 0.18 0.26 Input leakage current IIN VIN = VCC or GND 6.0 0.1 A Quiescent supply current ICC VIN = VCC or GND 6.0 4.0 A 13.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 ) Characteristics High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage Symbol VIH VIL VOH VOL Test Condition VIN = VIH or VIL VIN = VIH or VIL IOH = -20 A VCC (V) Min Max Unit 2.0 1.50 V 4.5 3.15 6.0 4.20 2.0 0.50 4.5 1.35 6.0 1.80 2.0 1.9 4.5 4.4 6.0 5.9 IOH = -4 mA 4.5 4.13 IOH = -5.2 mA 6.0 5.63 IOL = 20 A 2.0 0.1 4.5 0.1 6.0 0.1 IOL = 4 mA 4.5 0.33 IOL = 5.2 mA 6.0 0.33 V V V Input leakage current IIN VIN = VCC or GND 6.0 1.0 A Quiescent supply current ICC VIN = VCC or GND 6.0 40.0 A (c)2016 Toshiba Corporation 6 2016-08-04 Rev.3.0 74HC166D 13.3. DC Characteristics (Unless otherwise specified, Ta = -40 to 125 ) Characteristics High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage Symbol Test Condition VIH VIL VOH VOL VIN = VIH or VIL IOH = -20 A VIN = VIH or VIL VCC (V) Min Max Unit 2.0 1.50 V 4.5 3.15 6.0 4.20 2.0 0.50 4.5 1.35 6.0 1.80 2.0 1.9 4.5 4.4 6.5 5.9 IOH = -4 mA 4.5 3.7 IOH = -5.2 mA 6.0 5.2 IOL = 20 A 2.0 0.1 4.5 0.1 6.0 0.1 IOL = 4 mA 4.5 0.4 IOL = 5.2 mA 6.0 0.4 V V V Input leakage current IIN VIN = VCC or GND 6.0 1.0 A Quiescent supply current ICC VIN = VCC or GND 6.0 160.0 A 13.4. Timing Requirements (Unless otherwise specified, Ta = 25 , Input: tr = tf = 6 ns) Characteristics Symbol Test Condition VCC (V) Typ. Limit Unit Minimum pulse width (CK) tw(L),tw(H) 2.0 75 ns 4.5 15 6.0 13 Minimum pulse width (CLR) tw(L) 2.0 75 4.5 15 6.0 13 2.0 75 4.5 15 6.0 13 2.0 75 4.5 15 6.0 13 2.0 0 4.5 0 6.0 0 2.0 0 4.5 0 6.0 0 2.0 50 4.5 10 6.0 9 2.0 6 4.5 31 6.0 36 Minimum setup time (SI, PI) tS Minimum setup time (S/L) tS Minimum hold time (SI, PI) th Minimum hold time (S/L) th Minimum removal time (CLR) Clock frequency (c)2016 Toshiba Corporation trem f 7 ns ns ns ns ns ns MHz 2016-08-04 Rev.3.0 74HC166D 13.5. Timing Requirements (Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 6 ns) Characteristics Symbol Test Condition VCC (V) Limit Unit Minimum pulse width (CK) tw(L),tw(H) 2.0 95 ns 4.5 19 6.0 16 Minimum pulse width (CLR) tw(L) 2.0 95 4.5 19 6.0 16 2.0 95 4.5 19 6.0 16 2.0 95 4.5 19 6.0 16 2.0 0 4.5 0 6.0 0 2.0 0 4.5 0 6.0 0 2.0 65 4.5 13 6.0 11 2.0 5 4.5 25 6.0 29 Minimum setup time (SI, PI) tS Minimum setup time (S/L) tS Minimum hold time (SI, PI) th Minimum hold time (S/L) th Minimum removal time (CLR) Clock frequency (c)2016 Toshiba Corporation trem f 8 ns ns ns ns ns ns MHz 2016-08-04 Rev.3.0 74HC166D 13.6. Timing Requirements (Unless otherwise specified, Ta = -40 to 125 , Input: tr = tf = 6 ns) Characteristics Symbol Test Condition VCC (V) Limit Unit Minimum pulse width (CK) tw(L),tw(H) 2.0 110 ns 4.5 22 Minimum pulse width (CLR) tw(L) Minimum setup time (SI, PI) tS Minimum setup time (S/L) tS Minimum hold time (SI, PI) th Minimum hold time (S/L) th Minimum removal time (CLR) Clock frequency (c)2016 Toshiba Corporation trem f 9 6.0 19 2.0 110 4.5 22 6.0 19 2.0 110 4.5 22 6.0 19 2.0 110 4.5 22 6.0 19 2.0 0 4.5 0 6.0 0 2.0 0 4.5 0 6.0 0 2.0 75 4.5 15 6.0 13 2.0 4 4.5 20 6.0 24 ns ns ns ns ns ns MHz 2016-08-04 Rev.3.0 74HC166D 13.7. AC Characteristics (Unless otherwise specified, CL = 15 pF, VCC = 5 V, Ta = 25 , Input: tr = tf = 6 ns) Characteristics Symbol Test Condition Min Typ. Max Unit Output transition time tTLH,tTHL Propagation delay time (CK-QH) tPLH,tPHL 4 8 ns 16 26 ns Propagation delay time (CLR-QH) tPHL 15 24 Maximum clock frequency fMAX 33 57 MHz 13.8. AC Characteristics (Unless otherwise specified, CL = 50 pF, Ta = 25 , Input: tr = tf = 6 ns) Characteristics Output transition time Symbol Note tTLH,tTHL Propagation delay time (CK-QH) tPLH,tPHL Propagation delay time (CLR-QH) tPHL Maximum clock frequency fMAX Input capacitance CIN Power dissipation capacitance CPD (Note 1) VCC (V) Min Typ. Max Unit 2.0 30 75 ns 4.5 8 15 6.0 7 13 2.0 70 150 4.5 20 30 6.0 16 26 2.0 60 135 4.5 18 27 6.0 14 23 2.0 6 14 4.5 31 50 6.0 36 63 3 pF 11 pF ns ns MHz Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation. ICC(opr) = CPD x VCC x fIN + ICC 13.9. AC Characteristics (Unless otherwise specified, CL = 50 pF, Ta = -40 to 85 , Input: tr = tf = 6 ns) Characteristics Output transition time Symbol VCC (V) Min Max Unit tTLH,tTHL 2.0 95 ns 4.5 19 6.0 16 2.0 190 4.5 38 6.0 32 2.0 170 4.5 34 6.0 29 2.0 5 4.5 25 6.0 29 Propagation delay time (CK-QH) tPLH,tPHL Propagation delay time (CLR-QH) tPHL Maximum clock frequency (c)2016 Toshiba Corporation fMAX 10 ns ns MHz 2016-08-04 Rev.3.0 74HC166D 13.10. AC Characteristics (Unless otherwise specified, CL = 50 pF, Ta = -40 to 125 , Input: tr = tf = 6 ns) Characteristics Output transition time Propagation delay time (CK-QH) Symbol VCC (V) Min Max Unit tTLH,tTHL 2.0 110 ns 4.5 22 6.0 19 2.0 225 4.5 45 6.0 38 2.0 205 4.5 41 6.0 35 2.0 4 4.5 20 6.0 24 tPLH,tPHL Propagation delay time (CLR-QH) tPHL Maximum clock frequency fMAX (c)2016 Toshiba Corporation 11 ns ns MHz 2016-08-04 Rev.3.0 74HC166D Package Dimensions Unit: mm Weight: 0.15 g (typ.) Package Name(s) Nickname: SOIC16 (c)2016 Toshiba Corporation 12 2016-08-04 Rev.3.0 74HC166D RESTRICTIONS ON PRODUCT USE * Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. * This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. * Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. 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