Type Package
TLE 4470 GS PG-DSO-14
TLE 4470 G PG-DSO-20
Dual Low-Drop Voltage Regulator
TLE 4470
P-DSO-14-1, -4, -7
PG-DSO-14
P/PG-DSO-20-1,-6,-7,-9,-14,-
1
PG-DSO-20
Data Sheet 1 Rev. 1.2, 2008-03-20
Features
• Stand-by output 180 mA; 5 V ± 2%
• Adjustable reset switching threshold
• Main output 350 mA; tracked to the stand-by output
• Low quiescent current consumption in standby mode
• Disable function for main output
• Wide operation range: up to 45 V
• Very low dropout
• Power-On-Reset circuit sensing the stand-by voltage
• Early warning comparator for supply undervoltage
• Output protected against short circuit
• Wide temperature range: -40 °C to 150 °C
• Overtemperature protection
• Overload protection
• Green Product (RoHS compliant)
• AEC Qualified
Functional Description
The TLE 4470 is a monolithic integrated voltage
regulator with two very low-drop outputs, a main output Q2 for loads up to 350 mA and
a stand by output Q1 providing a maximum of 180 mA. The device is available in two
packages the PG-DSO-14 and PG-DSO-20. It is designed to supply microprocessor
systems under the severe conditions of automotive applications and is therefore
equipped with additional protection functions against overload, short circuit and
overtemperature. Of course the TLE 4470 can also be used in other applications where
two stabilized voltages are required.
The device operates in the wide junction temperature range of -40 °C to 150 °C.
The stand-by regulator transforms an input voltage VI in the range of 5.6 V ≤ VI ≤ 45 V
to VQ1,nom = 5 V within an accuracy of 2%, whereas the main regulator is adjustable. By
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Data Sheet 2 Rev. 1.2, 2008-03-20
TLE 4470
use of an external voltage divider the main output voltage can be set to VQ2 ≥ 5 V for the
TLE 4470 G type (PG-DSO-20 package). VQ1 is compared to the voltage at pin ADJ2,
which is proportional to the output voltage VQ2. A control amplifier drives the base of the
series PNP transistor via a buffer.
The main output voltage VQ2 is tracked to the accuracy of the stand-by output.
For the TLE 4470 GS (PG-DSO-14 package) the output voltage is fixed to 5 V.
To save energy e.g. in battery powered body electronic applications, the main regulator
can be switched off via the disable input, which causes the current consumption to drop
to 180 µA typical.
Two additional features of the TLE 4470 are an early warning comparator (can be used
e.g. to monitor the supply voltage VI) and reset generator with an adjustable reset delay
time. The TLE 4470 G (PG-DSO-20 package) has in addition an adjustable reset
switching threshold. This feature is useful with microprocessors which guarantee a safe
operation down to voltages below the internally set reset threshold of 4.65 V typical.
Two functions are included in the reset generator, a power-on-reset and an under-
voltage reset. The power-on-reset feature is necessary for a defined start of the
microprocessor when switching on the application. The reset signal is kept low for a
certain delay time after the output voltage VQ1 of the regulator has surpassed the reset
threshold. An external delay capacitor sets this delay time. The under voltage reset
circuit supervises the stand-by output voltage. In case VQ1 falls below the reset switching
threshold the reset output is set LOW after a short reaction time. The reset LOW signal
is generated down to an output voltage VQ1 of 1 V.
Figure 1 Pin Configuration (top view)
GND
GND
10
8
9
7
6
3
5
4
2
120
19
18
17
16
15
14
13
12
11
GND
DIS
D
GND
RQ
SI
AEP02151
SQ
GND
RADJ
GND
GND
ADJ2
GND
Q2
Q2
Q1
Ι
Ι
1
2
GND
7
6
3
5
4
2
114
13
12
11
10
9
8
GND
GND
DIS
SI
AEP02152
GND
D
Ι
GND
GND
RQ
SQ
Q2
Q1
PG-DSO-14 PG-DSO-20
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TLE 4470
Data Sheet 3 Rev. 1.2, 2008-03-20
Pin Definitions and Functions
Table 1 PG-DSO-20
Pin No. Symbol Function
1RADJReset switching threshold adjust; for setting the reset
switching threshold connect to a voltage divider from Q1 to
GND. If this input is connected to GND, the reset is
triggered at the internal threshold.
2DReset delay; connect a capacitor CD to GND for delay time
adjustment
3DISDisable input main regulator; Q2 disabled with high
signal
4, 5, 6, 7 GND Ground
8RQReset output; the open collector output is connected to Q1
via an integrated 30 kΩ resistor
9SQSense output; the open collector output is connected to Q1
via an integrated 30 kΩ resistor
10 Q1 Stand-by regulator output voltage; block to GND with a
capacitor CQ1 ≥ 6 µF, ESR < 10 Ω at 10 kHz
11 ADJ2 Main regulator adjust input; Q2 can be set to higher
values than 5 V by an external voltage divider from Q2 to
GND
12, 13 Q2 Main regulator output voltage; block to GND with a
capacitor CQ2 ≥ 10 µF, ESR < 10 Ω at 10 kHz
14, 15, 16, 17 GND Ground
18 I2 Main regulator input voltage; block to GND directly at the
IC with a ceramic capacitor
19 I1 Stand-by regulator input voltage; block to GND directly at
the IC with a ceramic capacitor
20 SI Sense comparator input
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Data Sheet 4 Rev. 1.2, 2008-03-20
TLE 4470
RADJ: Adjustable reset switching threshold is not available in the PG-DSO-14 package.
Reset is always triggered at the internal threshold.
ADJ2: Main regulator adjust input is internally connected to VQ2.
Table 2 PG-DSO-14
Pin No. Symbol Function
1DReset delay; connect a capacitor CD to GND for delay time
adjustment
2DISDisable input main regulator; Q2 disabled with high signal
3, 4, 5 GND Ground
6RQReset output; the open collector output is connected to Q1
via an integrated 30 kΩ resistor
7SQSense output; the open collector output is connected to Q1
via an integrated 30 kΩ resistor
8Q1Stand-by regulator output voltage; block to GND with a
capacitor, CQ1 ≥ 6 µF, ESR < 10 Ω at 10 kHz
9Q2Main regulator output voltage; 5 V output tracking to Q1,
block to GND with a capacitor CQ2 ≥ 10 µF, ESR < 10 Ω at
10 kHz
10, 11, 12 GND Ground
13 I Main and stand-by regulator input voltage; block to GND
directly at the IC with a ceramic capacitor
14 SI Sense comparator input
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TLE 4470
Data Sheet 5 Rev. 1.2, 2008-03-20
Figure 2 Block Diagram
Reference Stand-by-Regulator
Main Regulator
=
Reset
=
Sense
19
18
3
20
10
13
11
2
8
1
9
14-17
12,
4-7
D
RQ
RADJ
SQ
GND
ADJ2
DIS
SI
30 k
Ω
Ω
30 k
Q1
V
AEB02153
Ι
1
VREF
Ι
d
RADJTH
V
REF
V
VSITH
2
Ι
Q2
Q1
Pin numbers valid for P-DSO-20-6 (TLE 4470 G)
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Data Sheet 6 Rev. 1.2, 2008-03-20
TLE 4470
Table 3 Absolute Maximum Ratings
-40 °C < Tj < 150 °C
Parameter Symbol Limit Values Unit Remarks
Min. Max.
Stand-by Regulator Input I1
Voltage VI1 -42 45 V –
Current II1 – – mA Internally limited
Main Regulator Input I2
Voltage VI2 -42 45 V –
Current II2 – – mA Internally limited
Stand-by Output Q1
Voltage VQ1 -1 7 V –
Current IQ1 – – mA Internally limited
Main Output Q2
Voltage VQ2 -1 36 V –
Current IQ2 – – mA Internally limited
Main Regulator Adjust Input ADJ2
Voltage VADJ2 -0.3 18 V –
Current IADJ2 – – mA Internally limited
Sense Output SQ
Voltage VSQ -0.3 25 V –
Current ISQ -5 5 mA –
Reset Output RQ
Voltage VRQ -0.3 25 V –
Current IRQ -5 5 mA –
Disable Input DIS
Voltage VDIS -42 45 V –
Current IDIS -2 2 mA –
Sense Input SI
Voltage VSI -25 18 V –
Current ISI -2 2 mA –
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TLE 4470
Data Sheet 7 Rev. 1.2, 2008-03-20
Note: ESD-Protection according to MIL Std. 883: ±2 kV.
Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Reset Delay D
Voltage VD-0.3 7 V –
Current ID-2 2 mA –
Reset Switching Threshold Adjust RADJ
Voltage VRADJ -0.3 7 V –
Current IRADJ – – mA Internally limited
Temperatures
Junction temperature Tj-50 150 °C–
Storage temperature Tstg -50 150 °C–
Table 3 Absolute Maximum Ratings (cont’d)
-40 °C < Tj < 150 °C
Parameter Symbol Limit Values Unit Remarks
Min. Max.
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Data Sheet 8 Rev. 1.2, 2008-03-20
TLE 4470
Note: In the operating range the functions given in the circuit description are fulfilled.
Table 4 Operating Range
Parameter Symbol Limit Values Unit Remarks
Min. Max.
Stand-by regulator
input voltage
VI1 5.6 45 V –
Main regulator
input voltage
VI2 VQ2,nom
+ 0.6 V
45 V –
Stand-by regulator
output current
IQ1 0180mA–
Main regulator
output current
IQ2 0350mA–
Disable input voltage VDIS -0.3 45 V –
Sense input voltage VSI -0.3 17 V –
Junction temperature Tj-40 150 °C–
Thermal Resistances PG-DSO-14
Junction pin Rthj-pin – 32 K/W Measured to pin 4
Junction ambient Rthj-a –112K/W
1)
Thermal Resistances PG-DSO-20
Junction pin Rthj-pin – 23 K/W Measured to pin 4
Junction ambient Rthj-a –100K/W
1)
1) Package mounted on PCB 80 × 80 × 1.5 mm3; 35 µ Cu; 5 µ Sn; Footprint only; zero airflow.
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TLE 4470
Data Sheet 9 Rev. 1.2, 2008-03-20
Table 5 Electrical Characteristics
VI1 = VI2 = 14 V; VDIS < VDISL; -40 °C < Tj < 150 °C; unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
Min. Typ. Max.
Stand-by Regulator
Output 1
Output voltage VQ1 4.90 5.0 5.10 V 1 mA < IQ1 < 100 mA
Output current
limitation
IQ1 180 280 – mA 1)
Output drop voltage;
VDRQ1 = VI1 - VQ1
VDRQ1 – 300 500 mV IQ1 = 100 mA1)
Current Consumption
Quiescent current;
stand-by
Iq = II1 - IQ1
Iq– 180 250 µAIQ1 = 300 µA; Tj = 25 °C
VDIS > VDISH (Q2 = OFF)
– 180 300 µAIQ1 = 300 µA;
VDIS > VDISH (Q2 = OFF)
Quiescent current
Iq = II1 - IQ1
Iq–46mAIQ1 = 100 mA;
VDIS > VDISH (Q2 = OFF)
Regulator Performance
Load regulation ∆VQ1,Lo – 15 50 mV 1 mA < IQ1 < 150 mA
Load regulation ∆VQ1,Lo – 5 25 mV 1 mA < IQ1 < 100 mA
Line regulation ∆VQ1,Li –5 20mVIQ1 = 1 mA;
6 V < VI1 < 28 V
Power Supply Ripple
Rejection
PSRR –60 –dB20 Hz < fr < 20 kHz;
Vr = 5 Vpp
Temperature output
voltage drift ∆VQ1/∆T– 0.3 – mV/
K
–
dVI1/dt stability VQ1 4.5 – 5.5 V no reset occurs2)
Value of output
capacitance
CQ1 6– –µF–
ESR of output
capacitance
ESRCQ1 –– 10Ωat 10 kHz
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Data Sheet 10 Rev. 1.2, 2008-03-20
TLE 4470
Main-Regulator
Output 2
Output voltage
tracking accuracy ∆VQ2 =
VQ2 - VQ1
-25 5 25 mV 5 mA < IQ2 < 100 mA;
6 V < VI2 < 40 V3)
Output voltage
tracking accuracy ∆VQ2 =
VQ2 - VQ1
-25 5 25 mV 5 mA < IQ2 < 250 mA;
7 V < VI2 < 28 V3)
Adjust input current IADJ2 -1 – 1 µA–
Output current
limitation
IQ2 350 500 – mA 1)
Output drop voltage
VDRQ2 = VI2 - VQ2
VDRQ2 – 300 600 mV IQ2 = 200 mA1)
Current Consumption
Quiescent current;
Iq = II - IQ
Iq–715mAIQ2 = 200 mA;
IQ1 = 300 µA
Quiescent current;
Iq = II - IQ
Iq– 250 500 µAIQ2 = IQ1 = 300 µA;
Tj = 25 °C
Regulator Performance
Load regulation ∆VQ2,Lo – 5 25 mV 5 mA < IQ2 < 200 mA;
Line regulation ∆VQ2,Li –5 20mVIQ2 = 5 mA;
6 V < VI2 < 28 V
Power Supply Ripple
Rejection
PSRR –60 –dB20 Hz < fr < 20 kHz;
Vr = 5 Vpp
Temperature output
voltage drift ∆VQ2/∆T– 0.5 – mV/
K
–
dVI2/dt stability VQ2 4.5 – 5.5 V no reset occurs3)
Value of output
capacitance
CQ2 10 – – µF–
ESR of output
capacitance
ESRCQ2 –– 10Ωat 10 kHz
Table 5 Electrical Characteristics (cont’d)
VI1 = VI2 = 14 V; VDIS < VDISL; -40 °C < Tj < 150 °C; unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
Min. Typ. Max.
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TLE 4470
Data Sheet 11 Rev. 1.2, 2008-03-20
Disable Input DIS
H-input voltage
threshold
VDISH 2.3 – – V –
L-input voltage
threshold
VDISL – – 1.4 V Output 2 active
H-input current IDISH -2 -1 1 µA 2.3 V < VDIS < 7 V
L-input current IDISL -6 -2 -0.5 µA0 V < VDIS < 1.4 V
Reset Timing D and Output RQ
Reset switching
threshold
VQ, rt 4.5 4.65 4.8 V RADJ connected to
GND
Reset adjust
threshold
VRADJTH 1.25 1.35 1.45 V VQ1 > 3.5 V
Reset output low
voltage
VRQL –0.150.3VRRQ = 10 kΩ externally
connected to Q1;
VQ1 ≥ 1 V
Reset high voltage VRQH 4.5 – – V –
Reset pull-up
resistor
RRQ 20 30 45 kΩInternally connected to
Q1
Reset charging
current
ID,c 359µAVD = 1 V
Upper timing
threshold
VDU 1.5 1.8 2.2 V –
Lower timing
threshold
VDL 0.3 0.4 0.55 V –
Reset delay time trd 12 15 20 ms CD = 47 nF
Reset reaction time trr –0.52.0µsCD = 47 nF
Table 5 Electrical Characteristics (cont’d)
VI1 = VI2 = 14 V; VDIS < VDISL; -40 °C < Tj < 150 °C; unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
Min. Typ. Max.
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Data Sheet 12 Rev. 1.2, 2008-03-20
TLE 4470
Sense Input SI and Output SQ
Sense threshold
voltage
VSITH 1.28 1.35 1.45 V VSI decreasing
Sense threshold
hysteresis
VSIHY 25 60 100 mV –
Sense output low
voltage
VSQL –0.150.4VRSQ = 10 kΩ externally
connected to Q1;
VSI < 1.1 V; VI1 > 4.5 V
Sense output high
voltage
VSQH 4.5 – – V –
Sense pull-up
resistor
RSQ 20 30 45 kΩInternally connected to
Q1
1) Measured when the output voltage VQ has dropped 100 mV from the nominal value.
2) Square wave at VI: 8 V to 18 V; f = 10 kHz; tr = tf ≤ 100 ns.
3) VQ2 connected to ADJ2.
Table 5 Electrical Characteristics (cont’d)
VI1 = VI2 = 14 V; VDIS < VDISL; -40 °C < Tj < 150 °C; unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
Min. Typ. Max.
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TLE 4470
Data Sheet 13 Rev. 1.2, 2008-03-20
Application Information
Figure 3 Application Circuit
D
C
Ι
C
C
R
R
1N4004
ZD1
SI1
SI2 SI
Stand-by-Regulator
RADJTH
Main Regulator
REF
20
SI
Sense
Reset
=
V
d
Ι
=V
DIS
1
Ι
V
V
3
18 REF
Reference
19
8
4-7
14-17
AES02154
GND
1
30 k Ω
9
30 k
Q1
V
Ω
RADJ
SQ
RQ
2
11
13
D
ADJ2
12,
10
Batt
V
D1
36 V 100
nF
Control
330 k Ω
10 nF
100 kΩ
Q2
22 F
C
100 nF
µ
Q1
µ
10 F
C
SITH
Ι2Q2
Q1 5 V
1
R
R2
( = )
10 V
R12
R
Pin numbers valid for P-DSO-20-6 (TLE 4470 G)
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Data Sheet 14 Rev. 1.2, 2008-03-20
TLE 4470
Input, Output
The input capacitor CI is necessary for compensating line influences. Using a resistor of
approx. 1 Ω in series with CI, the LC circuit of input inductivity and input capacitance can
be damped. To stabilize the regulation circuits of the stand-by and main regulator, output
capacitors CQ1 and CQ2 are necessary. Stability is guaranteed at values CQ1 ≥ 6 µF and
CQ2 ≥ 10 µF, both with an ESR ≤ 10 Ω within the operating temperature range.
For the TLE 4470 G (PG-DSO-20) the output voltage VQ2 of the main regulator can be
adjusted to 5 V ≤ VQ2,nom ≤ 20 V by connecting an external voltage divider to the voltage
adjust pin ADJ2. For VQ2 = 5 V the voltage adjust pin has to be connected directly to the
main output.
For calculating VQ2 or R1 and R2 respectively the following equations can be used:
VQ2 = VQ1 × (1 + R1 / R2)(1)
or
R1 = R2 × (VQ2 / VQ1 - 1) (2)
Disable
The main regulator of the TLE 4470 can be switched OFF by a voltage above 2.3 V at
pin DIS. Reducing this voltage below 1.4 V will switch ON the main regulator again.
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
CD which can be calculated as follows:
CD = (∆t × ID,c) / ∆V(3)
Definitions:
•CD = delay capacitor
•∆t = reset delay time
•ID,c = charge current, typical 5 µA
•∆V = VDU, typical 1.8 V
•VDU = upper delay switching threshold at CD for reset delay time
The reset reaction time trr is the time it takes the voltage regulator to set the reset out
LOW after the output voltage has dropped below the reset threshold. It is typically 2 µs
for delay capacitor of 100 nF. For other values for CD the reaction time can be estimated
using the following equation:
trr ≈ 20 s/F × CD(4)
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TLE 4470
Data Sheet 15 Rev. 1.2, 2008-03-20
Figure 4 Reset Timing
Reset Switching Threshold
The internally set reset threshold is 4.65 V. When using the TLE 4470 G (PG-DSO-20)
this threshold can be adjusted to 3.5 V < VQ, rt < 4.6 V by connecting an external voltage
divider to pin RADJ. If this pin is not needed, it can be left open or even better connected
to GND.
R1 = R2 × (VQ, rt - Vref) / Vref or VQ, rt = Vref (1 + R1 / R2)(5)
Definitions:
•VQ, rt = Reset threshold
•Vref = comparator reference voltage, typical 1.35 V
(Reset adjust input current ≈ 50 nA)
The reset output pin is internally connected to the stand-by output Q1 via a 30 kΩ pull-up
resistor. The reset LOW signal at pin RQ is guaranteed down to an output voltage VQ1
of 1 V typical.
AED03010_4470
Thermal
t
rd
Power-on-Reset Voltage Dip Secondary Overload
at OutputSpike
V
Ι
D,c
Ι
=
V
d
dt
V
Q
Q, rt
V
t
rr
<
rr
t
at Input Undervoltage
Shutdown
C
D
t
V
RO
D
V
t
t
t
V
DU
V
DL
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Data Sheet 16 Rev. 1.2, 2008-03-20
TLE 4470
Figure 5
Early Warning
The early warning function compares a voltage defined by the user to an internal
reference voltage. Therefore the voltage to be supervised has to be scaled down by an
external voltage divider in order to compare it to internal sense threshold (reference
voltage) which is typically 1.35 V. The sense out pin is set to low when the user defined
voltage falls below this threshold.
A typical example where this circuit can be used is to supervise the input voltage VI to
give the microprocessor a prewarning of a low battery condition.
Calculation of the voltage divider can be easily done since the sense input current can
be neglected. The equations needed for calculation are identical to the previously given
ones.
To minimize transient influences the use of a capacitor in parallel to R2 is recommended.
Like the reset output pin, the sense out pin SQ is internally connected to the stand-by
output Q1 via a 30 kΩ pull-up resistor. The sense out LOW signal at pin SQ is generated
down to an input voltage VI1 of 3 V typical.
AES02505_4470
1
Band-Gap
Reference Reference
Band-Gap
+
_
RADJ
RO
Q1
V
V
I1
GND
R
1
2
R
30 k
Ω
1.35 V 1.35 V
_
<
TLE 4470 G
ref
V
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Data Sheet 17 Rev. 1.2, 2008-03-20
TLE 4470
Typical Performance Characteristics
Drop Voltage VDRQ1 versus
Output Current IQ1
Drop Voltage VDRQ2 versus
Output Current IQ2
Output Voltage VQ1, VQ2 versus
Output Current IQ1
Output Voltage VQ1 versus
Temperature Tj
AED02491
0
0
= 125 ˚C
Ι
V
DRQ1
50 100 150 200 mA 300
100
200
300
400
500
600
mV
T
j
Q1
j
T= 25 ˚C
= -40 ˚C
T
j
Q2 OFF
AED02492
0
0
= 125 ˚C
Ι
V
DRQ2
50 100 150 200 mA 300
100
200
300
400
500
600
mV
T
j
Q2
j
T= 25 ˚C
= -40 ˚C
T
j
AED02493
0
0
= 25 ˚C
Ι
V
Q1
1
2
3
4
5
6
VT
j
Q1
100 200 300 400 500
mA
Q1
V
Q2
V
Q2
V,
AED02494
-40
4.6
= 13.5 V
T
VQ1
4.7
4.8
4.9
5
5.1
5.2
V
VΙ
j
0 40 80 120 160
˚C
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Data Sheet 18 Rev. 1.2, 2008-03-20
TLE 4470
Output Voltage VQ1, VQ2 versus
Input Voltage VI (VI1 = VI2)
Current Consumption Iq versus
Input Voltage VI
Current Consumption Iq versus
Output Current IQ1 (low load)
Current Consumption Iq versus
Output Current IQ1 (high load)
AED02495
0
0
=
V
V
Q
1
2
3
4
5
6
VV
Ι
Ι
246810
V
V
Q1
V,V
Q2
= 5 V
V
Q2, nom
=
Q1, nom
V
j
T= 25 ˚C
= 10 mA
Ι
Q1
Q2
Ι
= 10 mA
1Ι2
AED02496
0
0
V
Ι
q
1
2
3
4
5
6
mA
Ι
V
j
T= 25 ˚C
10 20 30 40
< 1 mA
Ι
Q1
Q2
Ι
= 10 mA
AED02497_4470
0
0
= 25
˚
C
Ι
Ι
q
500
1000
2000
2500
3000
A
T
j
Q1
Ι
V
= 13.5 V
Q2 OFF
mA
µ
10 20 30 40
1500
AED02498
0
0
Ι
Ι
q
5
10
15
20
25
30
mA
Q1
50 100 150 200 250
mA
= 13.5 V
V
Ι
j
T= 25 ˚C
Q2 OFF
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Data Sheet 19 Rev. 1.2, 2008-03-20
TLE 4470
Current Consumption Iq versus
Output Current IQ2 (low load)
Current Consumption Iq versus
Output Current IQ2 (high load)
Reset Adjust Threshold VRADJTH
versus Temperature Tj
Switching Voltage VDU, VDL versus
Temperature Tj
AED02499
0
0
= 25 ˚C
Ι
Ι
q
10 20 30 40 60
300
600
900
1200
1500
1800
ATj
Q2
Ι
V= 13.5 V
= 0 mA
Ι
Q1
mA
µ
AED02500
0
0
Ι
Ι
q
50 100 150 200 mA 300
5
10
15
20
25
30
Q2
mA
AED02501
-40
1.0
T
V
RADJTH
1.1
1.2
1.3
1.4
1.5
1.6
j
0 40 80 120 160
˚C
V
AED02502
-40
0
T
VD
0.4
0.8
1.2
1.6
2.0
2,4
j
0 40 80 120 160
˚C
= 13,5 V
VΙ
DU
V
V
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Data Sheet 20 Rev. 1.2, 2008-03-20
TLE 4470
Charge Current ID,c versus
Temperature Tj
Sense Threshold VSITH versus
Temperature Tj
AED02503_04470
-40
2
T
Ι
D, c
3
4
5
6
7
8
j
0 40 80 120 160
˚C
= 13.5 V
V
Ι
D
V
= 1 V
A
µ
AED02504
-40
1
= 13.5 V
T
V
SITH
1.1
1.2
1.3
1.4
1.5
1.6
V
V
Ι
j
0 40 80 120 160
˚C
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TLE 4470
Data Sheet 21 Rev. 1.2, 2008-03-20
Package Outlines
Figure 6 PG-DSO-14 (Plastic Green Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
-0.2
8.75
1)
0.64
0.19
+0.06
Index Marking
1.27
+0.10
0.41
0.1
1
14
2)
7
14x
8
0.175
(1.47)
±
0.07
±0.2
6
0.35 x 45˚
-0.2
1.75 MAX.
4
1)
±0.25
8˚MAX.
-0.06
0.2 MAB
M
0.2 C
C
B
A
GPS01230
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/packages.
Dimensions in mm
SMD = Surface Mounted Device
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Data Sheet 22 Rev. 1.2, 2008-03-20
TLE 4470
Figure 7 PG-DSO-20 (Plastic Green Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
GPS05094
1.27
0.2 20x
0.35+0.15 2)
12.8 1)
-0.2
110
1120
2.65 MAX.
2.45
20x
0.1
-0.2
0.2
-0.1
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion of 0.05 max. per side
0.35 x 45˚
-0.21)
7.6
8˚ MAX.
±0.3
10.3
0.4+0.8
0.23
+0.09
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/packages.
Dimensions in mm
SMD = Surface Mounted Device
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TLE 4470
Revision History
Data Sheet 23 Rev. 1.2, 2008-03-20
Version Date Changes
Rev. 1.2 2008-03-20 Initial version of RoHS-compliant derivate of TLE 4470
Page 1: AEC certified statement added
Page 1 and Page 21f: RoHS compliance statement and
Green product feature added
Page 1 and Page 21f: Package changed to RoHS compliant
version
Legal Disclaimer updated
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Edition 2008-03-20
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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