1
LTC1380/LTC1393
Single-Ended 8-Channel/
Differential 4-Channel Analog
Multiplexer with SMBus Interface
V
S
(V)
–5
ON RESISTANCE (Ω)
150
200
250
3
1167 G15
100
50
125
175
225
75
25
0–3 –1 1
–4 4
–2 025
V
CC
= 2.7V
V
EE
= 0V
T
A
= 25°C
I
D
= 1mA
V
CC
= 5V
V
EE
= 0V
V
CC
= 5V
V
EE
= –5V
On Resistance vs VS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LTC1380
0.1µF 15k
8 ANALOG
INPUTS
15k
0.1µF
–5V
5V
ANALOG OUTPUT 1380/93 TA01
S0
S1
S2
S3
S4
S5
S6
S7
VCC
SCL
SDA
A0
A1
GND
VEE
DO
SMBus
HOST
SCL
SDA
LTC1380 Single-Ended 8-Channel Multiplexer
TYPICAL APPLICATION
U
The LTC
®
1380/LTC1393 are CMOS analog multiplexers with
SMBus
®
compatible digital interfaces. The LTC1380 is a
single-ended 8-channel multiplexer, while the LTC1393 is a
differential 4-channel multiplexer. The SMBus digital inter-
face requires only two wires (SCL and SDA). Both the
LTC1380 and the LTC1393 have four hard-wired SMBus
addresses, selectable with two external address pins. This
allows four devices, each with a unique SMBus address, to
coexist on one system and for four devices to be synchro-
nized with one stop bit.
The supply current is typically 10µA. Both digital interface
pins are SMBus compatible over the full operating supply
voltage range. The LTC1380 analog switches feature a
typical R
ON
of 35Ω (±5V supplies), typical switch leakage of
20pA and guaranteed break-before-make operation. Charge
injection is ±1pC typical.
The LTC1380/LTC1393 are available in 16-lead SO and GN
packages. Operation is fully specified over the commercial
and industrial temperature ranges.
■
Micropower Operation: Supply Current = 20µA Max
■
2-Wire SMBus Interface
■
Single 2.7V to ±5V Supply Operation
■
Expandable to 32 Single or 16 Differential Channels
■
Guaranteed Break-Before-Make
■
Low R
ON
: 35Ω Single Ended/70Ω Differential
■
Low Charge Injection: 20pC Max
■
Low Leakage: ±5nA Max
■
Available in 16-Lead SO and GN Packages
FEATURES
DESCRIPTION
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
SMBus is a registered trademark of Intel Corporation.
■
Data Acquisition Systems
■
Process Control
■
Laptop Computers
■
Signal Multiplexing/Demultiplexing
■
Analog-to-Digital Conversion Systems
APPLICATIONS
U
2
LTC1380/LTC1393
ABSOLUTE MAXIMUM RATINGS
W
WW
U
(Note 1)
Total Supply Voltage
LTC1380 (V
CC
to V
EE
)......................................... 15V
LTC1393 (V
CC
to GND) ....................................... 15V
Analog Input Voltage
LTC1380............................. V
EE
– 0.3V to V
CC
+ 0.3V
LTC1393................................... – 0.3V to V
CC
+ 0.3V
Digital Inputs .............................................–0.3V to 15V
LTC1380 (V
CC
TO V
EE
) .... (V
EE
– 0.3V) to (V
EE
+ 15V)
LTC1393 (V
CC
to GND) ..........................–0.3V to 15V
Maximum Switch-On Current .............................. 65mA
Power Dissipation............................................. 500mW
Operating Ambient Temperature Range
LTC1380C/LTC1393C .......................0°C ≤ T
A
≤ 70°C
LTC1380I/LTC1393I .................... –40°C ≤ T
A
≤ 85°C
Junction Temperature........................................... 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)..................300°C
PACKAGE/ORDER INFORMATION
W
UU
ORDER PART
NUMBER ORDER PART
NUMBER
LTC1393CGN
LTC1393CS
LTC1393IGN
LTC1393IS
LTC1380CGN
LTC1380CS
LTC1380IGN
LTC1380IS
TOP VIEW
S PACKAGE
16-LEAD PLASTIC SO
GN PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S0
S1
S2
S3
S4
S5
S6
S7
V
CC
SCL
SDA
A0
A1
GND
V
EE
D
O
T
JMAX
= 125°C, θ
JA
= 130°C/ W (GN)
T
JMAX
= 125°C, θ
JA
= 100°C/ W (S) T
JMAX
= 125°C, θ
JA
= 130°C/ W (GN)
T
JMAX
= 125°C, θ
JA
= 100°C/ W (S)
TOP VIEW
S PACKAGE
16-LEAD PLASTIC SO
GN PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S0
+
S0
–
S1
+
S1
–
S2
+
S2
–
S3
+
S3
–
V
CC
SCL
SDA
A0
A1
GND
D
O–
D
O+
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
ANALOG
Analog Signal Range LTC1380 ●V
EE
V
CC
V
LTC1393 ●0V
CC
V
R
ON
On Resistance LT1380: V
CC
= 5V, V
EE
= –5V, 35 70 Ω
V
EE
≤ (V
S
, V
D
) ≤ V
CC
, I
D
= ±1mA ●120 Ω
LT1393: V
CC
= 5V, 70 140 Ω
0V ≤ (V
S
, V
D
) ≤ V
CC
, I
D
= ±1mA ●200 Ω
LT1380/LTC1393: V
CC
= 2.7V, V
EE
= 0V, 210 400 Ω
0V ≤ (V
S
, V
D
) ≤ V
CC
, I
D
= ±1mA ●600 Ω
∆R
ON
vs V
S
V
EE
≤ (V
S
, V
D
) ≤ V
CC
, V
CC
= 5V 20 %
R
ON
vs Temperature V
CC
= 5V 0.5 %/°C
I
LEAK
Off-Channel or On-Channel LTC1380: (V
EE
+ 0.5V) ≤ (V
S
, V
D
) ≤ (V
CC
– 0.5V) ±0.05 ±5nA
Switch Leakage LTC1393: 0.5V ≤ (V
S
, V
D
) ≤ (V
CC
– 0.5V) ●±50 nA
(Notes 2, 4)
3
LTC1380/LTC1393
ELECTRICAL CHARACTERISTICS
(Notes 2, 4)
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All current into device pins is positive; all current out of device
pins is negative. All voltages are referenced to ground unless otherwise
specified. All typicals are given for T
A
= 25°C, V
CC
= 5V (for both LTC1380
and LTC1393) and V
EE
= –5V (LTC1380).
Note 3: These typical parameters are based on bench measurements and
are not production tested.
Note 4: Both SCL and SDA assume an external 15k pull-up resistor to a
typical SMBus host power supply V
DD
of 5V.
Note 5: Typical curves with V
EE
= –5V apply to the LTC1380. Curves with
V
EE
= 0V apply to both the LTC1380 and the LTC1393.
Note 6: These parameters are guaranteed by design and are not tested in
production.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
SCL, SDA Input High Voltage ●1.4 V
V
IL
SCL, SDA Input Low Voltage ●0.6 V
V
OL
SDA Output Low Voltage I
SDA
= 3mA ●0.4 V
V
AH
Address Input High Voltage V
CC
= 5V ●2V
V
AL
Address Input Low Voltage V
CC
= 5V ●0.8 V
I
IN
SCL, SDA, Address Input Current 0V ≤ V
IN
≤ V
CC
±1µA
I
CC
Positive Supply Current V
CC
= 5V, All Digital Inputs at 5V ●10 20 µA
I
EE
Negative Supply Current LTC1380: V
CC
= 5V, V
EE
= –5V, All Digital Inputs at 5V ●–0.1 –5 µA
C
S
Input Off Capacitance (Note 3) 3 pF
C
D
Output Off Capacitance (Note 3) LTC1380 26 pF
LTC1393 18 pF
t
ON
Switch Turn-On Time from Figure 1 LTC1380: V
CC
= 5V, V
EE
= –5V ●850 1500 ns
Stop Condition LTC1393: V
CC
= 5V ●850 1500 ns
LTC1380/LTC1393: V
CC
= 2.7V, V
EE
= 0V ●1130 2000 ns
t
OFF
Switch Turn-Off Time from Figure 1 LTC1380: V
CC
= 5V, V
EE
= –5V ●640 1200 ns
Stop Condition LTC1393: V
CC
= 5V ●650 1200 ns
LTC1380/LTC1393: V
CC
= 2.7V, V
EE
= 0V ●670 1200 ns
t
OPEN
Break-Before-Make Interval t
ON
– t
OFF
●75 210 ns
OIRR Off-Channel Isolation Figure 2, V
S
= 200mV
P-P
, R
L
= 1k, f = 100kHz (Note 3) –65 dB
Q
INJ
Charge Injection Figure 3, C
L
= 1000pF (Note 3) ●±1±20 pC
SMBus Timing (Note 6)
f
SMB
SMBus Operating Frequency ●100 kHz
t
BUF
Bus Free Time Between Stop/Start ●4.7 µs
t
HD:STA
Hold Time After (Repeated) Start ●4.0 µs
t
SU:STA
Repeated Start Setup Time ●4.7 µs
t
SU:STO
Stop Condition Setup Time ●4.0 µs
t
HD:DAT
Data Hold Time ●300 ns
t
SU:DAT
Data Setup Time ●250 ns
t
LOW
Clock Low Period ●4.7 µs
t
HIGH
Clock High Period ●4.0 µs
t
f
SCL/SDA Fall Time Time Interval Between 0.9V
DD
and (V
ILMAX
– 0.15) ●300 ns
t
r
SCL/SDA Rise Time Time Interval Between (V
ILMAX
– 0.15) ●1000 ns
and (V
IHMIN
+ 0.15)
4
LTC1380/LTC1393
TYPICAL PERFOR A CE CHARACTERISTICS
UW
V
S
(V)
–4.5
I
S
LEAKAGE (nA)
0.010
–2.5 –0.5 0.5 4.5
1380/93 G04
0.008
0.006
0.004
0.002
0
–0.002
–0.004
–0.006
–0.008
–0.010 –3.5 –1.5 1.5 2.5 3.5
T
A
= 25°C
V
CC
= 5V
V
EE
= –5V
V
CC
= 5V
V
EE
= 0V
V
CC
= 2.7V
V
EE
= 0V
Off-Channel Output Leakage
vs Temperature
TEMPERATURE (°C)
–50
1
10
1000
25 75
1380/93 G07
0.1
0.01
–25 0 50 100 125
0.001
0.0001
100
I
D
LEAKAGE (nA)
V
CC
= 2.7V
V
EE
= 0V
V
D
= 1.35V
V
CC
= 5V
V
EE
= –5V
V
D
= 0V
V
CC
= 5V
V
EE
= 0V
V
D
= 2.5V
Off-Channel Input Leakage
vs Temperature
TEMPERATURE (°C)
–50 –25
0.0001
I
S
LEAKAGE (nA)
0.01
10
050 75
1380/93 G06
0.001
1
0.1
25 100 125
V
CC
= 5V
V
EE
= 0V
V
S
= 2.5V
V
CC
= 5V
V
EE
= –5V
V
S
= 0V
V
CC
= 2.7V
V
EE
= 0V
V
S
= 1.35V
On-Channel Output Leakage vs VD
V
D
(V)
–4.5
I
D
LEAKAGE (nA)
0.010
–2.5 –0.5 0.5 4.5
1380/93 G05
0.008
0.006
0.004
0.002
0
–0.002
–0.004
–0.006
–0.008
–0.010 –3.5 –1.5 1.5 2.5 3.5
T
A
= 25°C
V
CC
= 5V
V
EE
= –5V
V
CC
= 5V
V
EE
= 0V
V
CC
= 2.7V
V
EE
= 0V
TEMPERATURE (°C)
–50
0
ON RESISTANCE (Ω)
25
75
100
125
250
175
050 75
1380/93 G01
50
200
225
150
–25 25 100 125
I
D
= 1mA
V
CC
= 2.7V
V
EE
= 0V
V
S
= 1.35V
V
CC
= 5V
V
EE
= 0V
V
S
= 2.5V
V
CC
= 5V
V
EE
= –5V
V
S
= 0V
On Resistance vs Temperature
V
S
(V)
–4.5
I
S
LEAKAGE (nA)
0.0020
–2.5 –0.5 0.5 4.5
1380/93 G02
0.0018
0.0016
0.0014
0.0012
0.0010
0.0008
0.0006
0.0004
0.0002
0–3.5 –1.5 1.5 2.5 3.5
T
A
= 25°C
V
CC
= 5V
V
EE
= –5V
V
CC
= 5V
V
EE
= 0V
V
CC
= 2.7V
V
EE
= 0V
V
D
(V)
–4.5
I
D
LEAKAGE (nA)
0.010
–2.5 –0.5 0.5 4.5
1380/93 G03
0.008
0.006
0.004
0.002
0
–0.002
–0.004
–0.006
–0.008
–0.010 –3.5 –1.5 1.5 2.5 3.5
T
A
= 25°C
V
CC
= 5V
V
EE
= –5V
V
CC
= 2.7V
V
EE
= 0V
V
CC
= 5V
V
EE
= 0V
Off-Channel Output Leakage vs VD
On-Channel Input Leakage
vs Temperature
TEMPERATURE (°C)
–50
1
10
1000
25 75
1380/93 G08
0.1
0.01
–25 0 50 100 125
0.001
0.0001
100
I
S
LEAKAGE (nA)
V
CC
= 5V
V
EE
= –5V
V
S
= 0V
V
CC
= 5V
V
EE
= 0V
V
S
= 2.5V
V
CC
= 2.7V
V
EE
= 0V
V
S
= 1.35V
TEMPERATURE (°C)
–50
1
10
1000
25 75
1380/93 G09
0.1
0.01
–25 0 50 100 125
0.001
0.0001
100
I
D
LEAKAGE (nA)
V
CC
= 5V
V
EE
= –5V
V
D
= 0V
V
CC
= 5V
V
EE
= 0V
V
D
= 2.5V
V
CC
= 2.7V
V
EE
= 0V
V
D
= 1.35V
Off-Channel Input Leakage vs VS
On-Channel Input Leakage vs VS
On-Channel Output Leakage
vs Temperature
(Note 5)
5
LTC1380/LTC1393
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Off Time vs Temperature QINJ vs VC (Figure 3)On Time vs Temperature
TEMPERATURE (°C)
–50
ON TIME (ns)
1400
25
1380/93 G11
800
400
–25 0 50
200
0
1600
1200
1000
600
75 100 125
V
CC
= 2.7V
V
EE
= 0V
V
S
= 1.35V
V
CC
= 5V
V
EE
= 0V
V
S
= 2.5V
V
CC
= 5V
V
EE
= –5V
V
S
= 0V
V
C
(V)
–5
Q
INJ
(pC)
3.0
4.0
5.0
3
1380/93 G12
2.0
1.0
2.5
3.5
4.5
1.5
0.5
0–3 –1 1
–4 4
–2 025
T
A
= 25°C
V
CC
= 5V
V
EE
= –5V
V
CC
= 2.7V
V
EE
= 0V
V
CC
= 5V
V
EE
= 0V
TEMPERATURE (°C)
–50
OFF TIME (ns)
700
25
1380/93 G10
400
200
–25 0 50
100
0
800
600
500
300
75 100 125
V
CC
= 5V
V
EE
= –5V
V
S
= 0V
V
CC
= 2.7V
V
EE
= 0V
V
S
= 1.35V
V
CC
= 5V
V
EE
= 0V
V
S
= 2.5V
QINJ vs Temperature (Figure 3)
TEMPERATURE (°C)
–50
0
Q
INJ
(pC)
0.2
0.6
0.8
1.0
2.0
1.4
050 75
1380/93 G13
0.4
1.6
1.8
1.2
–25 25 100 125
V
CC
= 5V
V
EE
= –5V
V
S
= 0V
V
CC
= 2.7V
V
EE
= 0V
V
S
= 1.35V
V
CC
= 5V
V
EE
= 0V
V
S
= 2.5V
Off-Channel Isolation vs Input
Common Mode Voltage (Figure 2)
ICC vs Temperature
TEMPERATURE (°C)
–50
0
I
CC
(µA)
1
3
4
5
10
7
050 75
1380/93 G15
2
8
9
6
–25 25 100 125
V
CC
= 5V
V
EE
= –5V
V
CC
= 2.7V
V
EE
= 0V V
CC
= 5V
V
EE
= 0V
TEMPERATURE (°C)
–50
–100
I
EE
(nA)
–90
–70
–60
–50
0
–30
050 75
1380/93 G16
–80
–20
–10
–40
–25 25 100 125
V
CC
= 5V
V
EE
= –5V
V
S
= 0V
IEE vs Temperature
(Note 5)
VC (V)
–5
OIRR (dB)
–75
–73
–74
–72
–71
–70
–69
–68
–67
–66
–65 3
1380/93 G14
–3 –1 1 52–4 –2 0 4
VCC = 5V
VEE = –5V
VCC = 5V
VEE = 0V VCC = 2.7V
VEE = 0V
TA = 25°C
VS = 200mVP-P, 100kHz
RL = 1k
6
LTC1380/LTC1393
PIN FUNCTIONS
UUU
S0 to S7/S0
±
to S3
±
(Pin 1 to Pin 8): Single-Ended Analog
Multiplexer Inputs (S0 to S7) for the LTC1380. Differential
Analog Multiplexer Inputs (S0
±
to S3
±
) for the LTC1393.
D
O
/D
O+
(Pin 9): Analog Multiplexer Output for the LTC1380.
Positive Differential Analog Multiplexer Output for the
LTC1393.
V
EE
/D
O–
(Pin 10): Negative Supply Pin for the LTC1380.
Negative Differential Multiplexer Output for the LTC1393.
For the LTC1380, V
EE
should be bypassed to GND with a
0.1µF ceramic capacitor when operating from split sup-
plies or connected to GND for single supply operation.
GND (Pin 11): Ground Pin.
A1, AO (Pin 12, Pin 13): Address Selection Pins. Tie these
two pins to either V
CC
or GND to select one of four possible
addresses to which the LTC1380/LTC1393 will respond.
SDA (Pin 14): SMBus Bidirectional Digital Input/Output
Pin. This pin has an open-drain output and requires a pull-
up resistor or current source to the positive supply for
normal operation. Data is shifted into and acknowledged
by the LTC1380/LTC1393 using this pin.
SCL (Pin 15): SMBus Clock Input. SDA data is shifted in
at rising edges of this clock during data transfer.
V
CC
(Pin 16): Positive Supply Pin. This pin should be
bypassed to GND with a 0.1µF ceramic capacitor.
BLOCK DIAGRA
W
ADDRESS
COMPARATOR
SMBus STATE
MACHINE
4-BIT LATCH
AND DECODER
SHIFT REGISTER HOLD
STOP
1380/93 BD
SDA
A0
A1
SCL
MULTIPLEXER
SWITCHES
ANALOG OUTPUT(S)
(LTC1380: D
O
)
(LTC1393: D
O±
)
ANALOG INPUTS
(LTC1380: S0 TO S7)
(LTC1393: S0
±
TO S3
±
)
7
LTC1380/LTC1393
TEST CIRCUITS
SCL
SD
SDA
R
L
1k
C
L
35pF
V
D
V
C
1/2 • (V
CC
+ V
EE
)
SCL
SDA
1V
LTC1380
1.5V
STOP CONDITION
WITH EN = 1 STOP CONDITION
WITH EN = 0
SCL 0.4V
1.5V 1V
20%
t
r
< 20ns, t
f
< 20ns
t
ON
SDA 0.4V
V
D
V
C
1V
80%
1380/93 F01
t
OFF
Figure 3. Charge Injection Test
SCL
SD
SDA
C
L
1000pF
CHARGE INJECTION
∆Q = ∆V
D
• C
L
V
D
SCL
SDA
V
C
LTC1380
1.5V
STOP CONDITION
WITH EN = 1 STOP CONDITION
WITH EN = 0
SCL 0.4V
1.5V
SDA 0.4V
V
D
V
C
∆V
D
1380/93 F03
∆V
D
SCL
SD
SDA
RL
1k
VD
VC2
1/2 • (VCC + VEE)
OIRR = 20LOG10 (VD/VS)
WHERE VS AND VD ARE THE
AC VOLTAGE COMPONENTS
AT S AND D
VC1
1/2 • (VCC + VEE)
VS
200mVP-P
100kHz
SCL
SDA
LTC1380
1380/93 F02
Figure 2. Off-Channel Isolation (OIRR) Test
Figure 1. Switch tON/tOFF Propagation Delay from SMBus STOP Condition
8
LTC1380/LTC1393
APPLICATIONS INFORMATION
WUU U
TI I G DIAGRA
UW W
SDA FROM
HOST
SDA FROM
LTC1380/LTC1393
SCL
D
O
X0A0A10011*
*0 FOR LTC1380, 1 FOR LTC1393
X X X EN C2 C1 C0
S
t
SU:STA
S P
t
HD:DAT
t
SU:DAT
t
HD:STA
t
r
t
f
t
LOW
t
HIGH
t
BUF
t
SU:STO
t
OFF
t
ON
t
OPEN
ADDRESS BYTE COMMAND BYTE
Theory of Operation
The LTC1380/LTC1393 are analog input multiplexers with
an SMBus digital interface. The LTC1380 is a single-ended
8-to-1 multiplexer; the LTC1393 is a differential 4-to-1
mulitplexer. The LTC1380 operates on either bipolar or
unipolar supplies, the LTC1393 operates on a single
supply. The minimum V
CC
supply for the LTC1380/LTC1393
is 2.7V. The maximum supply voltage (V
CC
to V
EE
for the
LTC1380, V
CC
for the LTC1393) should not exceed 14V.
The multiplexer switches operate within the entire power
supply range. The LTC1380 V
CC
and V
EE
supplies can be
offset such as 2.7V/–11V and 11V/–3V.
Serial Interface
The LTC1380/LTC1393 serial interface supports SMBus
send byte protocol as shown below with two interface
signals, SCL and SDA.
A send byte protocol is initiated by the SMBus host with a
start bit followed by a 7-bit address code and a write bit.
Each slave compares the address code with its address.
The send byte write bit is Low. The selected slaves then
reply with an acknowledge bit by pulling the SDA line Low.
Next, the host sends an 8-bit command byte. When the
selected slave receives the whole command byte, it ac-
knowledges and retains the command byte in the shift
register. The host can terminate the serial transfer with a
stop bit or communicate with another slave device with a
repeat start. When a repeat start occurs but the slave is not
selected, the command byte data is kept in the shift
register but the multiplexer control is not updated. The
multiplexer control latches the new command from the
shift register on the first stop bit after a successful com-
mand byte transfer. This allows the host to synchronize
several slave devices with a single stop bit. A1 and A0
select one of the four possible LTC1380/LTC1393 ad-
dresses as shown in Table 1. This allows up to four similar
devices to share the same SMBus, expanding the multi-
plexer to 32 single-ended channels with the LTC1380; 16
differential channels with the LTC1393. The first stop bit
after a successful send byte transfer will latch in the
multiplexer control bits (EN, C2, C1 and C0) and initiate a
break-before-make sequence.
S10010A1A0WAXXXXENC2C1C0AP
LTC1380 Send Byte Protocol
S1001
ADDRESS BYTE
S = SMBus START BIT
P = SMBus STOP BIT (THE FIRST STOP BIT AFTER A SUCCESSFUL COMMAND BYTE
UPDATES THE MULTIPLEXER CONTROL LATCH)
A = ACKNOWLEDGE BIT FROM LTC1380/LTC1393
W = WRITE COMMAND BIT
A1, A0 = ADDRESS BITS
EN, C2, C1, C0 = MULTIPLEXER CONTROL BITS
1A1A0WAXXXXENC2C1C0AP
LTC1393 Send Byte Protocol
COMMAND BYTE
9
LTC1380/LTC1393
APPLICATIONS INFORMATION
WUU U
Table 1. LTC1380/LTC1393 Address Selection
A1 A0 LTC1380 LTC1393
0 0 90H 98H
0 1 92H 9AH
1 0 94H 9CH
1 1 96H 9EH
SCL is the synchronizing clock generated by the host. SDA
is the bidirectional data transfer between the host and the
slave. The host initiates a start bit by dropping the SDA line
from High to Low while the SCL is High. The stop bit is
initiated by changing the SDA line from Low to High while
SCL is High. All address, command and acknowledge
signals must be valid and should not change while SCL is
High. The acknowledge bit signals to the host the accep-
tance of a correct address byte or the command byte.
At V
CC
supply above 2.7V, the SCL and SDA input thresh-
old is typically 1V with an input hysteresis of 100mV. The
typical SCL and SDA lines have either a resistive or current
source pull-up at the host. The LTC1380/LTC1393 have an
open-drain NMOS transistor at the SDA pin to sink 3mA
below 0.4V during the slave acknowledge sequence. The
address selection input A1 and A0 are TTL compatible at
V
CC
= 5V.
Both the LTC1380 and LTC1393 are compatible with the
Philips/Signetics I
2
C Bus interface. This 1V threshold for
SCA and SDA should not pose an operational problem
with I
2
C applications.
The multiplexer switches are selected as shown in Table 2.
Both the LTC1380 and the LTC1393 have an enable bit
(EN). A Low disables all switches while a High enables the
selected switch as programmed by bits C2, C1 and C0. A
stop bit after a successful send byte sequence for LTC1380/
LTC1393 will disable all switches before the new selected
switch is connected.
Table 2. Multiplexer Control Bits Truth Table
LTC1380 D
O
LTC1393 D
O+
, D
O–
EN C2 C1 C0 CHANNEL STATUS CHANNEL STATUS
0XXX All Off All Off
1000 S0 S0
+
, S0
–
1001 S1
1010 S2 S1
+
, S1
–
1011 S3
1100 S4 S2
+
, S2
–
1101 S5
1110 S6 S3
+
, S3
–
1111 S7
TYPICAL APPLICATIONS
U
Simplified LTC1393 Application
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LTC1393
0.1µF 15k
4 DIFFERENTIAL
ANALOG INPUTS
15k
5V
DIFFERENTIAL
ANALOG OUTPUTS
1380/93 TA03
S0
+
S0
–
S1
+
S1
–
S2
+
S2
–
S3
+
S3
–
V
CC
SCL
SDA
A0
A1
GND
D
O–
D
O+
SMBus
HOST
SCL
SDA
10
LTC1380/LTC1393
TYPICAL APPLICATIONS
U
16-Channel Multiplexer with Buffer
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LTC1380
0.1µF 15k
16
ANALOG
INPUTS
15k
5V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1380/93 TA04
S0
S1
S2
S3
S4
S5
S6
S7
VCC
SCL
SDA
A0
A1
GND
VEE
DO
LTC1380
S0
S1
S2
S3
S4
S5
S6
S7
VCC
SCL
SDA
A0
A1
GND
VEE
DO0.1µF
VOUT
–5V
–
+
LT1351
SMBus
HOST
SCL
SDA
Programmable Gain Amplifier
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LTC1380
0.1µF 15k 15k
0.1µF
–5V
V
OUT
ANALOG INPUT
5V
R0
R1
R2
R3
R4
R5
R6
R7
R
F
1380/93 TA05
S0
S1
S2
S3
S4
S5
S6
S7
V
CC
SCL
SDA
A0
A1
GND
V
EE
D
O
–
+
LT1055
SMBus
HOST
SCL
SDA
11
LTC1380/LTC1393
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
GN16 (SSOP) 1197
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
12
345
678
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
16 15 14 13
0.189 – 0.196*
(4.801 – 4.978)
12 11 10 9
0.016 – 0.050
(0.406 – 1.270)
0.015 ± 0.004
(0.38 ± 0.10)
× 45°
0° – 8° TYP
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
0.004 – 0.0098
(0.102 – 0.249)
0.025
(0.635)
BSC
0.016 – 0.050
0.406 – 1.270
0.010 – 0.020
(0.254 – 0.508)× 45°
0° – 8° TYP
0.008 – 0.010
(0.203 – 0.254)
12345678
0.150 – 0.157**
(3.810 – 3.988)
16 15 14 13
0.386 – 0.394*
(9.804 – 10.008)
0.228 – 0.244
(5.791 – 6.197)
12 11 10 9
S16 0695
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
12
LTC1380/LTC1393
138093f LT/GP 0398 4K • PRINTED IN USA
LINEAR TECHN OLOGY CORPORATION 1998
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
(408) 432-1900
FAX: (408) 434-0507
●
TELEX: 499-3977
●
www.linear-tech.com
TYPICAL APPLICATION
U
8 Differential Channel Multiplexer with A/D Converter
PART NUMBER DESCRIPTION COMMENTS
LTC201A/LTC202/ Micropower, Low Charge Injection, Quad CMOS Each Channel is Independently Controlled
LTC203 Analog Switches with Data Latches
LTC221/LTC222 Micropower, Low Charge Injection, Quad CMOS Analog Switches Parallel Controlled with Data Latches
LTC1390/LTC1391 8-Channel, Analog Multiplexer with Serial Interface 3V to ±5V in 16-Pin SO and PDIP
LTC1623 High Side Switch with SMBus Interface Regulated On-Board Charge Pump Drives
External N-Channel MOSFETS
RELATED PARTS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LTC1393
0.1µF 15k
8 DIFFERENTIAL
ANALOG INPUTS
15k
5V
S0
+
S0
–
S1
+
S1
–
S2
+
S2
–
S3
+
S3
–
V
CC
SCL
SDA
A0
A1
GND
D
O–
D
O+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LTC1393
1380/93 TA06
S0
+
S0
–
S1
+
S1
–
S2
+
S2
–
S3
+
S3
–
V
CC
SCL
SDA
A0
A1
GND
D
O–
D
O+
1
2
3
4
8
7
6
5
V
REF
+IN
–IN
GND
SERIAL CLOCK IN
SERIAL CLOCK OUT
CS
V
CC
CLK
D
OUT
CS/SHDN
LTC1286
4.7µF
SMBus
HOST
SCL
SDA
