TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS Copyright (c) 1997, Power Innovations Limited, UK SEPTEMBER 1993 - REVISED SEPTEMBER 1997 TELECOMMUNICATION SYSTEM SECONDARY PROTECTION Ion-Implanted Breakdown Region Precise and Stable Voltage Low Voltage Overshoot under Surge DEVICE VDRM D PACKAGE (TOP VIEW) T 1 8 G V(BO) NC 2 7 G NC 3 6 G R 4 5 G V V `1072F3 - 58 - 72 `1082F3 - 66 - 82 MDXXAE NC - No internal connection Planar Passivated Junctions Low Off-State Current < 10 A Rated for International Surge Wave Shapes WAVE SHAPE STANDARD A T 1 8 T G 2 7 G FCC Part 68 80 G 3 6 G 8/20 s ANSI C62.41 70 R 4 5 R 10/160 s FCC Part 68 60 10/560 s FCC Part 68 45 0.5/700 s RLM 88 38 FTZ R12 50 10/700 s VDE 0433 50 CCITT IX K17/K20 50 REA PE-60 35 Surface Mount and Through-Hole Options PACKAGE PART # SUFFIX Small-outline D Small-outline taped and reeled ITSP 2/10 s 10/1000 s P PACKAGE (TOP VIEW) DR Plastic DIP P Single-in-line SL MDXXAF Specified T terminal ratings require connection of pins 1 and 8. Specified R terminal ratings require connection of pins 4 and 5. SL PACKAGE (TOP VIEW) T 1 G 2 R 3 MDXXAG MD1XAA device symbol R T UL Recognized, E132482 description These dual asymmetrical transient voltage suppressors are designed for the overvoltage protection of ICs used for the SLIC (Subscriber Line Interface Circuit) function. The IC line driver section is typically powered with 0 V and a negative supply. The TISP1xxxF3 limits voltages that exceed these supply rails and is offered in two voltage variants to match typical negative supply voltage values. High voltages can occur on the line as a result of exposure to lightning strikes and a.c. power surges. Negative transients are initially limited by breakdown clamping until the voltage rises to the PRODUCT SD1XAA G Terminals T, R and G correspond to the alternative line designators of A, B and C breakover level, which causes the device to crowbar. The high crowbar holding current prevents d.c. latchup as the current subsides. Positive transients are limited by diode forward conduction. These protectors are guaranteed to suppress and withstand the listed international lightning surges on any terminal pair INFORMATION Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters. 1 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 description (continued) These monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operation The small-outline 8-pin assignment has been carefully chosen for these devices to maximise the inter-pin clearance and creepage distances which are used by standards (e.g. IEC950) to establish voltage withstand ratings. absolute maximum ratings RATING SYMBOL `1072F3 Repetitive peak off-state voltage ( 0C < TJ <70C) VALUE -58 VDRM `1082F3 UNIT V -66 Non-repetitive peak on-state pulse current (see Notes 1, 2 and 3) 1/2 s (Gas tube differential transient, open-circuit voltage wave shape 1/2 s) 120 2/10 s (FCC Part 68, open-circuit voltage wave shape 2/10 s) 80 8/20 s (ANSI C62.41, open-circuit voltage wave shape 1.2/50 s) 70 10/160 s (FCC Part 68, open-circuit voltage wave shape 10/160 s) 60 5/200 s (VDE 0433, open-circuit voltage wave shape 2 kV, 10/700 s) 0.2/310 s (RLM 88, open-circuit voltage wave shape 1.5 kV, 0.5/700 s) 38 5/310 s (CCITT IX K17/K20, open-circuit voltage wave shape 2 kV, 10/700 s) 50 5/310 s (FTZ R12, open-circuit voltage wave shape 2 kV, 10/700 s) 50 10/560 s (FCC Part 68, open-circuit voltage wave shape 10/560 s) 45 10/1000 s (REA PE-60, open-circuit voltage wave shape 10/1000 s) Non-repetitive peak on-state current (see Notes 2 and 3) 50 Hz, 35 4 D Package P Package 1s 6 ITSM SL Package Initial rate of rise of on-state current, A 50 ITSP A rms 6 Linear current ramp, Maximum ramp value < 38 A diT/dt 250 A/s TJ -40 to +150 C Tstg -40 to +150 C Junction temperature Storage temperature range NOTES: 1. Further details on surge wave shapes are contained in the Applications Information section. 2. Initially the TISP must be in thermal equilibrium with 0C < TJ <70C. The surge may be repeated after the TISP returns to its initial conditions. 3. Above 70C, derate linearly to zero at 150C lead temperature. electrical characteristics for the T and R terminals, 25C (unless otherwise noted) TISP1072F3 PARAMETER IDRM ID TEST CONDITIONS Repetitive peak offstate current Off-state current NOTE MAX MIN TYP 10 VD = 50 V Off-state capacitance 10 MAX UNIT 10 A 10 A D Package 0.08 0.5 0.08 0.5 pF VD = 0 P Package 0.06 0.4 0.06 0.4 pF (see Note 4) SL Package 0.02 0.3 0.02 0.3 pF Vd = 100 mV 4: Further details on capacitance are given in the Applications Information section. PRODUCT 2 TYP VD = VDRM , 0C < TJ <70C f = 100 kHz, Coff MIN TISP1082F3 INFORMATION TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 electrical characteristics for the T and G and R and G terminals, 25C (unless otherwise noted) TISP1072F3 PARAMETER IDRM V(BO) V(BO) I(BO) VFRM TEST CONDITIONS Repetitive peak offstate current MIN VD = VDRM, 0C < TJ <70C dv/dt = -250 V/ms, RSOURCE = 300 Impulse breakover volt- dv/dt = -1000 V/s, RSOURCE = 50 , Breakover voltage Breakover current dv/dt = -250 V/ms, RSOURCE = 300 Peak forward recovery dv/dt = 1000 V/s, RSOURCE = 50 , voltage diF /dt < 20 A/s VF Forward voltage IT = 5 A, On-state voltage IT = -5 A, IH Holding current di/dt = +30 mA/ms Critical rate of rise of Linear voltage ramp off-state voltage Maximum ramp value < 0.85VDRM ID Off-state current NOTE -0.1 tW = 100 s TYP MAX UNIT -10 A -72 -82 V -92 -0.1 3.3 V -0.6 3.3 A V 3 3 V -3 -3 V -0.15 -0.15 A -5 -5 kV/s VD = -50 V Off-state capacitance MIN -10 -0.6 tW = 100 s -10 A VD = 0, 150 240 130 240 pF Third terminal voltage = 0 VD = -5 V 65 104 55 104 pF (see Note 5) VD = -50 V 30 48 25 48 pF TYP MAX UNIT f = 100 kHz, Coff MAX -78 di/dt < -20 A/s age VT dv/dt TYP TISP1082F3 -10 Vd = 100 mV 5: Further details on capacitance are given in the Applications Information section. thermal characteristics PARAMETER RJA Junction to free air thermal resistance PRODUCT TEST CONDITIONS Ptot = 0.8 W, TA = 25C 5 cm2, FR4 PCB MIN D Package 160 P Package 100 SL Package 105 C/W INFORMATION 3 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 PARAMETER MEASUREMENT INFORMATION +i Quadrant I ITSP Forward Conduction Characteristic ITSM IF VF V(BR)M VD VDRM -v +v ID I(BR) V(BR) IDRM IH I(BO) VT V(BO) IT ITSM Quadrant III ITSP Switching Characteristic -i PMXXAC Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINALS R AND G OR T AND G +i Quadrant I ITSP Switching Characteristic ITSM IT V(BO) VT I(BO) IH V(BR)M VDRM -v VD ID ID I(BR) V(BR) V(BR) I(BR) IDRM IDRM VD +v VDRM V(BR)M IH I(BO) VT V(BO) IT ITSM Quadrant III ITSP Switching Characteristic -i Figure 2. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINALS R AND T PRODUCT 4 INFORMATION PMXXAA TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 TYPICAL CHARACTERISTICS R and G, or T and G terminals OFF-STATE CURRENT vs JUNCTION TEMPERATURE BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE TC1LAL TC1LAF 100 VD = -50 V Negat ve Breakdown Vo tages - V I(BR) = 1 mA ID - Off-State Current - A 10 1 0*1 0*01 '1082F3 80.0 V(BO) V(BR) V(BR)M 70.0 '1072F3 V(BO) V(BR) 60.0 V(BR)M 0*001 -25 0 25 50 75 100 125 150 -25 TJ - Junction Temperature - C 0 25 50 75 100 125 150 TJ - Junction Temperature - C Figure 3. Figure 4. ON-STATE CURRENT vs ON-STATE VOLTAGE FORWARD CURRENT vs FORWARD VOLTAGE TC1LAC 100 TC1LAE 100 IF - Forward Current - A IT - On-State Current - A 25C 10 150C -40C 10 25C 150C -40C 1 1 1 2 3 4 5 6 7 8 9 10 VT - On-State Voltage - V Figure 5. PRODUCT 1 2 3 4 5 6 7 8 9 10 VF - Forward Voltage - V Figure 6. INFORMATION 5 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 TYPICAL CHARACTERISTICS R and G, or T and G terminals NORMALISED BREAKOVER VOLTAGE vs RATE OF RISE OF PRINCIPLE CURRENT TC1LAD 1*0 0*9 0*8 0*7 0*6 TC1LAG 2.0 1.9 Normalised Breakover Voltage IH, I(BO) - Holding Current, Breakover Current - A HOLDING CURRENT & BREAKOVER CURRENT vs JUNCTION TEMPERATURE 0*5 I(BO) 0*4 0*3 IH 0*2 1.8 1.7 1.6 1.5 1.4 1.3 1.2 0*1 0*09 0*08 0*07 1.1 -25 0 25 50 75 100 125 1.0 0*001 150 TJ - Junction Temperature - C 0*01 0*1 10 100 di/dt - Rate of Rise of Principle Current - A/s Figure 7. Figure 8. OFF-STATE CAPACITANCE PEAK FORWARD RECOVERY VOLTAGE vs RATE OF RISE OF PRINCIPLE CURRENT vs R or T TERMINAL VOLTAGE (NEGATIVE) TC1LAH 10.0 TC1LAJ 200 Third Terminal = 0 to -50 V 9.0 8.0 Off-State Capacitance - pF VFRM - Peak Forward Recovery Voltage - V 1 7.0 6.0 5.0 4.0 3.0 100 '1072F3 '1082F3 2.0 1.0 0.0 0*001 0*01 0*1 1 10 100 di/dt - Rate of Rise of Principle Current - A/s Figure 9. PRODUCT 6 INFORMATION 10 0*1 1 10 R or T Terminal Voltage (Negative) - V Figure 10. 50 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 TYPICAL CHARACTERISTICS R and G, or T and G terminals OFF-STATE CAPACITANCE OFF-STATE CAPACITANCE vs JUNCTION TEMPERATURE vs R or T TERMINAL VOLTAGE (POSITIVE) TC1LAK 200 TC1LAB 500 Third Terminal = 0 to -50 V Third Terminal = 0 to -50 V Off-State Capacitance - pF Off-State Capacitance - pF Terminal Bias = 0 '1072F3 150 '1082F3 '1072F3 '1082F3 100 '1072F3 Terminal Bias = -50 V '1082F3 10 100 0*01 0*1 -25 0*3 0 25 50 75 100 125 150 TJ - Junction Temperature - C R or T Terminal Voltage (Positive) - V Figure 11. Figure 12. SURGE CURRENT vs DECAY TIME TC1LAA Maximum Surge Current - A 1000 100 10 2 10 100 1000 Decay Time - s Figure 13. PRODUCT INFORMATION 7 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 TYPICAL CHARACTERISTICS R and T terminals OFF-STATE CURRENT vs JUNCTION TEMPERATURE BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE TC1LAN 100 TC1LAM 90.0 VD = 50 V I(BR) = 1 mA V(BO) Breakdown Vo tages - V ID - Off-State Current - A 10 1 0*1 80.0 V(BR) '1082F3 V(BR)M V(BO) 70.0 '1072F3 0*01 V(BR) V(BR)M 0*001 60.0 -25 0 25 50 75 100 125 150 -25 TJ - Junction Temperature - C 50 75 100 125 150 Figure 15. NORMALISED BREAKOVER VOLTAGE vs RATE OF RISE OF PRINCIPLE CURRENT HOLDING CURRENT & BREAKOVER CURRENT vs JUNCTION TEMPERATURE TC1LAO 1*0 0*9 0*8 0*7 0*6 TC1LAI 2.0 1.9 Normalised Breakover Voltage IH, I(BO) - Holding Current, Breakover Current - A 25 TJ - Junction Temperature - C Figure 14. 0*5 I(BO) 0*4 0*3 IH 0*2 1.8 1.7 1.6 1.5 1.4 1.3 1.2 0*1 0*09 0*08 0*07 1.1 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C Figure 16. PRODUCT 8 0 INFORMATION 1.0 0*001 0*01 0*1 1 10 100 di/dt - Rate of Rise of Principle Current - A/s Figure 17. TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 TYPICAL CHARACTERISTICS R and T terminals OFF-STATE CAPACITANCE vs TERMINAL VOLTAGE TC1LAP 100 90 80 70 P Package D Package Off-State Capacitance - fF 60 50 40 30 SL Package 20 VG > VR or VT Both Voltage Polarities 10 0*1 1 10 50 Terminal Voltage - V Figure 18. THERMAL INFORMATION vs CURRENT DURATION THERMAL RESPONSE TI1MAA TI1LAA VGEN = 250 Vrms RGEN = 10 to 150 ZJ - Transient Thermal Impedance - C/W ITRMS - Maximum Non-Recurrent 50 Hz Current - A MAXIMUM NON-RECURRING 50 Hz CURRENT 10 SL Package P Package D Package 1 0*1 1 PRODUCT 10 100 1000 100 D Package P Package SL Package 10 1 0*0001 0*001 0*01 0*1 1 10 t - Current Duration - s t - Power Pulse Duration - s Figure 19. Figure 20. 100 1000 INFORMATION 9 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 APPLICATIONS INFORMATION electrical characteristics The electrical characteristics of a TISP are strongly dependent on junction temperature, TJ. Hence a characteristic value will depend on the junction temperature at the instant of measurement. The values given in this data sheet were measured on commercial testers, which generally minimise the temperature rise caused by testing. Application values may be calculated from the parameters' temperature coefficient, the power dissipated and the thermal response curve ,Z (see M. J. Maytum, "Transient Suppressor Dynamic Parameters."TI Technical Journal, vol. 6, No. 4, pp.63-70, July-August 1989). lightning surge wave shape notation Most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an exponential rise and an exponential decay. Wave shapes are classified in terms of peak amplitude (voltage or current), rise time and a decay time to 50% of the maximum amplitude. The notation used for the wave shape is amplitude, rise time/decay time. A 50A, 5/310 s wave shape would have a peak current value of 50 A, a rise time of 5 s and a decay time of 310 s. The TISP surge current graph comprehends the wave shapes of commonly used surges. generators There are three categories of surge generator type, single wave shape, combination wave shape and circuit defined. Single wave shape generators have essentially the same wave shape for the open circuit voltage and short circuit current (e.g. 10/1000 s open circuit voltage and short circuit current). Combination generators have two wave shapes, one for the open circuit voltage and the other for the short circuit current (e.g. 1.2/50 s open circuit voltage and 8/20 s short circuit current) Circuit specified generators usually equate to a combination generator, although typically only the open circuit voltage waveshape is referenced (e.g. a 10/700 s open circuit voltage generator typically produces a 5/310 s short circuit current). If the combination or circuit defined generators operate into a finite resistance the wave shape produced is intermediate between the open circuit and short circuit values. current rating When the TISP switches into the on-state it has a very low impedance. As a result, although the surge wave shape may be defined in terms of open circuit voltage, it is the current wave shape that must be used to assess the required TISP surge capability. As an example, the CCITT IX K17 1.5 kV, 10/700 s surge is changed to a 38 A, 5/310 s waveshape when driving into a short circuit. Thus the TISP surge current capability, when directly connected to the generator, will be found for the CCITT IX K17 waveform at 310 s on the surge graph and not 700 s. Some common short circuit equivalents are tabulated below: STANDARD OPEN CIRCUIT VOLTAGE SHORT CIRCUIT CURRENT CCITT IX K17 CCITT IX K20 RLM88 VDE 0433 FTZ R12 1.5 kV, 10/700 s 1 kV, 10/700 s 1.5 kV, 0.5/700 s 2.0 kV, 10/700 s 2.0 kV, 10/700 s 38 A, 5/310 s 25 A, 5/310 s 38 A, 0.2/310 s 50 A, 5/200 s 50 A, 5/310 s Any series resistance in the protected equipment will reduce the peak circuit current to less than the generators' short circuit value. A 2 kV open circuit voltage, 50 A short circuit current generator has an effective output impedance of 40 (2000/50). If the equipment has a series resistance of 25 then the surge current requirement of the TISP becomes 31 A (2000/65) and not 50 A. PRODUCT 10 INFORMATION TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 APPLICATIONS INFORMATION protection voltage The protection voltage, (V(BO) ), increases under lightning surge conditions due to thyristor regeneration. This increase is dependent on the rate of current rise, di/dt, when the TISP is clamping the voltage in its breakdown region. The V(BO) value under surge conditions can be estimated by multiplying the 50 Hz rate V(BO) (250 V/ms) value by the normalised increase at the surge's di/dt (Figure 8.) . An estimate of the di/dt can be made from the surge generator voltage rate of rise, dv/dt, and the circuit resistance. As an example, the CCITT IX K17 1.5 kV, 10/700 s surge has an average dv/dt of 150 V/s, but, as the rise is exponential, the initial dv/dt is higher, being in the region of 450 V/s. The instantaneous generator output resistance is 25 . If the equipment has an additional series resistance of 20 , the total series resistance becomes 45 . The maximum di/dt then can be estimated as 450/45 = 10 A/s. In practice the measured di/dt and protection voltage increase will be lower due to inductive effects and the finite slope resistance of the TISP breakdown region. capacitance off-state capacitance The off-state capacitance of a TISP is sensitive to junction temperature, TJ , and the bias voltage, comprising of the dc voltage, VD , and the ac voltage, Vd . All the capacitance values in this data sheet are measured with an ac voltage of 100 mV. The typical 25C variation of capacitance value with ac bias is shown in Figure 21. When VD >> Vd the capacitance value is independent on the value of Vd . The capacitance is essentially constant over the range of normal telecommunication frequencies. NORMALISED CAPACITANCE vs RMS AC TEST VOLTAGE 1.05 AIXXAA Normalised Capacitance 1.00 0.95 0.90 0.85 0.80 Normalised to Vd = 100 mV 0.75 DC Bias, VD = 0 0.70 1 10 100 1000 Vd - RMS AC Test Voltage - mV Figure 21. PRODUCT INFORMATION 11 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 APPLICATIONS INFORMATION longitudinal balance Figure 22 shows a three terminal TISP with its equivalent "delta" capacitance Each capacitance, CTG , CRG and CTR , is the true terminal pair capacitance measured with a three terminal or guarded capacitance bridge. If wire R is biased at a larger potential than wire T then CTG > CRG . Capacitance CTG is equivalent to a capacitance of CRG in parallel with the capacitive difference of (CTG - C RG ). The line capacitive unbalance is due to (C TG - C RG ) and the capacitance shunting the line is CTR + CRG/2 . Figure 22. All capacitance measurements in this data sheet are three terminal guarded to allow the designer to accurately assess capacitive unbalance effects. Simple two terminal capacitance meters (unguarded third terminal) give false readings as the shunt capacitance via the third terminal is included. PRODUCT 12 INFORMATION TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 MECHANICAL DATA D008 plastic small-outline package This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. D008 Designation per JEDEC Std 30: PDSO-G8 5,00 (0.197) 4,80 (0.189) 8 7 6 5 1 2 3 4 6,20 (0.244) 5,80 (0.228) 4,00 (0.157) 3,81 (0.150) 7 NOM 3 Places 1,75 (0.069) 1,35 (0.053) 0,50 (0.020) x 45NOM 0,25 (0.010) 0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) 7 NOM 4 Places 0,51 (0.020) 0,36 (0.014) 8 Places Pin Spacing 1,27 (0.050) (see Note A) 6 Places 5,21 (0.205) 4,60 (0.181) 0,229 (0.0090) 0,190 (0.0075) 4 4 1,12 (0.044) 0,51 (0.020) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. B. C. D. Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within 0,051 (0.002). PRODUCT MDXXAA INFORMATION 13 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 MECHANICAL DATA P008 plastic dual-in-line package This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions The package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the board during soldering. Leads require no additional cleaning or processing when used in soldered assembly. P008 Designation per JEDEC Std 30: PDIP-T8 10,2 (0.400) MAX 8 7 6 5 Index Dot C L 1 2 3 C L 7,87 (0.310) 7,37 (0.290) T.P. 4 6,60 (0.260) 6,10 (0.240) 1,78 (0.070) MAX 4 Places 5,08 (0.200) MAX Seating Plane 0,51 (0.020) MIN 3,17 (0.125) MIN 2,54 (0.100) T.P. 6 Places (see Note A) 0,533 (0.021) 0,381 (0.015) 8 Places 105 90 8 Places 0,36 (0.014) 0,20 (0.008) 8 Places ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTE A: Each pin centerline is located within 0,25 (0.010) of its true longitudinal position PRODUCT 14 INFORMATION MDXXABA TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 MECHANICAL DATA SL003 3-pin plastic single-in-line package This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. SL003 4,57 (0.180) MAX 10,2 (0.400) MAX 6,60 (0.260) 6,10 (0.240) 8,31 (0.327) MAX Index Dot 12,9 (0.492) MAX 4,267 (0.168) MIN 1 1,854 (0.073) MAX 2 3 Pin Spacing 2,54 (0.100) T.P. (see Note A) 2 Places 0,356 (0.014) 0,203 (0.008) 3 Places 0,711 (0.028) 0,559 (0.022) 3 Places ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position. B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane. PRODUCT MDXXAD INFORMATION 15 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 MECHANICAL DATA D008 tape dimensions D008 Package (8 pin SOIC) Single-Sprocket Tape 4,10 3,90 8,05 7,95 1,60 1,50 2,05 1,95 0,40 0,8 MIN. 5,55 5,45 6,50 6,30 Direction of Feed Embossment Cover 0 MIN. o 1,5 MIN. Carrier Tape 12,30 11,70 Tape 2,2 2,0 ALL LINEAR DIMENSIONS IN MILLIMETERS NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter: Reel hub diameter: Reel axial hole: 330 +0,0/-4,0 mm 100 2,0 mm 13,0 0,2 mm B. 2500 devices are on a reel. PRODUCT 16 INFORMATION MDXXAT TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 IMPORTANT NOTICE Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except as mandated by government requirements. PI accepts no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS. Copyright (c) 1997, Power Innovations Limited PRODUCT INFORMATION 17