TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
PRODUCT INFORMATION
1
SEPTEMBER 1993 - REVISED SEPTEMBER 1997Copyright © 1997, Power Innovations Limited, UK
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
TELECOMMUNICATION SYSTEM SECONDARY PROTECTION
●Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
●Planar Passivated Junctions
Low Off-State Current<10 µA
●Rated for International Surge Wave Shapes
●Surface Mount and Through-Hole Options
●UL Recognized, E132482
description
These dual asymmetrical transient voltage
suppressors are designed for the overvoltage
protection of ICs used for the SLIC (Subscriber
Line Interface Circuit) function. The IC line driver
section is typically powered with 0V and a
negative supply. The TISP1xxxF3 limits voltages
that exceed these supply rails and is offered in
two voltage variants to match typical negative
supply voltage values.
High voltages can occur on the line as a result of
exposure to lightning strikes and a.c. power
surges. Negative transients are initially limited by
breakdown clamping until the voltage rises to the
DEVICEVDRM
V
V(BO)
V
‘1072F3- 58- 72
‘1082F3- 66- 82
WAVE SHAPESTANDARDITSP
A
2/10µsFCC Part 6880
8/20µsANSI C62.4170
10/160µsFCC Part 6860
10/560µsFCC Part 6845
0.5/700 µsRLM 8838
10/700µsFTZ R12
VDE 0433
CCITT IX K17/K20
50
50
50
10/1000µsREA PE-6035
PACKAGEPART # SUFFIX
Small-outlineD
Small-outline taped
and reeledDR
Plastic DIP P
Single-in-lineSL
breakover level, which causes the device to
crowbar. The high crowbar holding current
prevents d.c. latchup as the current subsides.
Positive transients are limited by diode forward
conduction. These protectors are guaranteed to
suppress and withstand the listed international
lightning surges on any terminal pair
device symbol
D PACKAGE
(TOP VIEW)
P PACKAGE
(TOP VIEW)
SL PACKAGE
(TOP VIEW)
MDXXAE
1
2
3
4 5
6
7
8G
G
G
G
NC
T
R
NC
NC - No internal connection
1
2
3
4 5
6
7
8
R
G
T
G
T
G
G
R
Specified T terminal ratings require connection of pins 1 and 8.
Specified R terminal ratings require connection of pins 4 and 5.
MDXXAF
1
2
3
T
G
RMDXXAG MD1XAA
G
TR
SD1XAA
Terminals T, R and G correspond to the
alternative line designators of A, B and C
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
2
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
PRODUCT INFORMATION
description (continued)
These monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and
matched breakover control and are virtually transparent to the system in normal operation
The small-outline 8-pin assignment has been carefully chosen for these devices to maximise the inter-pin
clearance and creepage distances which are used by standards (e.g. IEC950) to establish voltage withstand
ratings.
absolute maximum ratings
NOTES: 1. Further details on surge wave shapes are contained in the Applications Information section.
2. Initially the TISP must be in thermal equilibrium with 0°C<TJ<70°C. The surge may be repeated after the TISP returns to its initial
conditions.
3. Above 70°C, derate linearly to zero at 150°C lead temperature.
NOTE 4: Further details on capacitance are given in the Applications Information section.
RATINGSYMBOLVALUEUNIT
Repetitive peak off-state voltage( 0°C<TJ<70°C)‘1072F3
‘1082F3VDRM-58
-66V
Non-repetitive peak on-state pulse current(see Notes 1, 2 and 3)
ITSPA
1/2 µs(Gas tube differential transient, open-circuit voltage wave shape 1/2µs)120
2/10µs(FCC Part 68, open-circuit voltage wave shape 2/10µs)80
8/20µs(ANSI C62.41, open-circuit voltage wave shape 1.2/50µs)70
10/160µs(FCC Part 68, open-circuit voltage wave shape 10/160µs)60
5/200 µs(VDE 0433, open-circuit voltage wave shape 2kV, 10/700µs)50
0.2/310µs(RLM 88, open-circuit voltage wave shape 1.5kV, 0.5/700µs)38
5/310 µs(CCITT IX K17/K20, open-circuit voltage wave shape 2kV, 10/700µs)50
5/310 µs(FTZ R12, open-circuit voltage wave shape 2kV, 10/700µs)50
10/560µs(FCC Part 68, open-circuit voltage wave shape 10/560µs)45
10/1000 µs(REA PE-60, open-circuit voltage wave shape 10/1000µs)35
Non-repetitive peak on-state current(see Notes 2 and 3)D PackageITSM
4A rms
50 Hz,1sP Package 6
SL Package 6
Initial rate of rise of on-state current,Linear current ramp, Maximum ramp value <38 AdiT/dt250A/µs
Junction temperatureTJ-40 to +150°C
Storage temperature rangeTstg-40 to +150°C
electrical characteristics for the T and R terminals, 25°C (unless otherwise noted)
PARAMETERTEST CONDITIONSTISP1072F3TISP1082F3UNIT
MINTYPMAXMINTYPMAX
IDRMRepetitive peak off-
state currentVD=±VDRM, 0°C<TJ<70°C±10±10µA
IDOff-state currentVD=±50V±10±10µA
CoffOff-state capacitancef=100kHz,Vd=100mV
VD=0
(see Note 4)
D Package0.080.50.080.5 pF
P Package0.060.40.060.4 pF
SL Package0.020.30.020.3 pF
3
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
PRODUCT INFORMATION
NOTE 5: Further details on capacitance are given in the Applications Information section.
electrical characteristics for the T and G and R and G terminals, 25°C (unless otherwise noted)
PARAMETERTEST CONDITIONSTISP1072F3TISP1082F3UNIT
MINTYPMAXMINTYPMAX
IDRMRepetitive peak off-
state currentVD=VDRM, 0°C<TJ<70°C-10-10 µA
V(BO)Breakover voltagedv/dt=-250V/ms,RSOURCE=300Ω-72-82V
V(BO)Impulse breakover volt-
agedv/dt=-1000V/µs,RSOURCE=50Ω,
di/dt<-20A/µs-78-92V
I(BO)Breakover currentdv/dt=-250V/ms,RSOURCE=300Ω-0.1-0.6-0.1-0.6A
VFRMPeak forward recovery
voltagedv/dt=1000V/µs,RSOURCE=50 Ω,
diF/dt<20 A/µs3.33.3V
VFForward voltageIT=5A,tW=100 µs3 3 V
VTOn-state voltageIT=-5A,tW=100µs-3-3V
IHHolding currentdi/dt=+30mA/ms-0.15-0.15A
dv/dtCritical rate of rise of
off-state voltageLinear voltage ramp
Maximum ramp value<0.85VDRM-5-5kV/µs
IDOff-state currentVD=-50V-10-10 µA
CoffOff-state capacitancef=100kHz,Vd=100mV
Third terminal voltage=0
(see Note 5)
VD=0,150240130240 pF
VD=-5V6510455104 pF
VD=-50V30482548 pF
thermal characteristics
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
RθJAJunction to free air thermal resistancePtot=0.8W,TA=25°C
5cm2, FR4 PCB
D Package160°C/WP Package100
SL Package105
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
4
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
PRODUCT INFORMATION
PARAMETER MEASUREMENT INFORMATION
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINALS R AND G OR T AND G
Figure 2. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINALS R AND T
-v
I(BR)
V(BR)
V(BR)M
VDRM
IDRM
VD
IH
IT
VT
ITSM
ITSP
V(BO)
I(BO)
ID
Quadrant I
Forward
Conduction
Characteristic
+v
+i
IF
VF
ITSM
ITSP
-i
Quadrant III
Switching
Characteristic PMXXAC
-v
I(BR)
V(BR)
V(BR)M
VDRM
IDRM
VD
IH
IT
VT
ITSM
ITSP
V(BO)
I(BO)
ID
Quadrant I
Switching
Characteristic
+v
+i
V(BO)
I(BO)
I(BR)
V(BR)
V(BR)M
VDRM
IDRM
VD
ID
IH
IT
VT
ITSM
ITSP
-i
Quadrant III
Switching
Characteristic PMXXAA
5
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
PRODUCT INFORMATION
TYPICAL CHARACTERISTICS
R and G, or T and G terminals
Figure 3. Figure 4.
Figure 5. Figure 6.
OFF-STATE CURRENT
TJ - Junction Temperature - °C
-25 0 25 50 75 100 125 150
ID - Off-State Current - µA
0·001
0·01
0·1
1
10
100 TC1LAF
JUNCTION TEMPERATURE
vs
VD = -50 V
BREAKDOWN VOLTAGES
T
J
- Junction Temperature - °C
-25 0 25 50 75 100 125 150
Negat ve Breakdown Vo tages - V
60.0
70.0
80.0
TC1LAL
JUNCTION TEMPERATURE
vs
V(BO)
V(BR)
V(BR)
V(BO)
V(BR)M
V(BR)M
I(BR) = 1 mA
'1072F3
'1082F3
ON-STATE CURRENT
VT - On-State Voltage - V
2 3 4 5 6 7 8 91 10
I
T
- On-State Current - A
1
10
100 TC1LAC
ON-STATE VOLTAGE
vs
-40°C150°C
25°C
FORWARD CURRENT
VF - Forward Voltage - V
2 3 4 5 6 7 8 91 10
I
F
- Forward Current - A
1
10
100 TC1LAE
FORWARD VOLTAGE
vs
-40°C
150°C
25°C
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
6
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
PRODUCT INFORMATION
TYPICAL CHARACTERISTICS
R and G, or T and G terminals
Figure 7. Figure 8.
Figure 9. Figure 10.
HOLDING CURRENT & BREAKOVER CURRENT
TJ - Junction Temperature - °C
-25 0 25 50 75 100 125 150
IH, I(BO) - Holding Current, Breakover Current - A
0·07
0·08
0·09
0·1
0·2
0·3
0·4
0·5
0·6
0·7
0·8
0·9
1·0TC1LAD
JUNCTION TEMPERATURE
vs
I(BO)
IH
NORMALISED BREAKOVER VOLTAGE
di/dt - Rate of Rise of Principle Current - A/µs
0·001 0·01 0·1 1 10 100
Normalised Breakover Voltage
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0TC1LAG
RATE OF RISE OF PRINCIPLE CURRENT
vs
PEAK FORWARD RECOVERY VOLTAGE
di/dt - Rate of Rise of Principle Current - A/µs
0·001 0·01 0·1 1 10 100
V
FRM
- Peak Forward Recovery Voltage - V
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0TC1LAH
RATE OF RISE OF PRINCIPLE CURRENT
vs OFF-STATE CAPACITANCE
R or T Terminal Voltage (Negative) - V
0·1 1 10
Off-State Capacitance - pF
10
100
TC1LAJ
50
R or T TERMINAL VOLTAGE (NEGATIVE)
vs
'1072F3
'1082F3
200
Third Terminal = 0 to -50 V
7
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
PRODUCT INFORMATION
TYPICAL CHARACTERISTICS
R and G, or T and G terminals
Figure 11. Figure 12.
Figure 13.
OFF-STATE CAPACITANCE
R or T Terminal Voltage (Positive) - V
0·01 0·1
Off-State Capacitance - pF
150
200
100
TC1LAK
R or T TERMINAL VOLTAGE (POSITIVE)
vs
200
0·3
'1072F3
'1082F3
Third Terminal = 0 to -50 V
OFF-STATE CAPACITANCE
T
J
- Junction Temperature - °C
-25 0 25 50 75 100 125 150
Off-State Capacitance - pF
10
100
TC1LAB
JUNCTION TEMPERATURE
vs
500
Terminal Bias = 0
Terminal Bias = -50 V
'1072F3
'1082F3
'1072F3
'1082F3
Third Terminal = 0 to -50 V
SURGE CURRENT
Decay Time - µs
10 100 1000
Maximum Surge Current - A
10
100
1000 TC1LAA
vs
DECAY TIME
2
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
8
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
PRODUCT INFORMATION
TYPICAL CHARACTERISTICS
R and T terminals
Figure 14. Figure 15.
Figure 16. Figure 17.
OFF-STATE CURRENT
TJ - Junction Temperature - °C
-25 0 25 50 75 100 125 150
I
D
- Off-State Current - µA
0·001
0·01
0·1
1
10
100 TC1LAN
JUNCTION TEMPERATURE
vs
VD = ±50 V
BREAKDOWN VOLTAGES
T
J
- Junction Temperature - °C
-25 0 25 50 75 100 125 150
Breakdown Vo tages - V
60.0
70.0
80.0
90.0TC1LAM
JUNCTION TEMPERATURE
vs
I(BR) = 1 mA
'1072F3
'1082F3
V(BR)
V(BO)
V(BR)M
V(BO)
V(BR)
V(BR)M
HOLDING CURRENT & BREAKOVER CURRENT
TJ - Junction Temperature - °C
-25 0 25 50 75 100 125 150
I
H
, I
(BO)
- Holding Current, Breakover Current - A
0·07
0·08
0·09
0·1
0·2
0·3
0·4
0·5
0·6
0·7
0·8
0·9
1·0TC1LAO
JUNCTION TEMPERATURE
vs
I(BO)
IH
NORMALISED BREAKOVER VOLTAGE
di/dt - Rate of Rise of Principle Current - A/µs
0·001 0·01 0·1 1 10 100
Normalised Breakover Voltage
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0TC1LAI
RATE OF RISE OF PRINCIPLE CURRENT
vs
9
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
PRODUCT INFORMATION
THERMAL INFORMATION
TYPICAL CHARACTERISTICS
R and T terminals
Figure 18.
Figure 19. Figure 20.
OFF-STATE CAPACITANCE
Terminal Voltage - V
0·1 1 10
Off-State Capacitance - fF
20
30
40
50
60
70
80
90
10
100 TC1LAP
50
TERMINAL VOLTAGE
vs
Both Voltage Polarities
D Package
P Package
SL Package
VG > VR or VT
MAXIMUM NON-RECURRING 50 Hz CURRENT
t - Current Duration - s
0·1 1 10 100 1000
I
TRMS
- Maximum Non-Recurrent 50 Hz Current - A
1
10
vs
CURRENT DURATIONTI1LAA
VGEN = 250 Vrms
RGEN = 10 to 150 ΩΩ
D Package
SL Package
P Package
THERMAL RESPONSE
t - Power Pulse Duration - s
0·0001 0·001 0·01 0·1 1 10 100 1000
Z
θ
θJΑ
Α
- Transient Thermal Impedance - °C/W
1
10
100
D PackageP Package
SL Package
TI1MAA
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
10
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
PRODUCT INFORMATION
APPLICATIONS INFORMATION
electrical characteristics
The electrical characteristics of a TISP are strongly dependent on junction temperature, TJ. Hence a
characteristic value will depend on the junction temperature at the instant of measurement. The values given
in this data sheet were measured on commercial testers, which generally minimise the temperature rise
caused by testing. Application values may be calculated from the parameters’ temperature coefficient, the
power dissipated and the thermal response curve ,Zθ(see M. J. Maytum, "Transient Suppressor Dynamic
Parameters."TI Technical Journal, vol. 6, No. 4, pp.63-70, July-August 1989).
lightning surge
wave shape notation
Most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an
exponential rise and an exponential decay. Wave shapes are classified in terms of peak amplitude (voltage
or current), rise time and a decay time to 50% of the maximum amplitude. The notation used for the wave
shape is amplitude, risetime/decay time. A 50A,5/310µs wave shape would have a peak current value of
50 A, a rise time of 5µs and a decay time of 310µs. The TISP surge current graph comprehends the wave
shapes of commonly used surges.
generators
There are three categories of surge generator type, single wave shape, combination wave shape and circuit
defined. Single wave shape generators have essentially the same wave shape for the open circuit voltage
and short circuit current (e.g. 10/1000µs open circuit voltage and short circuit current). Combination
generators have two wave shapes, one for the open circuit voltage and the other for the short circuit current
(e.g. 1.2/50µs open circuit voltage and 8/20µs short circuit current) Circuit specified generators usually
equate to a combination generator, although typically only the open circuit voltage waveshape is referenced
(e.g. a 10/700µs open circuit voltage generator typically produces a 5/310µs short circuit current). If the
combination or circuit defined generators operate into a finite resistance the wave shape produced is
intermediate between the open circuit and short circuit values.
current rating
When the TISP switches into the on-state it has a very low impedance. As a result, although the surge wave
shape may be defined in terms of open circuit voltage, it is the current wave shape that must be used to
assess the required TISP surge capability. As an example, the CCITT IX K17 1.5kV, 10/700µs surge is
changed to a 38A, 5/310µs waveshape when driving into a short circuit. Thus the TISP surge current
capability, when directly connected to the generator, will be found for the CCITTIXK17 waveform at 310µs
on the surge graph and not 700µs. Some common short circuit equivalents are tabulated below:
Any series resistance in the protected equipment will reduce the peak circuit current to less than the
generators’ short circuit value. A 2kV open circuit voltage, 50A short circuit current generator has an
effective output impedance of 40Ω (2000/50). If the equipment has a series resistance of 25Ω then the
surge current requirement of the TISP becomes 31A (2000/65) and not 50A.
STANDARDOPEN CIRCUIT
VOLTAGESHORT CIRCUIT
CURRENT
CCITT IX K171.5kV, 10/700µs38 A, 5/310µs
CCITT IX K20 1 kV, 10/700µs25 A, 5/310µs
RLM881.5kV, 0.5/700µs38 A, 0.2/310µs
VDE 04332.0kV, 10/700µs50 A, 5/200µs
FTZ R122.0kV, 10/700µs50 A, 5/310µs
11
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
PRODUCT INFORMATION
APPLICATIONS INFORMATION
protection voltage
The protection voltage, (V(BO)), increases under lightning surge conditions due to thyristor regeneration.
This increase is dependent on the rate of current rise, di/dt, when the TISP is clamping the voltage in its
breakdown region. The V(BO) value under surge conditions can be estimated by multiplying the 50Hz rate
V(BO)(250V/ms) value by the normalised increase at the surge’s di/dt (Figure 8.) . An estimate of the di/dt
can be made from the surge generator voltage rate of rise, dv/dt, and the circuit resistance.
As an example, the CCITT IX K17 1.5 kV, 10/700µs surge has an average dv/dt of 150V/µs, but, as the rise
is exponential, the initial dv/dt is higher, being in the region of 450V/µs. The instantaneous generator output
resistance is 25Ω. If the equipment has an additional series resistance of 20Ω, the total series resistance
becomes 45Ω. The maximum di/dt then can be estimated as 450/45=10 A/µs. In practice the
measureddi/dt and protection voltage increase will be lower due to inductive effects and the finite slope
resistance of the TISP breakdown region.
capacitance
off-state capacitance
The off-state capacitance of a TISP is sensitive to junction temperature, TJ, and the bias voltage, comprising
of the dc voltage, VD, and the ac voltage, Vd. All the capacitance values in this data sheet are measured
with an ac voltage of 100mV. The typical 25°C variation of capacitance value with ac bias is shown in Figure
21. When VD>> Vd the capacitance value is independent on the value of Vd. The capacitance is essentially
constant over the range of normal telecommunication frequencies.
Figure 21.
NORMALISED CAPACITANCE
Vd - RMS AC Test Voltage - mV
1 10 100 1000
Normalised Capacitance
0.70
0.75
0.80
0.85
0.90
0.95
1.00
1.05 AIXXAA
Normalised to Vd = 100 mV
DC Bias, VD = 0
RMS AC TEST VOLTAGE
vs
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
12
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
PRODUCT INFORMATION
APPLICATIONS INFORMATION
longitudinal balance
Figure 22 shows a three terminal TISP with its equivalent "delta" capacitance Each capacitance, CTG, CRG
and CTR, is the true terminal pair capacitance measured with a three terminal or guarded capacitance bridge.
If wire R is biased at a larger potential than wire T then CTG>CRG. Capacitance CTG is equivalent to a
capacitance of CRG in parallel with the capacitive difference of (CTG-CRG). The line capacitive unbalance is
due to (CTG-CRG) and the capacitance shunting the line is CTR+CRG/2.
Figure 22.
All capacitance measurements in this data sheet are three terminal guarded to allow the designer to
accurately assess capacitive unbalance effects. Simple two terminal capacitance meters (unguarded third
terminal) give false readings as the shunt capacitance via the third terminal is included.
13
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
PRODUCT INFORMATION
D008
plastic small-outline package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
MECHANICAL DATA
5,21 (0.205)
4,60 (0.181)
NOTES: A. Leads are within 0,25 (0.010) radius of true position at maximum material condition.
B. Body dimensions do not include mold flash or protrusion.
C. Mold flash or protrusion shall not exceed 0,15 (0.006).
D. Lead tips to be planar within ±0,051 (0.002).
1,75 (0.069)
1,35 (0.053)
6,20 (0.244)
5,80 (0.228)
5,00 (0.197)
4,80 (0.189)
D008
8765
432
1
4,00 (0.157)
3,81 (0.150)
7° NOM
3 Places
7° NOM
4 Places
0,51 (0.020)
0,36 (0.014)
8 Places
Pin Spacing
1,27 (0.050)
(see Note A)
6 Places
1,12 (0.044)
0,51 (0.020)
4° ± 4°
0,79 (0.031)
0,28 (0.011)
0,203 (0.008)
0,102 (0.004)
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
Designation per JEDEC Std 30:
PDSO-G8
0,50 (0.020)
0,25 (0.010) x 45°NOM
0,229 (0.0090)
0,190 (0.0075)
MDXXAA
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
14
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
PRODUCT INFORMATION
P008
plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions The package is intended for
insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are compressed and inserted,
sufficient tension is provided to secure the package in the board during soldering. Leads require no
additional cleaning or processing when used in soldered assembly.
MECHANICAL DATA
1 2 3 4
87 6 5
10,2 (0.400) MAX
Index
Dot
1,78 (0.070) MAX
4 Places
5,08 (0.200)
MAX
0,51 (0.020)
MIN
2,54 (0.100) T.P.
6 Places
(see Note A)
0,533 (0.021)
0,381 (0.015)
8 Places
3,17 (0.125)
MIN
Seating
Plane
0,36 (0.014)
0,20 (0.008)
8 Places
105°
90°
8 Places
6,60 (0.260)
6,10 (0.240)
7,87 (0.310)
7,37 (0.290)
T.P.
C
LC
L
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
P008 Designation per JEDEC Std 30:
PDIP-T8
NOTE A: Each pin centerline is located within 0,25 (0.010) of its true longitudinal position
MDXXABA
15
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
PRODUCT INFORMATION
SL003
3-pin plastic single-in-line package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
MECHANICAL DATA
NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane.
1,854 (0.073) MAX
0,711 (0.028)
0,559 (0.022)
3 Places
1 2 3
Pin Spacing
2,54 (0.100) T.P.
(see Note A)
2 Places
12,9 (0.492)
MAX
4,57 (0.180)
MAX
6,60 (0.260)
6,10 (0.240)
0,356 (0.014)
0,203 (0.008)
3 Places
SL003
10,2 (0.400) MAX
8,31 (0.327)
MAX
4,267 (0.168)
MIN
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
Index
Dot
MDXXAD
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
16
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
PRODUCT INFORMATION
D008
tape dimensions
MECHANICAL DATA
D008 Package (8 pin SOIC) Single-Sprocket Tape
ALL LINEAR DIMENSIONS IN MILLIMETERS
6,30
6,50
11,70
12,305,45
5,55
1,50
1,60
3,90
4,10
7,95
8,05 1,95
2,05
0,8 MIN.
0 MIN.
0,40
2,0
2,2
Direction of Feed
ø 1,5 MIN.
Carrier Tape
Embossment
Cover
Tape
MDXXAT
NOTES: A. Taped devices are supplied on a reel of the following dimensions:-
Reel diameter: 330 +0,0/-4,0 mm
Reel hub diameter: 100 ±2,0 mm
Reel axial hole: 13,0 ±0,2 mm
B. 2500 devices are on a reel.
17
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
TISP1072F3, TISP1082F3
DUAL ASYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
PRODUCT INFORMATION
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any
semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the
information being relied on is current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI
deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except as mandated by government requirements.
PI accepts no liability for applications assistance, customer product design, software performance, or infringement
of patents or services described herein. Nor is any license, either express or implied, granted under any patent
right, copyright, design right, or other intellectual property right of PI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE
SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright © 1997, Power Innovations Limited
