74LCXZ16244MTDX - Fairchild - Datasheet.Directory

September 2000

Revised June 2005

74LCXZ162244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Out puts and 26: Series Resistors

in the Outputs

74LCXZ162244

Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant

Inputs/Outputs and 26: Series Resistors in the Outputs

General Descript ion

The LCXZ162244 contains sixteen non-inverting buffers

with 3-STATE outputs designed to be employed as a mem-

ory and addre ss driver, cl ock driver, or bus oriented t rans-

mitter/receiver . The device is nibble controlled. Each nibble

has separate 3- S TAT E con tro l inputs which can be sh ort ed

together for full 16-bit operation.

When VCC is between 0 and 1.5V, the LCXZ162244 is in

the hig h imped ance state duri ng p ower up or po wer do wn.

this places the outputs in the high impedance (Z) state pre-

venting intermittent low impedance loading or glitching in

bus oriente d applic a tion s.

The LCXZ162244 is designed for low voltage (2.7V or

3.3V) VCC applications with capability of interfacing to a 5V

signal environment.

In additio n the outputs include 26

(nomina l) series resis-

tors to reduce overshoot and undershoot and are designed

to sink/source 12 mA at VCC

3.0V.

The LCXZ162244 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing CMOS low power dissipation.

Features

■5V tolerant inputs and outputs

■Guaranteed power up/down high impedance

■Supports live insertion/withdrawal

■Outputs have equivalent 26

series resistors

■2.7V–3.6V VCC specifications provided

■5.3 ns tPD max (VCC

3.0V), 20

A ICC max

■

12 mA output drive (VCC

3.0V)

■Implements patented noise/EMI reduction circuitry

■Latch-up per for man c e exce eds 500 mA

■ESD performa nce :

Human body model

2000V

Machine model

200V

Ordering Code:

Note 1: Use this Order Number to receive devices in Tape and Reel.

Orde r Number Package Package Description

Number

74LCXZ162244MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

[TUBES]

74LCXZ162244MEX

(Note 1) MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

[TAPE and REEL]

74LCXZ162244MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

[TUBES]

74LCXZ162244MTX

(Note 1) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

[TAPE and REEL]

www.fairchildsemi.com 2

74LCXZ162244

Connection Diagram Logic Symbol

Pin Descriptions

Truth Tables

HIGH Voltage Level

LOW Voltag e Level

Immaterial

High Impeda nc e

Functional Description

The LCXZ162244 contains sixteen non-inverting buffers

with 3-STATE standard outputs. The device is nibble

(4 bits) controlled with each nibble functioning identically,

but independent of the other. The control pins can be

shorted together to obtain full 16-bit operation. The

3-STATE outputs are controlled by an Output Enable (OEn)

input for each nibble. When OEn is LOW, the outputs are in

2-state mode. When OEn is HIGH, the outputs are in the

high impedance mode, but this does not interfere with

entering new data into the inputs.

Logic Diagram

Pin Names Description

OEnOutput Enable Input (Active LOW)

I0–I15 Inputs

O0–O15 Outputs

Inputs Outputs Inputs Outputs

OE1I0–I3O0–O3OE3I8–I11 O8–O11

LL L LL L

LH H LH H

HX Z HX Z

Inputs Outputs Inputs Outputs

OE2I4–I7O4–O7OE4I12–I15 O12–O15

LL L LL L

LH H LH H

HX Z HX Z

3 www.fairchildsemi.com

74LCXZ162244

Absolute Maximum Ratings(Note 2)

Recommended Operating Conditions (Note 4)

Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated

at these limits. The para metric value s defined in the Elec trical Cha racteristic s tables are n ot guarantee d at the A bsolute Ma ximum R atings . The “Recom-

mended Operating C onditions” table will def ine the conditions f or ac t ual devic e operation.

Note 3: IO Absolu te Maximu m Rating must be observed.

Note 4: Unused input s m ust be he ld H I GH or LOW. They may not f loat.

DC Electrical Characteristics

Symbol Parameter Value Conditions Units

VCC Supply Voltage



0.5 to



7.0 V

VIDC Input Voltage



0.5 to



7.0 V

VODC Output Voltage



0.5 to



7.0 Output in 3-STATE or VCC

0–1.5V V



0.5 to VCC



0.5 Output in HIGH or LOW State (Note 3)

IIK DC Input Diode Current



50 VI



GND mA

IOK DC Output Diode Current



50 VO



GND mA



50 VO

VCC

IODC Output Source/Sink Current

50 mA

ICC DC Supply Current per Supply Pin

100 mA

IGND DC Ground Current per Ground Pin

100 mA

TSTG Storage Temper ature



65 to



150

Symbol Parameter Min Max Units

VCC Supply Voltage Operating 2.7 3.6 V

VIInput Voltage 05.5V

VOOutput Voltage HIGH or LOW State 0 VCC V

3-STATE 0 5.5

IOH/IOL Output Curr en t VCC

3.0V



3.6V

12 mA

VCC

2.7V



3.0V

TAFree-Air Operating Temperature



40 85

V Input Edge Rate, VIN

0.8V–2.0V, VCC

3.0V 0 10 ns/V

Symbol Parameter Conditions VCC TA



C to



CUnits

(V) Min Max

VIH HIGH Level Input Voltage 2.7



3.6 2.0 V

VIL LOW Level Input Voltage 2.7



3.6 0.8 V

VOH HIGH Level Output Voltage IOH



100

A2.7



3.6 VCC



0.2

IOH



4 mA 2.7 2.2

IOH



6 mA 3.0 2.4

IOH



8 mA 2.7

IOH



12 mA 3.0 2.0

VOL LOW Level Output Voltage IOL

100

A2.7



3.6 0.2

IOL

4 mA 2.7 0.4

IOL

6 mA 3.0 0.55

IOL

8 mA 2.7 0.6

IOL

12 mA 3.0 0.8

IIInput Leakage Current 0

5.5V 2.7



3.6

5.0

IOZ 3-STATE Output Leakage 0

5.5V 2.7



3.6

5.0

VIH or VIL

IOFF Power-Off Leakage Current VI or VO

5.5V 0 10

IPU/PD Power Up/Down VO

0.5V to VCC 0



1.5

5.0

3-STATE Output Current VI

GND or VCC

ICC Quiescent Supply Current VI

VCC or GND 2.7



3.6 225

3.6V

VI, VO

5.5V (Note 5) 2.7



3.6

225

ICC Increase in ICC per Input VIH

VCC



0.6V 2.7



3.6 500

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74LCXZ162244

DC Electrical Characteristics (Continued)

Note 5: Outputs disabled or 3-STAT E only.

AC Electrical Characteristics

Note 6: Skew is de fi ned as th e absolut e valu e of the difference betwee n t he ac tu al propaga t ion delay f or any t w o separa t e outputs of t he same device. The

specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (t OSLH). Parameter guaranteed by design.

Dynamic Switching Characteristics

Capacitance

Symbol Parameter



C to



C, RL

500

Units

VCC

3.3V

0.3V VCC

2.7V

50 pF CL

50 pF

Min Max Min Max

tPHL Propagation Delay 1.0 5.3 1.0 6.0 ns

tPLH Data to Output 1.0 5.3 1.0 6.0

tPZL Output Enable Time 1.0 6.3 1.0 7.1 ns

tPZH 1.0 6.3 1.0 7.1

tPLZ Output Disable Time 1.0 5.4 1.0 5.7 ns

tPHZ 1.0 5.4 1.0 5.7

tOSHL Output to Output Skew (Note 6) 1.0 ns

tOSLH 1.0

Symbol Parameter Conditions VCC TA

CUnits

(V) Typical

VOLP Quiet Output Dynamic Peak VOL CL

50 pF, VIH

3.3V, VIL

0V 3.3 0.8 V

VOLV Quiet Output Dynamic Valley VOL CL

50 pF, VIH

3.3V, VIL

0V 3 .3



0.8 V

Symbol Parameter Conditions Typical Units

CIN Input Capacitance VCC

Open, VI

0V or VCC 7pF

COUT Output Capacitance VCC

3.3V, VI

0V or VCC 8pF

CPD Power Dissipation Capacitance VCC

3.3V, VI

0V or VCC, f

10 MHz 20 pF

5 www.fairchildsemi.com

74LCXZ162244

AC LOADING and WAVEFORMS Generic for LCX Family

FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)

Waveform for Inverting and Non-Inverting Functions

Propagation Delay. Pulse W idth and trec Waveforms

3-STATE Output Low Enable and

Disable Times for Logic

3-STATE Output High Enable and

Disable Times for Logic

Setup Time, Hold Time and Recovery Time for Logic

trise and tfall

FIGURE 2. Wav eform s

(Input Characteristics; f =1MHz, tR = tF = 3ns)

VICL

6V for VCC

3.3V, 2.7V 50 pF

VCC * 2 for VCC

2.5V 30 pF

Symbol VCC

3.3V

0.3V 2.7V

Vmi 1.5V 1.5V

Vmo 1.5V 1.5V

VxVOL



0.3V VOL



0.3V

VyVOH



0.3V VOH



0.3V

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74LCXZ162244

Schematic Diagram Generic for LCX Family

7 www.fairchildsemi.com

74LCXZ162244

Physical Dimensions inches (millimeters) unless otherwise noted

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

Package Number MS48A

www.fairchildsemi.com 8

74LCXZ162244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26: Series Resistors

in the Outputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD48

Fairchild does no t assume any responsibility for use of any circui try described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r systems a re devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a lif e supp ort

device or system whose failure to perform can be rea-

sonabl y ex pect ed to cause the fa ilu re of the li fe su pp ort

device or system, or to affect its safety or effectiveness.