ISL55004IBZ-T7 - Intersil Corporation

FN6219.2

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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ISL55004

High Supply Voltage 200MHz Unity-Gain

Stable Operational Amplifier

The ISL55004 is a high speed, low power, low cost

monolithic operational amplifier. The ISL55004 is unity-gain

stable and features a 300V/µs slew rate and 200MHz

bandwidth while requiring only 8.5mA of supply current per

amplifier.

The power supply operating range of the ISL 55004 is from

±15V down to ±2.5V. For single-supply operation, the

ISL55004 operates from 30V down to 5V.

The ISL55004 also features an extremely wide output

voltage swing of -12.75V/+13.4V with VS = ±15V and

RL=1kΩ.

At a gain of +1, the ISL55004 has a -3dB bandwidth of

200MHz with a phase margin of 55°. Because of its

conventional voltage-feedback topology, the ISL55004 allow

the use of reactive or non-linear elements in its feedback

network. This versatility combined with low cost and 140mA

of output-current drive makes the ISL55004 an ideal choice

for price-sensitive applications requiring low power and high

speed.

The ISL55004 is in a 14 Ld SO (0.150”) package and

specified for operation over the full -40°C to +85°C

temperature range.

Features

• 200MHz -3dB bandwidth

• Unity-gain stable

• Low supply current: 8.5mA per amplifier

• Wide supply range: ±2.5V to ±15V dual-supply and 5V to

30V single-supply

• High slew rate: 300V/µs

• Fast settling: 75ns to 0.1% for a 10V step

• Wide output voltage swing: -12.75V/+13.4V with

VS= ±15V, RL=1kΩ

• Enhanced replacement for EL2444

• Pb-free plus anneal available (RoHS compliant)

Applications

• Video amplifiers

• Single-supply amplifiers

• Active filters/integr ators

• High speed sample-and-hold

• High speed signal processing

• ADC/DAC buffers

• Pulse/RF amplifiers

• Pin diode receivers

• Log amplifiers

• Photo multiplier amplifiers

• Difference amplifiers

Ordering Information

PART NUMBER PART

MARKING

TAPE

REEL PACKAGE PKG.

DWG. #

ISL55004IB 55004IB - 14 Ld SO (0.150”) MDP0027

ISL55004IB-T7 55004IB 7” 14 Ld SO (0.150”) MDP0027

ISL55004IB-T13 55004IB 13” 14 Ld SO (0.150”) MDP0027

ISL55004IBZ

(See Note) 55004IBZ - 14 Ld SO (0.150”)

(Pb-Free) MDP0027

ISL55004IBZ-T7

(See Note) 55004IBZ 7” 14 Ld SO (0.150”)

(Pb-Free) MDP0027

ISL55004IBZ-T13

(See Note) 55004IBZ 13” 14 Ld SO (0.150”)

(Pb-Free) MDP0027

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and

compatible with both SnPb and Pb-free soldering operations. Intersil

Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

Pinout ISL55004

[14 LD SO (0.150”)]

TOP VIEW

OUT1

IN1-

IN1+

VS+

IN2+

IN2-

OUT2

OUT4

IN4-

IN4+

VS-

IN3+

IN3-

OUT3

-+ -+

Data Sheet July 27, 2006

2FN6219.2

July 27, 2006

Absolute Maximum Ratings (TA = 25° C)

Supply Voltage (VS). . . . . . . . . . . . . . . . . . . . . . . . . . ±16.5V or 33V

Input Voltage (VIN). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±VS

Differential Input Voltage (dVIN). . . . . . . . . . . . . . . . . . . . . . . . .±10V

Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA

Power Dissipation (PD) . . . . . . . . . . . . . . . . . . . . . . . . . See Curves

Operating Temperature Range (TA). . . . . . . . . . . . . .-40°C to +85°C

Operating Junction Temperature (TJ) . . . . . . . . . . . . . . . . . .+150°C

Storage Temperature (TST) . . . . . . . . . . . . . . . . . . .-65°C to +150°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests

are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA

DC Electrical Specifications VS = ±15V, AV = +1, RL = 1kΩ, TA = 25°C, unless otherwise specified.

PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT

VOS Input Offset Voltage VS = ±15V 1.2 5 mV

TCVOS Average Offset Voltage Drift (Note 1) 17 µV/°C

IBInput Bias Current VS = ±15V 0.6 3.5 µA

IOS Input Offset Current VS = ±15V 0.2 2 µA

TCIOS Average Offset Current Drift (Note 1) 0.2 nA/°C

AVOL Open-loop Gain VS = ±15V, VOUT = ±10V, RL = 1kΩ12000 21000 V/V

PSRR Power Supply Rejection Ratio VS = ±5V to ±15V 75 100 dB

CMRR Common-mode Rejection Ratio VCM = ±10V, VOUT = 0V 75 90 dB

CMIR Common-mode Input Range VS = ±15V 13 V

VOUT Output Voltage Swing VO+, RL = 1kΩ13.25 13.4 V

VO-, RL = 1kΩ-12.6 -12.75 V

VO+, RL = 150Ω9.6 10.7 V

VO-, RL = 150Ω-8.3 -9.4 V

ISC Output Short Circuit Current 80 140 mA

ISSupply Current (per amplifier) VS = ±15V, no load 8.5 9.25 mA

RIN Input Resistance 2.0 3.2 MΩ

CIN Input Capacitance AV = +1 1 pF

ROUT Output Resistance AV = +1 50 mΩ

PSOR Power Supply Operating Range Dual supply ±2.25 ±15 V

Single supply 4.5 30 V

NOTE:

1. Measured from TMIN to TMAX.

AC Electrical Specifications VS = ±15V, AV = +1, RL = 1kΩ, TA = 25°C, unless otherwise specified.

PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT

BW -3dB Bandwidth (VOUT = 0.4VPP)V

S = ±15V, AV = +1 200 MHz

VS = ±15V, AV = -1 55 MHz

VS = ±15V, AV = +2 53 MHz

VS = ±15V, AV = +5 17 MHz

GBWP Gain Bandwidth Product VS = ±15V 70 MHz

PM Phase Margin RL = 1kΩ, CL = 5pF 55 °

SR Slew Rate (Note 1) 260 300 V/µs

ISL55004

3FN6219.2

July 27, 2006

FPBW Full-power Bandwidth (Note 2) VS = ±15V 9.5 MHz

tSSettling to +0.1% (AV = +1) VS = ±15V, 10V step 75 ns

dG Differential Gain (Note 3) NTSC/PAL 0.01 %

dP Differential Phase NTSC/PAL 0.05 °

eN Input Noise Voltage 10kHz 12 nV/√Hz

iN Input Noise Current 10kHz 1.5 pA/√Hz

NOTES:

1. Slew rate is measured on rising edge.

2. For VS = ±15V, VOUT = 10VPP, for VS = ±5V, VOUT = 5VPP. Full-power bandwidth is based on slew rate measurement using FPBW = SR/(2π *

VPEAK).

3. Video performance measured at VS = ±15V, AV = +2 with two times normal video level across RL = 150Ω. This corresponds to standard video

levels across a back-terminated 75Ω load. For other values or RL, see curves.

AC Electrical Specifications VS = ±15V, AV = +1, RL = 1kΩ, TA = 25°C, unless otherwise specified. (Continued)

PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT

Typical Performance Curves

FIGURE 1. OPEN-LOOP GAIN vs FREQUENCY FIGURE 2. OPEN-LOOP PHASE vs FREQUENCY

FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS NON-

INVERTING GAIN SETTINGS FIGURE 4. GAIN vs FREQUENCY FOR V ARIOUS INVERTING

GAIN SETTINGS

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

VS = ±15V

RF = 500Ω

RL = 500Ω

AV = +1

AV = +2

AV = +5

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

VS = ±15V

RF = 500Ω

RL = 500Ω

AV = -1

AV = -2

AV = -5

ISL55004

4FN6219.2

July 27, 2006

FIGURE 5. PHASE vs FREQUENCY FOR VARIOUS NON-

INVERTING GAIN SETTINGS FIGURE 6. PHASE vs FREQUENCY FOR V ARIOUS

INVERTING GAIN SETTINGS

FIGURE 7. GAIN BANDWIDTH PRODUCT vs SUPPLY FIGURE 8. SLEW RATE vs SUPPLY

FIGURE 9. GAIN vs FREQUENCY FOR V ARIOUS RLOAD

(AV = +1) FIGURE 10. GAIN vs FREQUENCY FOR V ARIOUS RLOAD

(AV = +2)

Typical Performance Curves (Continued)

100

006912153

SUPPLY VOLTAGES (±V)

RL=500Ω

GAIN BANDWIDTH PRODUCT (MHz)

350

300

250

200

150

10006912153

SUPPLY VOLTAGES (±V)

SLEW RATE (V/µs)

AV=+2

RF=500Ω

RL=500Ω

CL=5pF POSITIVE SLEW RATE

NEGATIVE SLEW RATE

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

VS = ±15V

RF = 0Ω

CL = 5pF

AV = +1

RL = 500Ω

RL = 1kΩ

RL = 150Ω

RL = 50Ω

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

VS = ±15V

RF = 500Ω

CL = 5pF

AV = +2 RL = 500Ω

RL = 1kΩ

RL = 150Ω

RL = 50Ω

ISL55004

5FN6219.2

July 27, 2006

FIGURE 1 1. GAIN vs FREQUENCY FOR VARIOUS CLOAD

(AV = +1) FIGURE 12. GAIN vs FREQUENCY FOR V ARIOUS CLOAD

(AV = +2)

FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS RFEEDBACK

(AV = +1) FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS RFEEDBACK

(AV = +2)

FIGURE 15. GAIN vs FREQUENCY FOR V ARIOUS INVERTING

INPUT CAPACITANCE (CIN)FIGURE 16. GAIN vs FREQUENCY FOR VARIOUS SUPPLY

SETTINGS

Typical Performance Curves (Continued)

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

VS = ±15V

RF = 0Ω

RL = 500Ω

AV = +1

CL = 15pF

CL = 27pF

CL = 47pF

CL = 0pF

CL = 5pF

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

VS = ±15V

RF = 500Ω

RL = 500Ω

AV = +2

CL = 68pF

CL = 100pF

CL = 5pF

CL = 22pF

CL = 39pF

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

VS = ±15V

RL = 500Ω

CL = 5pF

AV = +1

RF = 500Ω

RF = 250Ω

RF = 0Ω

RF = 100Ω

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

VS = ±15V

RL = 500Ω

CL = 5pF

AV = +2

RF = 250Ω

RF = 1kΩ

RF = 100Ω

RF = 500Ω

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

VS = ±15V

RF = 500Ω

CL = 5pF

AV = +2

RL = 500ΩCIN = 6.8pF

CIN = 10pF

CIN = 4.7pF

CIN = 0pF

CIN = 2.2pF

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

-1

-2

-3

-4

-5

-6

100k 1M 10M 100M 1G

RF = 0Ω

RL = 500Ω

CL = 5pF

AV = +1

VS = ±15V

VS = ±5V

VS = ±2.5V

VS = ±10V

ISL55004

6FN6219.2

July 27, 2006

FIGURE 17. COMMON-MODE REJECTION RATIO (CMRR) FIGURE 18. POWER SUPPLY REJECTION RATIO (PSRR)

FIGURE 19. HARMONIC DIST ORTION vs FREQUENC Y

(AV = +1) FIGURE 20. HARMONIC DISTORTION vs OUTPUT VOLTAGE

(AV = +2)

FIGURE 21. OUTPUT SWING vs FREQUE NCY FOR VARIOUS

GAIN SETTINGS FIGURE 22. OUTPUT SWING vs SUPPLY VOL TAGE FOR

VARIOUS GAIN SETTINGS

Typical Performance Curves (Continued)

-20

-30

-40

-60

-80

-100

500K 1M 10M 40M

FREQUENCY (Hz)

HARMONIC DISTORTION (dBc)

VS=±15V

AV=+1

RF=0Ω

RL=500Ω

CL=5pF

VOUT=2VP-P

-50

-70

-90

THD

3RD HD

2ND HD

006912153

SUPPLY VOLTAGES (±V)

OUTPUT VOLTAGE SWING (Vp-p)

RL=500Ω

CL=5pF AV=+1

AV=+2

RF=500Ω

ISL55004

7FN6219.2

July 27, 2006

FIGURE 23. LARGE SIGNAL RISE AND FALL TIMES FIGURE 24. SMALL SIGNAL RISE AND FALL TIMES

FIGURE 25. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 26. P ACKAGE POWER DISSIPA TION vs AMBIENT

TEMPERATURE

FIGURE 27. P ACKAGE POWER DISSIPA TION vs AMBIENT

TEMPERATURE

Typical Performance Curves (Continued)

20% to 80% 80% to 20%

006912153

SUPPLY VOLTAGES (±V)

TOTAL SUPPLY CURRENT [mA]

AV=+1

RF=0Ω

RL=500Ω

CL=5pF

θJA=120°C/W

SO14

1.2

0.8

0.6

0.2

00 255075100 150

AMBIENT TEMPERATURE (°C)

POWER DISSIPATION (W)

12585

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

0.4

1.042W

1.420W

θJA=88°C/W

SO14

1.8

1.6

1.4

0.8

0.6

0.2

POWER DISSIPATION (W)

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

0.4

1.2

0 25 50 75 100 150

AMBIENT TEMPERATURE (°C)

12585

ISL55004

8FN6219.2

July 27, 2006

Product Description

The ISL55004 is a wide bandwidth, low power , and low offset

voltage feedback operational amplifier. This device is

internally compensated for closed loop gain of +1 or greater .

Connected in voltage follower mode and driving a 500Ω

load, the -3dB bandwidth is around a 200MHz. Driving a

150Ω load and a gain of 2, the bandwidth is about 90MHz

while maintaining a 300V/µs slew rate.

The ISL55004 is designed to operate with supply voltage

from +15V to -15V. That means for single supply application,

the supply voltage is from 0V to 30V. For split supplies

application, the supply voltage is from ±15V. The amplifier

has an input common-mode voltage range from 1.5V above

the negative supply (VS- pin) to 1.5V below the positive

supply (VS+ pin). If the input signal is outside the above

specified range, it will cause the output signal to be distorted.

The outputs of the ISL55004 can swing from -12.75V to

+13.4V for VS = ±15V. As the load resistance becomes

lower, the output swing is lower.

Choice of Feedback Resistor and Gain Bandwidth

Product

For applications th at require a gain of +1, no feedback

resistor is required. Just short the output pin to the inverting

input pin. For gains greater than +1, the feedback resistor

forms a pole with the parasitic capacitance at the inverting

input. As this pole becomes smaller, the amplifier's phase

margin is reduced. This causes ringing in the time domain

and peaking in the frequency domain. Therefore, RF can't be

very big for optimum performance. If a large value of RF

must be used, a small capacitor in the few Pico Farad range

in parallel with RF can help to reduce the ringing and

peaking at the expense of reducing the ban dwidth. For gain

of +1, RF = 0 is optimum. For the gains other than +1,

optimum response is obtained with RF with proper selection

of RF and RG (see Figures15 and 16 for selection).

Video Performance

For good video performance, an amplifi er is required to

maintain the same output impedance and the same

frequency response as DC levels are changed at the output.

This is especially difficult when driving a standard video load

of 150Ω, because of the change in output current with DC

level. The dG and dP of this device is about 0.01% and

0.05°, while driving 150Ω at a gain of 2. Driving high

impedance loads would give a similar or better dG and dP

performance.

Driving Capacitive Loads and Cables

The ISL55004 can drive 47pF loa ds in parallel with 500Ω

with less than 3dB of peaking at gain of +1 and as much as

100pF at a gain of +2 with under 3db of pe aking. If less

peaking is desired in applications, a small serie s resistor

(usually between 5Ω to 50Ω) can be pl aced in series with th e

output to eliminate most peaking. Howeve r, this will reduce

the gain slightly. If the gain setting is greater than 1, the gain

resistor RG can then be chosen to make up for any gain loss

which may be created by the additional series resistor at the

output.

When used as a cable driver, double termination is always

recommended for reflection-free performance. For those

applications, a back-termination series resistor at the

amplifier's output will isolate the amplifier from the cable and

allow extensive capacitive drive. However , other applications

may have high capacitive loads without a back-termination

resistor. Again, a small series resistor at the output can help

to reduce peaking.

Output Drive Capability

The ISL55004 does not have internal short circuit protection

circuitry. It has a typical short circuit current of 140mA. If the

output is shorted indefinitely, the power dissipation could

easily overheat the die or the current could eventually

compromise metal integrity. Maximum reliability is

maintained if the output current never exceeds ±60mA. This

limit is set by the design of the internal metal interconnect.

Note that in transient applications, the part is robust.

Short circuit protection can be provided externally with a

back match resistor in series with the output placed close as

possible to the output pin. In video applications this would be

a 75Ω resistor and will provide adequate short circuit

protection to the device. Care should still be taken not to

stress the device with a short at the output.

Power Dissipation

With the high output drive capabil ity of the ISL55004, it is

possible to exceed the 150°C absolute ma ximum junction

temperature under certain load current conditions.

Therefore, it is important to calculate the maximum junction

temperature for an application to determine if load conditions

or package types need to be modified to assure operation of

the amplifier in a safe operating ar ea.

The maximum power dissipation allowed in a package is

determined according to:

Where:

•T

JMAX = Maximum junction temperature

•T

AMAX = Maximum ambient temperature

•θJA = Thermal resistance of the package

The maximum power dissipation actually produced by an IC

is the total quiescent supply current times the total power

supply voltage, plus the power in the IC due to the load, or:

PDMAX TJMAX TAMAX

–

ΘJA

---------------------------------------------=

ISL55004

9FN6219.2

July 27, 2006

For sourcing:

For sinking:

Where:

•V

S = Supply voltage

•I

SMAX = Maximum quiescent supply current

•V

OUT = Maximum output voltage of the application

•R

LOAD = Load resistance tied to ground

•I

LOAD = Load current

• N = number of amplifiers (max = 4)

By setting the two PDMAX equations equal to each other , we

can solve the output current and RLOAD to avoid the device

overheat.

Caution: For supply volta g es greater then 20V, the

maximum power dissipation at 85°C ambient temperature

could be exceeded. For higher supply voltages the

maximum ambient temperature must be de-rated according

to the Package Power Dissipation curve Figure 27. The

maximum power dissipation is highly dependent upon the

thermal conductivity of the PCB. For lower thermal

conductivity boards use Figure 26.

Power Supply Bypassing Printed Circuit Board

Layout

As with any high frequency device, a good printed circuit

board layout is necessary for optimum performance. Lead

lengths should be as short as possible. The power supply

pin must be well bypassed to reduce the risk of oscillation.

For normal single supply operation, where the VS- pin is

connected to the ground plane, a single 4.7µF tantalum

capacitor in parallel with a 0.1µF ceramic capacitor from VS+

to GND will suffice. This same capacitor combination should

be placed at each supply pin to ground if split supplies are to

be used. In this case, the VS- pin becomes the negative

supply rail.

Printed Circuit Board Layout

For good AC performance, parasitic capacitance should be

kept to minimum. Use of wire wound resistors should be

avoided because of their additional series inductance. Use

of sockets should also be avoided if possible. Sockets add

parasitic inductance and capacitance that can result in

compromised performance. Minimizing parasitic cap acitance

at the amplifier's inverting input pin is very important. The

feedback resistor should be placed very close to the

inverting input pin. Strip line design techniques are

recommended for the signal traces.

Application Circuits

Sallen Key Low Pass Filter

A common and easy to implement filter taking advantage of

the wide bandwidth, low offset and low power demands of

the ISL55004. A derivation of the transfer function is

provided for convenience (See Figure 28).

Sallen Key High Pass Filter

Again this useful filter benefits from the characteristics of the

ISL55004. The transfer function is very similar to the low

pass so only the results are presented (See Figure 29).

PDMAX VSISMAX VSVOUTi

–()

i1=

∑VOUTi

RLi

-----------------

×+×=

PDMAX VSISMAX VOUTi VS

–()

i1=

∑ILOADi

×+×=

ISL55004

10 FN6219.2

July 27, 2006

K3 1

KHolp

CR CR

)K1(

CRCR 1

KHolp )CRCRCR)K1((jwCRCRw1 1

)jw(H

1s)CRCRCR)K1((sCRCR K

)s(H

sC1ViVo

RVKVo

RViV

1sCR 1

KVo

11 22

12 21

22 11

2211

2221112211

2212111

2211

−

++−

++−+−

+++−+

−

Equations simplify if we let all

components be equal R=C

V+

V-

1nF

VOUT R7

1kΩ

1kΩC2

1nF

1kΩ

FIGURE 28. SALLEN KEY LOW PASS FILTER

FIGURE 29. SALLEN KEY HIGH PASS FILTER

K4 2

K4K

Holp

CR CR

)K1(

CRCR 1

KHolp

11 22

12 21

22 11

2211

−

++−

Equations simplify if we let

all components be equal R=C

V+

V-

1nF

VOUT R7

1kΩ

1kΩC2

1nF

1kΩ

ISL55004

11 FN6219.2

July 27, 2006

Differe ntial Output Instrumentation Amp lifier

The addition of a third amplifier to the conventional three

amplifier instrumentation amplifier introduces the benefits of

differential signal realization, specifically the advantage of

using common-mode rejection to remove coupled noise and

ground potential errors inherent in remote transmission. This

configuration also provide s en hanced bandwidth, wider

output swing and faster slew rate than conventional three

amplifier solutions with only the cost of an additional

amplifier and few resistors.

Strain Gauge

The strain gauge is an ideal application to take advantage of

the moderate bandwidth and high accuracy of the ISL55004.

The operation of the circuit is very straightforward. As the

strain variable component resistor in the balanced bridge is

subjected to increasing strain, its resistance changes,

resulting in an imbalance in the bridge. A voltage variation

from the referenced high accuracy source is generated and

translated to the difference amplifier through the buffer

stage. This voltage difference as a function of the strain is

converted into an output voltage.

eo4

eo3

REF

FIGURE 30. DIFFERENTIAL OUTPUT AMPLIFIER

eo3 12R

2RG

⁄+()e1e2

–()–= eo4 12R

2RG

⁄+()e1e2

–()=

eo21 2R

2RG

⁄+()e1e2

–()–=

BW 2fC1 2,

ADi

------------------= ADi 21 2R

2RG

⁄+()–=

V+

V-

C12

1nF

VOUT

(V1+V2+V3+V4)

1kΩ

R17 1kΩ

1nF

1kΩ

R18 1kΩ

V ARIABLE SUBJECT

TO STRAIN

1kΩ

R15 R16

1kΩ1kΩ

FIGURE 31. STRAIN GAUGE

ISL55004

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

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FN6219.2

July 27, 2006

ISL55004

Small Outline Package Family (SO)

GAUGE

PLANE

A1 L

DETAIL X 4° ±4°

SEATING

PLANE

0.010 BMCA

0.004 C

0.010 BMCA

(N/2)

NN (N/2)+1

PIN #1

I.D. MARK

h X 45°

SEE DETAIL “X”

0.010

MDP0027

SMALL OUTLINE PACKAGE FAMILY (SO)

SYMBOL SO-8 SO-14

SO16

(0.150”)

SO16 (0.300”)

(SOL-16)

SO20

(SOL-20)

SO24

(SOL-24)

SO28

(SOL-28) TOLERANCE NOTES

A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -

A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -

A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -

b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -

c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -

D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3

E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -

E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3

e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -

L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -

L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -

h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -

N 8 14 16 16 20 24 28 Reference -

Rev. L 2/01

NOTES:

1. Plastic or metal protrusions of 0.006” maximum per side are not included.

2. Plastic interlead protrusions of 0.010” maximum per side are not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994