iCE40 UltraPlus Breakout Board
User Guide
FPGA-UG-02001 Version 1.1
March 2017
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
2 FPGA-UG-02001-1.1
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iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 3
Contents
1. Introduction .................................................................................................................................................................. 5
2. Features ........................................................................................................................................................................ 6
3. iCE40 UltraPlus Device .................................................................................................................................................. 7
4. Software Requirements ................................................................................................................................................ 8
5. Demonstration Design Shunts ...................................................................................................................................... 9
6. Clock Sources .............................................................................................................................................................. 10
7. Board Power ............................................................................................................................................................... 11
8. Board Configuration and Programming ....................................................................................................................... 12
9. Test Points .................................................................................................................................................................. 15
10. RGB LED Demonstration Design and Software GUI ................................................................................................ 17
11. GUI Serial Communication Interface ...................................................................................................................... 20
11.1. LED Control via SPI ............................................................................................................................................ 20
11.2. SPI Protocol ....................................................................................................................................................... 20
11.3. Register Definitions ........................................................................................................................................... 21
12. Ordering Information .............................................................................................................................................. 23
Appendix A. Schematic Diagrams ....................................................................................................................................... 24
Appendix B. Bill of Materials............................................................................................................................................... 30
References .......................................................................................................................................................................... 33
Standards Documents ..................................................................................................................................................... 33
Technical Support Assistance ......................................................................................................................................... 33
Revision History .................................................................................................................................................................. 34
Figures
Figure 2.1. iCE40 UltraPlus Breakout Board (Top Side) ........................................................................................................ 6
Figure 5.1. Default Shunt Locations ...................................................................................................................................... 9
Figure 8.1. Board Configuration for Programming Flash .................................................................................................... 12
Figure 8.2. Device Property Settings for Programming Flash ............................................................................................. 13
Figure 8.3. Setting Status in Diamond Programmer for Programming Flash ...................................................................... 13
Figure 8.4. Device Property Settings for Programming iCE40 UltraPlus ............................................................................. 14
Figure 9.1. J52 Header ‘A’ Breakouts .................................................................................................................................. 15
Figure 9.2. J2 Header ‘B’ Breakouts .................................................................................................................................... 15
Figure 9.3. J3 Header ‘C’ Breakouts .................................................................................................................................... 15
Figure 9.4. U6 PMOD Connector ........................................................................................................................................ 16
Figure 9.5. J1 Adardvark Connector.................................................................................................................................... 16
Figure 9.6. Breakout Headers ............................................................................................................................................. 16
Figure 10.1. SPI Flash Selection (Horizontal) for J6............................................................................................................. 17
Figure 10.2. iCE40 UltraPlus Selection (Vertical) for J6 ...................................................................................................... 18
Figure 10.3. iCE40 UltraPlus LED Demonstration Interface ................................................................................................ 18
Figure 11.1. SPI Physical Transaction .................................................................................................................................. 20
Figure A.1. Block Diagram ................................................................................................................................................... 24
Figure A.2. FTDI Connection ............................................................................................................................................... 25
Figure A.3. DUT Connection................................................................................................................................................ 26
Figure A.4. RGB,PMOD and HEADERS ................................................................................................................................. 27
Figure A.5. Regulator Connection ....................................................................................................................................... 28
Figure A.6. SPI ..................................................................................................................................................................... 29
iCE40 UltraPlus Breakout Board
User Guide
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
4 FPGA-UG-02001-1.1
Tables
Table 11.1. Register Address and Bit Field Allocation ........................................................................................................ 20
Table 11.2. Bit Field Functionality Definition ...................................................................................................................... 20
Table 11.3. RGB Color Code Definition ............................................................................................................................... 21
Table 11.4. LED Brightness Code Definition ....................................................................................................................... 21
Table 11.5. Breathe Ramp Code Definition ........................................................................................................................ 22
Table 11.6. Blink Rate Code Definition ............................................................................................................................... 22
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 5
1. Introduction
Thank you for choosing the Lattice iCE40 UltraPlusTM Breakout Board.
This guide describes how to begin using the iCE40 UltraPlus Breakout Board, an easy-to-use platform for demonstrating
the high-current LED drive capabilities of the iCE40 UltraPlus ; which has more memory to achieve functions mainly
required in the customer mobile market. Along with the evaluation board and accessories, this kit includes a pre-loaded
LED Driver Demo that demonstrates driving the RGB LEDs with a PWM circuit. In addition, most of the device's I/O pins
are accessible via one of the several header locations on the board, facilitating rapid prototyping of user functions.
The contents of this user guide include demo operation, top-level functional descriptions of the various portions of the
evaluation board, descriptions of the onboard connectors, shunts, and a complete set of schematics and the bill of
materials for the iCE40 UltraPlus Breakout Board.
Note:
Static electricity can severely shorten the lifespan of electronic components. Be careful
when handling the iCE40 UltraPlus Breakout Board as to not damage it from ESD.
iCE40 UltraPlus Breakout Board
User Guide
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
6 FPGA-UG-02001-1.1
2. Features
The iCE40 UltraPlus Breakout Board includes:
iCE40 UltraPlus Breakout Board – The iCE40 UltraPlus Breakout Board features the following on-board components
and circuits:
— iCE40 UltraPlus (iCE40UP5K-SG48) device in a 48-PIN QFN package.
— Example of a board using this 0.5mm pitch QFN package.
— High-current LED output
— iCE40 UltraPlus Current Measurements
— Standard USB cable for device programming.
— RoHS-compliant packaging and process
Pre-loaded Demo – The kit includes a pre-loaded demo to control the onboard RGB LED in conjunction with a
software run GUI.
USB Connector Cable – A mini B USB port provides power, a programming interface and communication for the
software RGB LED GUI to the iCE40 UltraPlus SPI port.
Figure 2.1 shows the top side of the iCE40 UltraPlus Breakout Board indicating the specific features that are designed on
the board.
RGB
LED
USB
Interface
Socket
iCE40UP5K-
SG48
D13
Power
LED
Figure 2.1. iCE40 UltraPlus Breakout Board (Top Side)
iCE40 UltraPlus Breakout Board
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FPGA-UG-02001-1.1 7
3. iCE40 UltraPlus Device
The board features an iCE40UP5K FPGA with a 1.2 V core supply. The device package is 48-PIN QFN. For a complete
description of this device, see DS-1056, iCE40 UltraPlus Family Data Sheet.
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
8 FPGA-UG-02001-1.1
4. Software Requirements
You should install the following software before you begin developing designs for the board:
Lattice iCEcube2 2017.01 (or higher)
Diamond Programmer 3. 9 (or higher)
These software are available at the Lattice website Design Software & IP page. Make sure you log in to
www.latticesemi.com, otherwise these software downloads will not be visible. It is also recommended to download the
RGB LED software GUI which interfaces with the iCE40 UltraPlus Breakout Board. This GUI allows you to control the
RGB LED for color, brightness, blinking and breathing. Download the PC or MAC version of the GUI at
www.latticesemi.com.
iCE40 UltraPlus Breakout Board
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 9
5. Demonstration Design Shunts
Lattice provides the RGB LED Driver Demo design programmed on the board. The RGB LED Driver Demo used in
conjunction with the software GUI illustrates the use of a PWM driver controlling the LEDs on the board. Below is a
description of the control jumpers for each LED.
The RGB LED will transition colors
— J27 can be used to probe RGB LED (Default shunted). If you remove J27, the RGB LED will not light up.
Figure 5.1 shows the default board shunt locations.
J27 - RGB Shunts
J51 – Enable
12 MHz clock
J28 – Enable DONE LED
J6 – Program SPI
Flash or iCE40UP
J7 – Isolate
SPI Flash CSn
Figure 5.1. Default Shunt Locations
iCE40 UltraPlus Breakout Board
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
10 FPGA-UG-02001-1.1
6. Clock Sources
The board has a single 12 MHz clock source. The 12 MHz clock drives both the FTDI USB interface device, and the
iCE40UP5K device. The iCE40UP5K can be disconnected from the 12 MHz oscillator using J51. This is necessary, for
example, when iCE40UP5K device pin35 is mistakenly programmed as an output and prevents the FTDI USB interface
from operating.
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 11
7. Board Power
The board provides the following power features:
Board Power
— Board power is derived from the USB connection.
— D13 Blue LED indicates Board Power
iCE40 UltraPlus VCC/VCC_PLL
— Onboard 1.2 V supply
— ICC can be measured across the series resistor R76 (1 Ω) at TP11 and TP12
— ICC_PLL can be measured across the series resistor R77 (1 Ω) at TP13 and TP14
iCE40 UltraPlus VCCIO
— Onboard 3.3 V supply
— ICC0 can be measured across the series resistor R73 (1 Ω) at TP5 and TP6
— ICC1 can be measured across the series resistor R75 (1 Ω) at TP9 and TP10
— ICC2 can be measured across the series resistor R74 (1 Ω) at TP7 and TP8
The power supplies on the iCE40 UltraPlus Breakout Board are simplified and suitable for booting from the external SPI
flash. The power supply sequencing does not conform to the NVCM boot requirements as specified in DS1056, iCE40
UltraPlus Family Data Sheet. The user may encounter intermittent boot success and/or higher than specified startup
currents when attempting to boot from NVCM.
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
12 FPGA-UG-02001-1.1
8. Board Configuration and Programming
The board allows for programming of the iCE40 UltraPlus or the SPI Flash:
SPI Flash Programming J6 shunt pins 1-3 and 2-4 (Default shunted)
— U5 Micron Technology Inc. part number N25Q032A13ESC40F
iCE40 UltraPlus Configuration or Programming J6 shunt pins 1-2 and 3-4
— U1 iCE40UP5K – SG48
CRESETB can be asserted by pushing SW1
— Can be probed with J11
Done LED D2
— Can be probed with J28 (Default shunted)
Details of the iCE40 UltraPlus Board for SPI flash programming are shown in Figure 8.1.
J51 – Enable
12 MHz clock
J28 – Enable DONE LED
J6 – Program SPI
Flash or iCE40 UltraPlus
J7 – Isolate SPI Flash CSn
J11 – CRESETB Probe
CRESETB Push-Button
USB Interface
Socket
U5 – N25Q032A13ESC40F
U1 –
iCE40UP5K-SG48
Figure 8.1. Board Configuration for Programming Flash
To program SPI flash in Diamond Programmer:
1. Make sure that the Standalone Diamond Programmer is installed.
2. Connect the iCE40 UltraPlus breakout board via the USB cable to a PC or MAC.
3. Start Diamond Programmer.
4. Set Device Family to iCE40 UltraPlus” and Device to “iCE40UP5K”. Refer to Figure 8.3.
5. Open the Device Properties dialog. Apply the settings highlighted in Figure 8.2.
Programming file is the bitmap file that will be programmed into the iCE40 UltraPlus breakout board.
iCE40 UltraPlus Breakout Board
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FPGA-UG-02001-1.1 13
Load from File button should be used to refresh fields such as “Data file size” and “End address(Hex)”.
6. Click OK to exit Device Properties dialog.
7. Click the Program button in Diamond Programmer to download the bitstream file.
Figure 8.2. Device Property Settings for Programming Flash
Double-click to
set Device
Family to iCE40
UltraPlus
Program button
Double-click to
set Device type
to iCE40UP5K
Double-click to
open the Device
Properties dialog
Figure 8.3. Setting Status in Diamond Programmer for Programming Flash
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14 FPGA-UG-02001-1.1
The differences between programming ICE40 UltraPlus and programming flash are described below.
To program ICE40 UltraPlus in Diamond Programmer:
1. Change jumpers on J6, shunt pins 1-2 and 3-4.
2. Apply the settings in the Device Properties dialog as shown in Figure 8.4.
Figure 8.4. Device Property Settings for Programming iCE40 UltraPlus
For more information on Diamond Programmer, please refer to its user guide.
iCE40 UltraPlus Breakout Board
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 15
9. Test Points
The board features a number of headers and test connections which provide access to the iCE40 UltraPlus I/Os:
Figure 9.1. J52 Header ‘A’ Breakouts
Figure 9.2. J2 Header ‘B’ Breakouts
Figure 9.3. J3 Header ‘C’ Breakouts
iCE40 UltraPlus Breakout Board
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
16 FPGA-UG-02001-1.1
Figure 9.4. U6 PMOD Connector
Figure 9.5. J1 Adardvark Connector
The break-out headers and test connectors are shown in Figure 9.6.
J2 - "Header B"
J52 - "Header A"
J3 - "Header C"
J1 - "Aardvark SPI
emulator connector
U6 - "PMOD SOCKET"
Figure 9.6. Breakout Headers
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 17
10. RGB LED Demonstration Design and Software GUI
The iCE40 UltraPlus Breakout Board can demonstrate a complete controller for an RGB LED. Following are the steps to
run the demonstration. The Software GUI tool used here is the same as the one used with the iCE40 Ultra Breakout
Board. You can refer to the Lattice website iCE40 Ultra Breakout Board page.
To run the demonstration:
1. Ensure that the RGB LED GUI is installed.
2. Make sure the jumpers on J6 are both in the horizontal position. This is the default pins 1-3 and 2-4 shorted
together.
Figure 10.1. SPI Flash Selection (Horizontal) for J6
3. Connect the iCE40 UltraPlus breakout board via the USB cable to a PC or MAC.
4. After the iCE40 UltraPlus device has initialized and the RGB LED is illuminated RED, change the J6 jumper positions
to vertical, shorting pins 1-2 and 3-4. This is required to allow the USB port to communicate with the iCE40UP5K
device.
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18 FPGA-UG-02001-1.1
Figure 10.2. iCE40 UltraPlus Selection (Vertical) for J6
5. Start the RGB GUI on the PC or MAC.
Figure 10.3. iCE40 UltraPlus LED Demonstration Interface
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FPGA-UG-02001-1.1 19
Now you can control the RGB LED on the iCE40 UltraPlus Breakout Board. You can set the color, brightness, blinking
rate as well as breathing.
Note: The RGB GUI is the same demo tool used with iCE40 Ultra Breakout board.
iCE40 UltraPlus Breakout Board
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20 FPGA-UG-02001-1.1
11. GUI Serial Communication Interface
11.1. LED Control via SPI
The Software GUI demonstration program communicates with the iCE40 UltraPlus device using an SPI serial
communication channel. The SPI interface (mode 0) control link is implemented using a simple write-only protocol (see
Figure 11.1.)
ADDR[7:0] REG[15:8] REG[7:0]
MOSI
SCK
CSn
Figure 11.1. SPI Physical Transaction
11.2. SPI Protocol
Data on the MOSI serial line is transmitted MSB first.
Addr[7:0] – Controls which of the 16 bits are updated with REG data.
Note that Unspecified REG bits must be written, but are ignored.
Table 11.1. Register Address and Bit Field Allocation
Addr
Bits Written
Bit Position
0x13
REG[3:0]
------------dddd
0x14
REG[7:4]
--------cccc----
0x15
REG[11:8]
----bbbb--------
0x16
REG[15:12]
aaaa------------
0x19
REG[15:0]
aaaabbbbccccdddd
REG[15:0] – Consists of four control fields.
Table 11.2. Bit Field Functionality Definition
Field
Bit Positions
Function
aaaa
REG[15:12]
RGB Color[3:0]
bbbb
REG[11:8]
Brightness[3:0]
cccc
REG[7:4]
Breathe Ramp [3:0]
dddd
REG[3:0]
Blink Rate [3:0]
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FPGA-UG-02001-1.1 21
11.3. Register Definitions
Table 11.3. RGB Color Code Definition
Default setting (hardware, software) is denoted by (*).
RGB Color[3:0]
Color
Color Code
0000*
Red
#FF0000
0001
Orange
#FF7F00
0010
Yellow
#FFFF00
0011
Chartreuse
#7FFF00
0100
Green
#00FF00
0101
Spring Green
#00FF7F
0110
Cyan
#00FFFF
0111
Azure
#007FFF
1000
Blue
#0000FF
1001
Violet
#7F00FF
1010
Magenta
#FF00FF
1011
Rose
#FF007F
1100
—
—
1101
—
—
1110
—
—
1111
White
#FFFFFF
Table 11.4. LED Brightness Code Definition
Brightness[3:0]
Level (%)
0000
6.25 (dim)
0001
12.5
0010
18.78
0011
25
0100
31.25
0101
37.5
0110
43.75
0111*
50
1000
56.25
1001
62.5
1010
68.75
1011
75
1100
81.25
1101
87.5
1110
93.75
1111
100 (bright)
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
22 FPGA-UG-02001-1.1
Table 11.5. Breathe Ramp Code Definition
Breathe Ramp[3:0]
Level (%)
0000*
.0x (fast)
0001
.063x
0010
.125x
0011
.25x
0100
.5x
0101
1x
0110
2x
0111
4x (slow)
1000
—
1001
—
1010
—
1011
—
1100
—
1101
—
1110
—
1111
—
Table 11.6. Blink Rate Code Definition
Blink Rate[3:0]
Level (%)
0000
Always On
0001
1/16 (fast)
0010
1/8
0011
1/4
0100
1/2
0101*
1
0110
2
0111
4
1000
Always Off
1001
—
1010
—
1011
—
1100
—
1101
—
1110
—
1111
—
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 23
12. Ordering Information
Description
Ordering Part Number
China RoHS Environment- Friendly Use Period (EFUP)
iCE40 UltraPlus Breakout Board
iCE40UP5K-B-EVN
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
24 FPGA-UG-02001-1.1
Appendix A. Schematic Diagrams
Figure A.1. Block Diagram
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
iCE40UP5K-SG48
Lattice Semiconductor FPGA
USB
Connector USB to SPI
Aardvark Connector
SPI
Header A
RGB
Switches
Header B
BLOCK DIAGRAM
SPI
BANK 1
BANK 1 & 2
Header C
BANK 0
BANK 0
Page : 5
Page : 2
Page : 6
Page : 3
Page : 4
Page : 4
Page : 4
Page : 4
Page : 4
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
61
Block Diagram
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
61
Block Diagram
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
61
Block Diagram
iCE40 UltraPlus Breakout Board A
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 25
Figure A.2. FTDI Connection
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FTDI CONNECTION
SS
FT_EECS
FT_EECLK
FT_EEDATA
SCK
SI
SO
VCC1_8FT
VCC1_8FT
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
VBUS_5V
CDONE 3
CRESET_B 3
ICE_CLK 3,4
ICE_SCK 3,4,6
FLASH_MOSI 6
FLASH_MISO 6
ICE_SS 3,4,6
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
62
FTDI Connection
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
62
FTDI Connection
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
62
FTDI Connection
iCE40 UltraPlus Breakout Board A
C4
0.1uF
C6
0.1uF
FB5
FB_60ohm
PART_NUMBER = HI0603P600R-10
Manufacturer = Laird-signal
R60
C11
0.1uF
L4
600 OHM 800MA
C53
0.1uF
C7
0.1uF
R700
93LC56-SO8
U2
Manufacturer = Microchip
PART_NUMBER = 93LC56CT-I/SN
CS 1
CLK 2
DI 3
DO 4
VSS
5ORG
6NU
7VCC
8
R49 0
R70
X1
12.0000MHZ
PART_NUMBER = SiT1602AC-12-33E-12.000
Manufacturer = SiTime
VDD 4
OE_ST#
1
GND
2OUTPUT 3
C9
0.1uF
R11
10K
R710
C64
0.1uF
J51
2 PIN JPR
12
R80
J5
SKT_MINIUSB_B_RA
PART_NUMBER = 5075BMR-05-SM-CR
Manufacturer = Neltron
VCC 1
D- 2
D+ 3
ID 4
GND 5
R10 12K
C1
4.7uF
C8
0.1uF
R13
10K
C66 0.1uF
C3
4.7uF
R12
10K
R54
1K
R19 2.2K
C2
0.1uF
FB4
FB_60ohm
PART_NUMBER = HI0603P600R-10
Manufacturer = Laird-signal
C5
0.1uF
D13
Green
12
R50
C12
0.1uF
FTDI High-Speed USB
FT2232H
FT2232HL
U2
PART_NUMBER = FT2232HL-REEL
Manufacturer = FTDI
VREGIN
50
VREGOUT
49
DM
7
DP
8
REF
6
RESET#
14
EECS
63
EECLK
62
EEDATA
61
OSCI
2
OSCO
3
TEST
13
ADBUS0 16
ADBUS1 17
ADBUS2 18
ADBUS3 19
VPHY 4
VPLL 9
VCORE 12
VCORE 37
VCORE 64
VCCIO 20
VCCIO 31
VCCIO 42
VCCIO 56
AGND
10
GND
1
GND
5
GND
11
GND
15
GND
25
GND
35
GND
47
GND
51
PWREN# 60
SUSPEND# 36
ADBUS4 21
ADBUS5 22
ADBUS6 23
ADBUS7 24
ACBUS0 26
ACBUS1 27
ACBUS2 28
ACBUS3 29
ACBUS4 30
ACBUS5 32
ACBUS6 33
ACBUS7 34
BDBUS0 38
BDBUS1 39
BDBUS2 40
BDBUS3 41
BDBUS4 43
BDBUS5 44
BDBUS6 45
BDBUS7 46
BCBUS0 48
BCBUS1 52
BCBUS2 53
BCBUS3 54
BCBUS4 55
BCBUS5 57
BCBUS6 58
BCBUS7 59
R9 2.2KC10
10uF
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
26 FPGA-UG-02001-1.1
Figure A.3. DUT Connection
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Done LED
CRESETB Button
Default: Open
DUT CONNECTION
ICE_SS
ICE_SCK
ICE_MOSI
ICE_MISO
CRESET_B
CDONE
IOB_8A
IOB_9B
IOB_4A
IOB_5B
IOB_2A
IOB_3B_G6
IOB_0A
IOB_6A
IOB_22A
IOB_23B
IOB_24A
IOB_25B_G3
IOB_29B
IOB_31B
IOB_20A
IOB_18A
IOB_16A
IOB_13BIOT_37A
IOT_36B
IOT_39A
IOT_38B
IOT_43A
IOT_42B
IOT_45A_G1
IOT_44B
IOT_49A
IOT_48B
IOT_51A
IOT_50B
IOT_41A
IOT_46B_G0
CDONE
CRESET_B CRESET_B
+3.3V
+3.3V VCCIO_0
+3.3V
VCCIO_2
+3.3V
VCCIO_1
+1.2V VCC
+1.2V VCC_PLL
+3.3V
+3.3V
ICE_SS 2,4,6
ICE_SCK 2,4,6
ICE_MOSI 4,6
ICE_MISO 4,6
CRESET_B 2
CDONE 2
IOT_37A4
IOT_36B4
IOT_39A4
IOT_38B4
IOT_42B4
IOT_43A4
IOT_345A_G14
IOT_44B4
IOT_49A4
IOT_48B4
IOT_50B4
IOT_51A4
LED_BLUE4
LED_GREEN4
LED_RED4
IOT_41A4
IOB_8A 4
IOB_9B 4
IOB_4A 4
IOB_5B 4
IOB_2A 4
IOB_3B_G6 4
IOB_0A 4
IOB_6A 4
IOB_22A 4
IOB_23B 4
IOB_24A 4
IOB_25B_G3 4
IOB_13B 4
IOB_29B 4
IOB_31B 4
IOB_20A 4
IOB_16A 4
IOB_18A 4
ICE_CLK2,4
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
63
DUT Connection
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
63
DUT Connection
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
63
DUT Connection
iCE40 UltraPlus Breakout Board A
C88
1uF
C93
0.1uF
R35
2k2
C90
10nF
R73
1
D11
CDBU0520
1 2
C92
10nF
C101
10nF
R34
10k
R14
100
TP11
DNI
1
TP5
DNI
1
TP13
DNI
1
TP12
DNI
1
R76
1
C100
1uF
TP14
DNI
1
R77
1
C99
1uF
C94
0.1uF
TP6
DNI
1
J11
CRST
PART_NUMBER = 77311-801-02LF
Manufacturer = FCI
1
2
C96
100nF
R74
1
iCE40UP5K - SG48
Bank1Bank2
Bank0
iCE40UP5K- SG48
U1
IOB_0A 46
IOB_2A 47
IOB_3B_G6 44
IOB_4A 48
IOB_5B 45
IOB_6A 2
IOB_8A 4
IOB_9B 3
CRESET_B 8
CDONE 7
IOB_13B 6
IOB_16A 9
IOB_18A 10
IOB_20A 11
IOB_22A 12
IOB_23B 21
IOB_24A 13
IOB_25B_G3 20
IOB_29B 19
IOB_31B 18
IOB_32A_SPI_SO 14
IOB_33B_SPI_SI 17
IOB_34A_SPI_SCK 15
IOB_35B_SPI_SS 16
VCCPLL
29
IOT_36B
25 IOT_37A
23
IOT_38B
27 IOT_39A
26
IOT_41A
28
IOT_42B
31 IOT_43A
32
IOT_44B
34 IOT_45A_G1
37
IOT_46B_G0
35
IOT_48B
36 IOT_49A
43
IOT_50B
38 IOT_51A
42
RGB0
39
RGB1
40
RGB2
41
GND
Paddle
VCC
5
VCC
30
VCCIO_0
33
SPI_VCCIO1 22
VCCIO_2 1
VPP_2V5
24
TP7
DNI
1
SW1
CRST
Manufacturer = E-Switch
PART_NUMBER = TL1015AF160QG
TP9
DNI
1
C87
0.1uF
D3
Green
PART_NUMBER = LG L29K-G2J1-24-Z
Manufacturer = Osram
R75
1
C95
1uF
C89
0.1uF
TP8
DNI
1
TP10
DNI
1
J28
DONE
PART_NUMBER = 77311-801-02LF
Manufacturer = FCI
1
2
C97
10uF
C98
10nF
C91
0.1uF
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 27
Figure A.4. RGB, PMOD and HEADERS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Default: Shunt
RGB LED PMOD Socket
HEADER B
HEADER A HEADER C
(Bank 0) (Bank 2) (Bank 1)
MAKE PWR TRACES
CAPABLE OF 1A
(Bank 0)
RGB, PMOD and HEADERS
DNI
DNI
PLACE THE RESISTORS ON THE TOP LAYER
DNI
DNI
DNI
DNI
ICE_SS
ICE_MOSI
ICE_MISO
ICE_SCK
LED_RED
LED_GREEN
LED_BLUE
LED_GREEN
ICE_SS
ICE_MOSI
ICE_MISO
ICE_SCK
LED_BLUE
IOT_37A
IOT_36B
IOT_39A
IOT_38B
IOT_43A
IOT_42B
IOT_44B
IOT_49A
IOT_37A
IOT_36B
IOT_44B
IOT_49A
IOT_42B
IOT_39A
IOT_43A
IOT_38B
LED_RED
VBUS_5V +3.3V
+3.3V
+3.3V
+3.3V +3.3V+3.3V
+3.3V
VCCIO_0
LED_RED3,4
LED_GREEN3,4
LED_BLUE3,4
ICE_MOSI3,4,6
ICE_MISO3,4,6
ICE_SCK2,3,4,6
ICE_SS2,3,4,6
IOT_37A3
IOT_36B3
IOT_39A3,4
IOT_38B3,4
IOT_42B3,4
IOT_43A3,4
IOT_345A_G13
IOT_44B3
IOT_49A3
IOT_48B 3
IOT_51A 3
IOT_50B 3
IOT_41A 3
IOB_22A 3
IOB_23B 3
IOB_24A 3
IOB_25B_G3 3
IOB_13B 3
IOB_29B 3
IOB_31B 3
IOB_20A 3
IOB_16A 3
IOB_18A 3
IOB_8A3
IOB_9B3
IOB_4A3
IOB_5B3
IOB_2A3
IOB_3B_G63
IOB_0A3
IOB_6A3
ICE_CLK 2,3
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
64
RGB, PMOD and HEADERS
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
64
RGB, PMOD and HEADERS
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
64
RGB, PMOD and HEADERS
iCE40 UltraPlus Breakout Board A
D8
CDBU0520
12
J3
Header2x10
DNI
2
4
6
8
10
12
14
16
18
2019
17
15
13
11
9
7
5
3
1
J2
Header2x10
DNI
2
4
6
8
10
12
14
16
18
2019
17
15
13
11
9
7
5
3
1
C74
0.1uF
R95 62
DISM_R_0603
SW2
SW-DIP4
1
1
2
2
3
3
4
455
66
77
88
C72
0.1uF
D9
CDBU0520
12
R97 110
DISM_R_0603
C75
0.1uF
R72
4.7K
C73
0.1uF
D10
CDBU0520
12
U11
PMOD socket
1
2
3
4
5
6
9
7
10
11
12
8
R78
4.7K
U10
LED TRI-COLOUR_1
PART_NUMBER = SFT722N-S
Manufacturer = Seoul Semiconductor Inc
4
5
61
2
3
J52
HEADER 5X2_0
2
4
6
8
10
1
3
5
7
9
11 12
R79
4.7K
C76
0.1uF
R94 62
DISM_R_0603
J27
HEADER 3X2
2
4
6
1
3
5
R80
4.7K
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
28 FPGA-UG-02001-1.1
Figure A.5. Regulator Connection
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
REGULATOR CONNECTION
+3.3V
+1.2V
VBUS_5V
+3.3V +1.2V
VCC_3.3V
+3.31V
+1.22V VCC_1.2V
+1.2V
+3.3V
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
65
Regulator Connection
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
65
Regulator Connection
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
65
Regulator Connection
iCE40 UltraPlus Breakout Board A
C37
0.1uF
C49
0.1uF
C67
4.7uF
R64
357K
C36
1uF
C38
0.1uF
C42
10uF
C46
0.01uF
R65 210K
TP1
DNI
1
C39
0.1uF
L6
600 OHM 800MA
R69
0.1
C35
10uF
C47
10uF
R66
100
TP2
DNI
1
C84
22uF
C40
0.1uF
R67
100
C85
22uF
R62
1M
TP3
DNI
1
L7
600 OHM 800MA
C65
10uF
C44
0.1uF
R68
0.1
R63
1M
C45
0.01uF
Part Reference = U7
LT3030EFE#TRPBF
Manufacturer = Linear
PART_NUMBER = LT3030EFE#TRPBF
GND3
5
IN1_1
18
SHDN2
11
GND2
15
PWRGD1
19
IN1_2
17
IN2_1
14
PWRGD2
12
GND4
6
IN2_2
13
SHDN1
20
GND1
16
OUT1_1 3
OUT1_2 4
BYP1 2
ADJ1 1
OUT2_1 7
OUT2_2 8
BYP2 9
ADJ2 10
THERMPAD
21
C48
0.01uF
C43
1uF
C41
0.01uF
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02001-1.1 29
Figure A.6. SPI
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPI
J9: Remove shunt only for Programming iCE.
Replace shunt for programming Flash and for normal operation.
Short-circuit Jumper
Aardvark Connector
For programming Flash - Shunt 1,3 and 2,4 (default)
For programming iCE - Shunt 3,4 and 1,2
FLASH_MOSI
ICE_SS
FLASH_MOSIICE_SCK
FLASH_MISO
FLASH_MISO
+3.3V
ICE_SCK2,3,4
ICE_SS2,3,4,6
FLASH_MOSI2,6
FLASH_MISO 2,6
FLASH_MOSI 2,6
FLASH_MISO2,6
ICE_SCK2,3,4
ICE_SS2,3,4,6
ICE_MOSI3,4
ICE_MISO 3,4
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
66
SPI
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
66
SPI
iCE40 UltraPlus Breakout Board A
Date:
Size Schematic Rev
ofSheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Board Rev
Project
6-DEC-2015
BA
66
SPI
iCE40 UltraPlus Breakout Board A
R58
10K
JU1
63429-202LF
J6
2
3
4
1
JU3
63429-202LF
C15
0.1uF
R60
10K
U5
N25Q032A13ESC40F
CS
1
SDI
5
SCK
6
WP
3
HOLD 7
VCC 8
GND
4
SDO 2
J1
SPI PGM
PART_NUMBER = 77313-801-10LF
Manufacturer = FCI
SS2
1GND1 2
SS3
3NC2 4
MISO
5NC1 6
SCLK
7MOSI 8
SS1
9GND2 10
J7
21
C63
0.1uF
R59
10K
JU2
63429-202LF
R25
10K
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
30 FPGA-UG-02001-1.1
Appendix B. Bill of Materials
Item
Reference
Qty
Part
PCB Footprint
PART_NUMBER
Manufacturer
DESCRIPTION
1
C1,C3,C67
3
4.7uF
cc0603
ECJ-1VB0J475K
Panasonic
CAP CER 4.7UF
6.3V 10% X5R
0603
2
C2,C4,C5,C6,C7,
C8,C9,C11,C12,
C15,C37,C38,C39,
C40,C44,C49,C53,
C63,C64,C66,C87,
C89,C91,C93,C94
25
0.1uF
cc0402
C0402C104K4RA
CTU
Kemet
CAP CER 0.1UF
16V 10% X7R 0402
3
C10,C35,C42,C47,
C65
5
10uF
cc0603
LMK107BJ106M
ALTD
Taiyo Yuden
CAP CER 10UF 10V
20% X5R 0603
4
C36,C43
2
1uF
cc0402
C0402C105K9PA
CTU
Kemet
CAP CER 1UF 6.3V
10% X5R 0402
5
C41,C45,C46,C48
4
0.01uF
cc0402
C0402C103J4RA
CTU
Kemet
CAP CER 10000PF
16V 5% X7R 0402
6
C72,C73,C74,C75,
C76
5
0.1uF
cc0603
C0603C104K4RA
CTU
Kemet
CAP CER 0.1UF
16V 10% X7R 0603
7
C84,C85
2
22uF
cc0805
LMK212BJ226M
G-T
Taiyo Yuden
CAP CER 22UF 10V
20% X5R 0805
8
C88, C95, C99,
C100
4
1uF
cc0402
C0402C105K4PA
C7867
Kemet
CAP CER 1UF 16V
10% X5R 0402
9
C90, C92, C98,
C101
4
10nF
cc0402
C0402C103J4RA
CTU
Kemet
CAP CER 10000PF
16V 5% X7R 0402
10
C96
1
100nF
cc0402
C0402C104K4RA
CTU
Kemet
CAP CER 0.1UF
16V 10% X7R 0402
11
C97
1
10uF
cc0402
CL05A106MP5N
UNC
Samsung
CAP CER 10UF 10V
X5R 0402
12
D3
1
Green
SM_D_0603
LG L29K-G2J1-
24-Z
Osram
LED SMARTLED
GREEN 570NM
0603
13
D8,D9,D10,D11
4
CDBU0130R
diode_sod523f
CDBU0130R
Comchip
DIODE SCHOTTKY
30V 100MA 0603
14
D13
1
Blue
led_0603
LTST-C190TBKT
LITE-On Inc.
LED BLUE CLEAR
0603 SMD
15
FB4,FB5
2
FB_60ohm
L0603
HI0603P600R-10
Laird-signal
FERRITE CHIP
POWER 60 Ω SMD
16
J1
1
SPI PGM
hdr5x2
77313-801-10LF
FCI
CONN HEADER
.100 DUAL STR
10POS
17
J2,J3
2
Header2x10
hdr_samtec_mts
w_2x10_100
MTSW-110-08-T-
D-300
Samtec
CONN HEADER
20POS .100" TH
DUAL
18
J5
1
SKT_MINIUSB_
B_RA
skt_miniusb_b_r
a
5075BMR-05-
SM-CR
Neltron
CONN MINI USB
RCPT RA TYPE B
SMD
19
J6
1
TSW-102-07-F-
D
hdr_samtec_tsw
_2x2_100
TSW-102-07-F-D
Samtec
CONN HEADER
4POS .100" DBL
20
J7
1
TSW-102-07-G-
S
hdr_samtec_tsw
_1x2_100
TSW-102-07-G-S
Samtec
CONN HEADER
2POS .100" SGL
GOLD
21
J11
1
CRST
HDR1X2-40
77311-801-02LF
FCI
CONN HEADER
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
FPGA-UG-02001-1.1 31
Item
Reference
Qty
Part
PCB Footprint
PART_NUMBER
Manufacturer
DESCRIPTION
.100 SINGL STR
2POS
22
J27
1
HEADER 3X2
HDR3x2
—
—
—
23
J28
1
DONE
HDR1X2-40
77311-801-02LF
FCI
CONN HEADER
.100 SINGL STR
2POS
24
J51
1
2 PIN JPR
2PIN_100MIL
—
—
—
25
J52
1
HEADER 6X2_0
HDR_6X2
—
—
—
26
L4,L6,L7
3
600 OHM
800MA
fb0603
BLM18HE601SN
1D
Murata
FERRITE CHIP 600
Ω 800MA 0603
27
R5,R6,R7,R8,R49,
R70,R71
7
0
cr0603
RC0603JR-070RL
Yageo
RES 0.0 Ω 1/10W
JUMP 0603 SMD
28
R9,R19
2
2.2K
cr0402
RC0402FR-
072K2L
Yageo
RES 2.20 K Ω
1/16W 1% 0402
SMD
29
R10
1
12K
cr0402
RC0402FR-
0712KL
Yageo
RES 12.0 K Ω
1/16W 1% 0402
SMD
30
R11,R12,R13,R25,
R58,R59,R60
7
10K
cr0402
RC0402FR-
0710KL
Yageo
RES 10.0 K Ω
1/16W 1% 0402
SMD
31
R14
1
100
R0603
CRCW0603100R
FKEAHP
Vishay
RES 100 Ω 0.25W
1% 0603 SMD
32
R34
1
10k
R0603
ERJ-3EKF1002V
Panasonic
RES 10 K Ω 1/10W
1% 0603 SMD
33
R35
1
2k2
R0603
ERJ-3EKF2201V
Panasonic
RES 2.2 K Ω 1/10W
1% 0603 SMD
34
R54
1
1K
cr0402
ERJ-2GEJ102X
Panasonic
RES SMD 1 K Ω 5%
1/10W 0402
35
R62,R63
2
1M
cr0402
RC0402JR-
071ML
Yageo
RES 1.0M Ω
1/16W 5% 0402
SMD
36
R64
1
357K
cr0603
ERJ-3EKF3573V
Panasonic
RES SMD 357 K Ω
1% 1/10W 0603
37
R65
1
210K
cr0402
ERJ-2RKF2103X
Panasonic
RES SMD 210 K Ω
1% 1/10W 0402
38
R66,R67
2
100
cr0603
RC0603FR-
07100RL
Yageo
RES 100 Ω 1/10W
1% 0603 SMD
39
R68,R69
2
0.1
cr0603
ERJ-3RSFR10V
Panasonic
RES .10 Ω 1/10W
1% 0603 SMD
40
R72,R78,R79,R80
4
4.7K
cr0603
CRCW06034K70
FKEA
Vishay
RES 4.70 K Ω
1/10W 1% 0603
SMD
41
R73,R74,R75,R76,
R77
5
1
cr0603
RC0603FR-071RL
Yageo
RES SMD 1 Ω 1%
1/10W 0603
42
R94,R95
2
62
SM_R_0603
ERJ-3EKF62R0V
Panasonic
RES 62 Ω 1/10W
1% 0603 SMD
43
R97
1
110
SM_R_0603
ERJ-3EKF1100V
Panasonic
RES 110 Ω 1/10W
1% 0603 SMD
44
SW1
1
CRST
2psmd_eswitch
TL1015AF160QG
E-Switch
SWITCH TACTILE
SPST-NO 0.05 A
12V
45
SW2
1
SW-DIP4
sw_sp_st_cts_19
195-4MST
CTS
SWITCH SIDE
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
32 FPGA-UG-02001-1.1
Item
Reference
Qty
Part
PCB Footprint
PART_NUMBER
Manufacturer
DESCRIPTION
5-4mst
Electrocompo
nents
ACTUATED 4 SEC
50V
46
TP1,TP2,TP3
3
TP_S_40_63
tp_s_40_63
—
—
Square test point,
40mil inner
diameter,
63mil outer
diameter
47
TP5,TP6,TP7,TP8,
TP9,TP10,TP11,T
P12,TP13,TP14
10
DNI
tp_s_40_63
—
—
Square test point,
40mil inner
diameter,
63mil outer
diameter
48
U1
1
iCE40UP5K/3K-
SG48
iCE40UP5K_SG48
—
—
—
49
U2
1
FT2232HL
tqfp64_0p5_12p
2x12p2_h1p6
FT2232HL-REEL
FTDI
IC USB HS DUAL
UART/FIFO 64-
LQFP
50
U3
1
93LC56-SO8
so8_50_244
93LC56CT-I/SN
Microchip
IC EEPROM 2KBIT
3MHZ 8SOIC
51
U4
1
LED TRI-
COLOUR_1
6-PLCC
SFT722N-S
Seoul
Semiconducto
r Inc.
LED RED/GRN/BLU
CLEAR LENS 6PLCC
52
U5
1
N25Q032A13E
SC40F
so8_50_244
N25Q032A13ESC
40F
Micron
IC Flash Mem
Serial-SPI 3V/3.3V
32M-Bit
4M 7ns 8-Pin SO
T/R
53
U6
1
PMOD socket
HDR_2X6
—
—
—
54
U7
1
LT3030EFE#TR
PBF
tssop20_26_260_
thrm_pad
LT3030EFE#TRP
BF
Linear
IC REG LDO ADJ
20TSSOP
55
X1
1
12.0000MHZ
2_5mmx2mm
SiT1602AC-12-
33E-12.000
SiTime
OSC MEMS
12MHZ H/LV-
CMOS SMD
57
iCE40 ULTRAPLUS
BREAKOUT
BOARD PCB
1
—
—
305-PD-16-0084
PACTRON
—
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
FPGA-UG-02001-1.1 33
References
Standards Documents
The standards used in this document and their abbreviations are listed on the table below.
Abbreviation
Standards Publication, Organization, and Date
HDMI
High Definition Multimedia Interface, Revision 1.4a, HDMI Licensing LLC., March 2010
HCTS
HDMI Compliance Test Specification, Revision 1.4a, HDMI Licensing LLC., March 2010
HDCP
High-bandwidth Digital Content Protection, Revision 2.2, Digital Content Protection, LLC; February 2013
High-bandwidth Digital Content Protection, Revision 1.4, Digital Content Protection, LLC; July 2009
DVI
Digital Visual Interface, Revision 1.0, Digital Display Working Group, April 1999
E-EDID
Enhanced Extended Display Identification Data Standard, Release A Revision 1, VESA; February 2000
CEA-861-D
A DTV Profile For Uncompressed High Speed Digital Interfaces, EIA/CEA, July 2006
EDDC
Enhanced Display Data Channel Standard, Version 1, VESA, September 1999
MHL
MHL (Mobile High-definition Link) Specification, Version 3.0, MHL, LLC, August 2013
For more information on the specifications that are applied in this document, contact the responsible standards groups
listed on the table below.
Standards Group
Web URL
ANSI/EIA/CEA
http://global.ihs.com
VESA
http://www.vesa.org
HDCP
http://www.digital-cp.com
DVI
http://www.ddwg.org
HDMI
http://www.hdmi.org
MHL
http://www.mhlconsortium.org
Technical Support Assistance
For assistance, submit a technical support case at www.latticesemi.com/techsupport.
Email: techsupport@latticesemi.com
iCE40 UltraPlus Breakout Board
User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice
34 FPGA-UG-02001-1.1
Revision History
Date
Version
Change Summary
March 2017
1.1
— Corrected document status; removed “Preliminary”.
— iCE40 UltraPlus Family Data Sheet document number changed to DS1056.
— Update Lattice iCEcube2 to version 2017.01.
— Updated Diamond Programmer version to 3.9.
— Updated Appendix A. Schematic Diagrams.
— Removed Lattice Semiconductor Documents section.
September 2016
1.0
Initial release.
