FST3253QSCX - Fairchild Semiconductor

September 1997

Revised December 1999

FST3253 Dual 4:1 Multipl exer/Demultiplexer Bus Switch

FST3253

Dual 4:1 Multiplexer/Demultiplexer Bus Switch

General Description

The Fairchild Switch FST3253 is a dual 4:1 high-speed

CMOS TTL-compatible multiplexer/demultiplexer bus

switch. The low on resistance of the switch allows inputs to

be conne cted to output s without a dding propaga tion delay

or generating additional ground bounce noise.

When OE is LOW, S0 and S1 connect the A Port to the

selected B Port output. When OE is HIGH, the switch is

OPEN and a hig h-impe dance sta te exist s between the two

ports.

Features

■4Ω switch connection between two ports.

■Minimal propagation delay through the switch.

■Low lCC.

■Zero bounce in flow-through mode.

■Control inputs compatible with TTL level.

Ordering Code:

Device a ls o av ailable in Tape and Reel. Specify by a ppending s uffix let te r “X” to the or dering co de.

Logic Diagram

Pin Descriptions

Connection Diagram

Truth Table

Order Number Package Number Package Description

FST3253M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

FST3253QSC MQA16 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

FST3253MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Name Description

OE1, OE2Bus Switch Enables

S0, S1Select Inputs

ABus A

B1, B2, B3, B4Bus B

S1S0OE1OE2Function

X X H X Disconnect 1A

X X X H Disconnect 2A

LLLL A = B1

LHLL A = B2

HLLL A = B3

HHLL A = B4

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FST3253

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions (Note 3)

Note 1: The Absolute Maximum Ratings are those values beyond which

the saf ety of the device cannot be gu aranteed. Th e device shoul d not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The Rec ommende d Opera ting Condit ions table s will de fine the co nditions

for actu al device operation.

Note 2: The inpu t and outpu t negati ve voltag e ratings m ay be ex ceede d if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristi cs

Note 4: Typical v alues are at VCC = 5.0V and TA = +25°C

Note 5: Measured by the v olt age drop between A and B pins at th e indica te d c urrent thro ugh the swit c h. On resistance is determi ned by the lower of the

voltages on the two (A or B) pi ns .

Supply Voltage (VCC)−0.5V to +7.0V

DC Switch Voltage (VS)−0.5V to +7.0V

DC Input Voltage (VIN)(Note 2) −0.5V to +7.0V

DC Input Diode Current (lIK) VIN<0V −50mA

DC Output (IOUT) Sink Current 128mA

DC VCC/GND Current (ICC/IGND)+/− 100mA

Storage Temperature Range (TSTG)−65°C to +150 °C

Power Supply Operating (VCC) 4.0V to 5.5V

Input Voltage (VIN)0V to 5.5V

Output Voltage (VOUT)0V to 5.5V

Input Rise and Fall Time (tr, tf)

Switch Control Input 0ns/V to 5ns/V

Switch I/O 0ns/V to DC

Free Air Operating Temperature (TA)−40 °C to −85 °C

Symbol Parameter VCC

(V)

TA = −40 °C to +85 °CUnits Conditions

Min Typ

(Note 4) Max

VIK Clamp Diode Voltage 4.5 −1.2 V IIN = −18mA

VIH High Level Input V oltag e 4.0–5.5 2.0 V

VIL Low Level Input Voltage 4.0–5.5 0.8 V

IIInput Leakage Current 5.5 ±1.0 µA0≤ VIN ≤5.5V

IOZ OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤A, B ≤VCC

RON Switch On Resistance 4.5 4 7 ΩVIN = 0V, IIN = 64mA

(Note 5) 4.5 4 7 ΩVIN = 0V, IIN = 30mA

4.5 8 15 ΩVIN = 2.4V, IIN = 15mA

4.0 11 20 ΩVIN = 2.4V, IIN = 15mA

ICC Quiescent Supply Current 5.5 3 µAV

IN = VCC or GND, IOUT = 0

∆ ICC Increase in ICC per Input 5.5 2.5 mA One input at 3.4V

Other inputs at VCC or GND

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FST3253

AC Electrical Characteristics

Note 6: T his par amete r is guaranteed by design but is not tested. T he bus s wi tch contributes no pro pagation de lay o t he r than t he RC del a y of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Note 7: TA = +25°C, f = 1 M H z , Ca pacitanc e is chara c te riz ed but not te s te d.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: CL includes load and stray capacitance

Note: Input PRR = 1.0 M H z, t W = 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

Symbol Parameter

TA = −40 °C to +85 °C

CL = 50pF, RU = RD = 500ΩUnits Condi tions Figure No.

VCC = 4.5 – 5.5V VCC = 4.0V

Min Max Min Max

tPHL,tPLH Prop Delay Bus to Bus (Note 6) 0.25 0.25 ns VI = OPEN Figure 1

Figure 2

Prop Delay, Select to Bus A 1.0 5.3 6.3

tPZH, tPZL Output Enable Time, Select to Bus B 1.0 5.3 6.0 ns VI = 7V for tPZL Figure 1

Figure 2

Output Enable Time, IOE to Bus A, B 1.0 5.3 6.2 VI = OPEN for tPZH

tPHZ, tPLZ Output Disable Time., Select to Bus B 1.0 5.8 6.2 ns VI = 7V for tPLZ Figure 1

Figure 2

Output Disable Time, IOE to Bus A, B 1.0 5.5 6.2 VI = OPEN for tPHZ

Symbol Parameter Typ Max Units Conditions

CIN Control Pin Input Capacitance 3 pF VCC = 5.0V

CI/O A Port Input/Output Capacitance 13 pF VCC, OE = 5.0V

B Port 5 pF

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FST3253

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

Package Number M16A

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA16

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FST3253 Dual 4:1 Multipl exer/Demultiplexer Bus Switch

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lea d Th in S hri n k Small Ou tlin e Pack age (TSSOP ), JED EC MO-1 53, 4.4mm Wide

Package Number MTC16

Technology Description

The Fairchild Switch family derives fro m and embodies Fairchild’s proven switch t echnology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume an y responsibility for u se of any circuitry descr ibed, no circuit pat ent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r syst ems are dev ic es or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instruct ions fo r use pr ovi de d in the l abe ling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A crit ical componen t in any com ponen t of a life s uppor t

device or system whose failure to perform can be rea-

sonabl y e xpec ted to cause th e fa i lure of the l ife s upport

device or system, or to affect its safety or effectiveness.