SLVS028I − APRIL 1983 − REVISED JULY 2009
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DPower-On Reset Generator
DAutomatic Reset Generation After Voltage
Drop
DWide Supply-Voltage Range
DPrecision Voltage Sensor
DTemperature-Compensated Voltage
Reference
DTrue and Complement Reset Outputs
DExternally Adjustable Pulse Duration
description/ordering information
ORDERING INFORMATION{
TAPACKAGE}ORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP (P) Tube of 50 TL7702ACP TL7702ACP
SOIC (D)
Tube of 75 TL7702ACD
7702AC
SOIC (D) Reel of 2500 TL7702ACDR 7702AC
PDIP (P) Tube of 50 TL7705ACP TL7705ACP
SOIC (D)
Tube of 75 TL7705ACD
7705AC
SOIC (D) Reel of 2500 TL7705ACDR 7705AC
SOP (PS) Reel of 2000 TL7705ACPSR T7705A
0°C to 70°CPDIP (P) Tube of 50 TL7709ACP TL7709ACP
0C to 70 C
SOIC (D)
Tube of 75 TL7709ACD
7709AC
SOIC (D) Reel of 2500 TL7709ACDR 7709AC
PDIP (P) Tube of 50 TL7712ACP TL7709ACP
SOIC (D)
Tube of 75 TL7712ACD
7712AC
SOIC (D) Reel of 2500 TL7712ACDR 7712AC
PDIP (P) Tube of 50 TL7715ACP TL7715ACP
SOIC (D) Tube of 75 TL7715ACD 7715AC
PDIP (P) Tube of 50 TL7702AIP TL7702AIP
SOIC (D)
Tube of 75 TL7702AID
7702AI
SOIC (D) Reel of 2500 TL7702AIDR 7702AI
−40°C to 85°CPDIP (P) Tube of 50 TL7705AIP TL7705AIP
−40 C to 85 C
SOIC (D)
Tube of 75 TL7705AID
7705AI
SOIC (D) Reel of 2500 TL7705AIDR 7705AI
SOIC (D) Reel of 2500 TL7712AIDR 7712AI
†For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at www.ti.com.
‡Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
Copyright 2009, Texas Instruments Incorporated
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
REF
RESIN
CT
GND
VCC
SENSE
RESET
RESET
TL7702A, TL7709A, TL7712A, TL7715A ...D OR P PACKAGE
TL7705A . . . D, P, OR PS PACKAGE,
(TOP VIEW)
SLVS028I − APRIL 1983 − REVISED JULY 2009
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued)
The TL77xxA family of integrated-circuit supply-voltage supervisors is designed specifically for use as reset
controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the supply
for undervoltage conditions at the SENSE input. During power up, the RESET output becomes active (low)
when V CC attains a value approaching 3.6 V. At this point (assuming that SENSE is above VIT+), the delay timer
function activates a time delay, after which outputs RESET and RESET go inactive (high and low , respectively).
When an undervoltage condition occurs during normal operation, RESET and RESET go active. To ensure that
a complete reset occurs, the reset outputs remain active for a time delay after the voltage at the SENSE input
exceeds the positive-going threshold value. The time delay is determined by the value of the external capacitor
CT: td = 1.3 × 104 × CT, where CT is in farads (F) and td is in seconds (s).
During power down and when SENSE is below VIT−, the outputs remain active until VCC falls below 2 V. After
this, the outputs are undefined.
An external capacitor (typically 0.1 µF) must be connected to REF to reduce the influence of fast transients in
the supply voltage.
functional block diagram
The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming
network to adjust the reference voltage and sense-comparator trip point.
RESIN
≈100 µA
R1
(see Note A)
6
5
1
Reference
Voltage
SENSE
GND
8
3
7
2
4
VCC
CT
REF
NOTES: A. TL7702A: R1 = 0 Ω, R2 = open
TL7705A: R1 = 7.8 kΩ, R2 = 10 kΩ
TL7709A: R1 = 19.7 kΩ, R2 = 10 kΩ
TL7712A: R1 = 32.7 kΩ, R2 = 10 kΩ
TL7715A: R1 = 43.4 kΩ, R2 = 10 kΩ
B. Resistor values shown are nominal.
RESET
RESET
R2
(see Note A)
SLVS028I − APRIL 1983 − REVISED JULY 2009
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing diagram
Output
Undefined
RESET
Î
Î
td
Output
Undefined
VCC and SENSE
td
Threshold Voltage
VCC ≈ 3.6 V VCC ≈ 2 V
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI, RESIN −0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI, SENSE:TL7702A (see Note 2) −0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TL7705A −0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TL7709A −0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TL7712A, TL7715A −0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High-level output current, IOH, RESET −30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low-level output current, IOL, RESET 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 3 and 4): D package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
P package 85°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
PS package 95°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC − 1 V or 6 V, whichever
is less.
3. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
4. The package thermal impedance is calculated in accordance with JESD 51-7.
SLVS028I − APRIL 1983 − REVISED JULY 2009
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
MIN MAX UNIT
VCC Supply voltage 3.5 18 V
VIH High-level input voltage at RESIN 2 V
VIL Low-level input voltage at RESIN 0.6 V
TL7702A 0 See Note 2
TL7705A 0 10
VIInput voltage, SENSE TL7709A 0 15 V
VI
Input voltage, SENSE
TL7712A 0 20
V
TL7715A 0 20
IOH High-level output current, RESET −16 mA
IOL Low-level output current, RESET 16 mA
TA
Operating free-air temperature range
TL77xxAC 0 70
°C
T
A
Operating free-air temperature range
TL77xxAI −40 85 °
C
NOTE 2: For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC − 1 V o r 6 V, whichever is less.
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
†TL77xxAC
TL77xxAI
UNIT
PARAMETER
TEST CONDITIONS†
MIN TYP MAX
UNIT
VOH High-level output voltage, RESET IOH = −16 mA VCC−1.5 V
VOL Low-level output voltage, RESET IOL = 16 mA 0.4 V
Vref Reference voltage TA = 25°C 2.48 2.53 2.58 V
TL7702A 2.48 2.53 2.58
Negative-going input threshold voltage,
TL7705A 4.5 4.55 4.6
V
IT−
Negative-going input threshold voltage,
SENSE
TL7709A T
A
= 25°C7.5 7.6 7.7 V
VIT−
SENSE
TL7712A
TA = 25 C
10.6 10.8 11
V
TL7715A 13.2 13.5 13.8
TL7702A 10
TL7705A 15
V
hys
Hysteresis, SENSE (V
IT+
− V
IT−
)TL7709A T
A
= 25°C20 mV
Vhys
Hysteresis, SENSE (VIT+ − VIT−)
TL7712A
TA = 25 C
35
mV
TL7715A 45
RESIN
VI = 2.4 V to VCC 20
I
I
Input current
RESIN
VI = 0.4 V −100 µA
II
Input current
SENSE TL7702A Vref < VI < VCC − 1.5 V 0.5 2
µA
IOH High-level output current, RESET VO = 18 V 50 µA
IOL Low-level output current, RESET VO = 0 −50 µA
ICC Supply current All inputs and outputs open 1.8 3 mA
†All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND.
SLVS028I − APRIL 1983 − REVISED JULY 2009
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
†TL77xxAC
TL77xxAI
UNIT
PARAMETER
TEST CONDITIONS†
MIN TYP MAX
UNIT
Output pulse duration CT = 0.1 µF 0.65 1.2 2.6 msec
Input pulse duration at RESIN 0.4 µs
tw(S) Pulse duration
at SENSE input to switch outputs VIH = VIT− + 200 mV, VIL = VIT− − 200 mV 2µs
tpd Propagation delay time, RESIN to RESET VCC = 5 V 1µs
tr
Rise time
RESET
VCC = 5 V,
See Note 5
0.2
s
trRise time RESET VCC = 5 V, See Note 5 3.5 µs
tf
Fall time
RESET
VCC = 5 V,
See Note 5
3.5
s
tfFall time RESET VCC = 5 V, See Note 5 0.2 µs
†All switching characteristics are measured with 0.1-µF capacitors connected at REF and VCC to GND.
NOTE 5: The rise and fall times are measured with a 4.7-kΩ load resistor at RESET and RESET.
PARAMETER MEASUREMENT INFORMATION
0.7 V
tpd
10%
90%
tw(S)
10%
VIT+ VIT− VIT+
0 V
VIH
VIL
2 V
50%
50%
10%
10%
90%
10%
td
SENSE
Undefined
RESET
Voltage
Drop
tftr
90%
tftd
tr
RESIN
RESET
ÎÎ
td
90% VOH(RESET)
VOL(RESET)
Figure 1. Voltage Waveforms
SLVS028I − APRIL 1983 − REVISED JULY 2009
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 2
30
26
22
18 0246
34
38
ASSERTION TIME
vs
LOAD RESISTANCE
42
810
t − Assertion Time − ns
RL − Load Resistance − kΩ
RESET tr
RESET tf
VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C
Figure 3
4
3
2
1
0246
t − Deassertion Time −
5
6
DEASSERTION TIME
vs
LOAD RESISTANCE
7
810
0
sµ
RL − Load Resistance − kΩ
RESET tf
RESET tr
VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C
Figure 4
32
28
24
200 25 50 75 100 125
36
40
ASSERTION TIME
vs
LOAD CAPACITANCE
44
150 175 200
RESET tr
RESET tf
VCC = 5 V
CT = 0.1 µF
RL = 4.7 kΩ
TA = 25°C
t − Assertion Time − ns
CL − Load Capacitance − pF
Figure 5
2.4
2
1.6
1.2
2.8
3.2
DEASSERTION TIME
vs
LOAD CAPACITANCE
3.6
RESET tf
RESET tr
VCC = 5 V
CT = 0.1 µF
RL = 4.7 kΩ
TA = 25°C
0 25 50 75 100 125 150 175 200
CL − Load Capacitance − pF
0.8
t − Deassertion Time − sµ
†For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted
plateauing in either output waveform during switching.
SLVS028I − APRIL 1983 − REVISED JULY 2009
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
22 kΩ
0.1 µF
SENSE
RESIN
GND
RESET
RESET
VCC
CT
System Reset
10 kΩ
CT
10 kΩ
0.1 µF
SENSE
RESIN
GND
RESET
RESET
VCC
CT
0.1 µF
SENSE
RESIN
GND
REF
RESET
VCC
CT
CT
CT
5 V
12 V
−12 V
GND
TL7712A TL7705A
TL7712A
RESET
10 kΩ
10 kΩ
REF
10 kΩ
REF
8
7
2
3
4
1
6
5
8
7
2
3
4
1
6
5
8
7
2
3
4
1
6
5
CT(F)+td(s)
1.3 104
Figure 6. Multiple Power-Supply System Reset Generation
5 V
10 kΩ
0.1 µF
SENSE
RESIN
GND
REF
RESET
VCC
CT
CT
RESET
VCC
GND
VSS
TMS7000
TL7705A
10 kΩ
RESET
8
7
2
3
4
1
6
5
CT(F)+td(s)
1.3 104
Figure 7. Reset Controller for TMS7000 System
SLVS028I − APRIL 1983 − REVISED JULY 2009
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
4.7 kΩ
0.1 µF
SENSE
GND REF
RESET
VCC
CT
CT
TL7705A
INPUT OUTPUT
CO
CI
COMMON
25 kΩ
GS
D
Q1
2N3994
5 V
µA7805
RESET
4.7 kΩ
System RESET
8
7
3
4
1
6
5
Input
Figure 8. Eliminating Undefined States Using a P-Channel JFET
2.7 kΩ
0.1 µF
SENSE
GND REF
RESIN
VCC
CT
CT
TL77xxA
RESET
750 Ω
System RESET
Q1
2N4036
VCC
10 kΩ1 kΩ
10 kΩ
RESET
8
7
3
4
1
6
5
SENSE Input
2
Figure 9. Eliminating Undefined States Using a pnp Transistor
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TL7702ACD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702ACDE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702ACDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702ACDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7702ACPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7702AID ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702AIDE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702AIDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702AIDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702AIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702AIP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7702AIPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7702AMFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI
TL7702AMJG OBSOLETE CDIP JG 8 TBD Call TI Call TI
TL7702AMJGB OBSOLETE CDIP JG 8 TBD Call TI Call TI
TL7705ACD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705ACDE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705ACDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705ACDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 3-Sep-2009
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TL7705ACPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7705ACPSLE OBSOLETE SO PS 8 TBD Call TI Call TI
TL7705ACPSR ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705ACPSRE4 ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705ACPSRG4 ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705AID ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705AIDE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705AIDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705AIDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705AIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705AIP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7705AIPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7709ACD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7709ACDE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7709ACDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7709ACDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7709ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7709ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7709ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7709ACPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7709AID OBSOLETE SOIC D 8 TBD Call TI Call TI
TL7709AIP OBSOLETE PDIP P 8 TBD Call TI Call TI
TL7712ACD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7712ACDE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7712ACDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7712ACDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 3-Sep-2009
Addendum-Page 2
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TL7712ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7712ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7712ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7712ACPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7712AID OBSOLETE SOIC D 8 TBD Call TI Call TI
TL7712AIDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7712AIP OBSOLETE PDIP P 8 TBD Call TI Call TI
TL7715ACD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7715ACDE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7715ACDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7715ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7715ACPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TL7715AID OBSOLETE SOIC D 8 TBD Call TI Call TI
TL7715AIP OBSOLETE PDIP P 8 TBD Call TI Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 3-Sep-2009
Addendum-Page 3
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 3-Sep-2009
Addendum-Page 4
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL7702ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7702ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7702AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7705ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7705ACPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
TL7705AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7709ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7712ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7712AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Sep-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL7702ACDR SOIC D 8 2500 340.5 338.1 20.6
TL7702ACDR SOIC D 8 2500 346.0 346.0 29.0
TL7702AIDR SOIC D 8 2500 340.5 338.1 20.6
TL7705ACDR SOIC D 8 2500 340.5 338.1 20.6
TL7705ACPSR SO PS 8 2000 346.0 346.0 33.0
TL7705AIDR SOIC D 8 2500 340.5 338.1 20.6
TL7709ACDR SOIC D 8 2500 340.5 338.1 20.6
TL7712ACDR SOIC D 8 2500 340.5 338.1 20.6
TL7712AIDR SOIC D 8 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Sep-2009
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
4040140/D 10/96
28 TERMINAL SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
A
NO. OF
MINMAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.739
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
12
1314151618 17
11
10
8
9
7
5
432
0.020 (0,51)
0.010 (0,25)
6
12826 27
19
21
B SQ
A SQ 22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE
8
4
0.015 (0,38)
Gage Plane
0.325 (8,26)
0.300 (7,62)
0.010 (0,25) NOM
MAX
0.430 (10,92)
4040082/D 05/98
0.200 (5,08) MAX
0.125 (3,18) MIN
5
0.355 (9,02)
0.020 (0,51) MIN
0.070 (1,78) MAX
0.240 (6,10)
0.260 (6,60)
0.400 (10,60)
1
0.015 (0,38)
0.021 (0,53)
Seating Plane
M
0.010 (0,25)
0.100 (2,54)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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